Signal isolation circuit

Abstract

The utility model provides a signal isolation circuit, and the circuit comprises an input signal contact which is used for receiving an input signal; the processor is led out from a signal receiving pin of the processor to serve as the input signal contact, and the type of the processor corresponds to the type of the input signal; one end of the isolation sub-circuit is connected with a signal sending pin of the processor; and the output signal contact is led out from the other end of the isolation sub-circuit to serve as the output signal contact and is used for sending the output signal output by the isolation sub-circuit.

Description

Technical Field

[0001] This application relates to the technical field of signal transmission, and particularly to a signal isolation circuit. Background Art

[0002] Currently, signal transmission is required between various modules in an energy storage system to achieve functions such as autonomous control. It may be that one module transmits a signal to another module. Since the circuit structures between the two modules are different, they may affect each other during signal transmission. As a result, the accuracy of signal transmission is affected, leading to an impact on inter-module communication and thus affecting the normal operation of the energy storage system. Summary of the Utility Model

[0003] In view of this, the purpose of this application is to provide a signal isolation circuit, which can select a processor corresponding to the type of input signal, receive the input signal through the signal receiving pin of the processor, and send the signal to the isolation sub-circuit through the signal output pin. The isolation sub-circuit then transmits the signal, solving the problem that direct signal transmission between two modules in the prior art may affect each other, and achieving the technical effect of reducing the impact of signal transmission to improve the accuracy of signal transmission.

[0004] In a first aspect, an embodiment of this application provides a signal isolation circuit, which includes: an input signal contact for receiving an input signal; a processor, with the signal receiving pin of the processor led out as the input signal contact, and the type of the processor corresponding to the type of the input signal; an isolation sub-circuit, with one end of the isolation sub-circuit connected to the signal sending pin of the processor; and an output signal contact, led out from the other end of the isolation sub-circuit as the output signal contact for sending the output signal output by the isolation sub-circuit.

[0005] Optionally, the input signal includes an analog signal, and the processor corresponding to the analog signal is an operational amplifier. The circuit further includes a first resistor, a second resistor, and a first capacitor. Among them, the power supply terminal of the operational amplifier is connected to a preset power supply, one end of the first resistor is connected to a preset ground, the other end of the first resistor is connected to the first input terminal of the operational amplifier, one end of the second resistor is connected to the other end of the first resistor, the other end of the second resistor is connected to the first output terminal of the operational amplifier, one end of the first capacitor is connected to one end of the second resistor, the other end of the first capacitor is connected to the other end of the second resistor, the second input terminal of the operational amplifier serves as the signal receiving pin of the processor, and the first output terminal of the operational amplifier serves as the signal sending pin of the processor.

[0006] Optionally, the input signal includes a digital signal, the corresponding processor of the digital signal is a logic gate device, the circuit further includes a third resistor, one end of the third resistor is connected to the power supply terminal of the logic gate device, the power supply terminal of the logic gate device is connected to a preset power supply, the other end of the third resistor is connected to the third input terminal of the logic gate device, the fourth input terminal of the logic gate device serves as the signal receiving pin of the processor, and the second output terminal of the logic gate device serves as the signal sending pin of the processor.

[0007] Optionally, the circuit further includes a fourth resistor, a first inductor, a second capacitor and a third capacitor. Among them, the fourth resistor is arranged between the signal receiving pin of the processor and the input signal contact, the first inductor is arranged between the preset power supply and the power supply terminal of the processor, one end of the second capacitor is connected to the preset power supply, one end of the third capacitor is connected to the power supply terminal of the processor, and the other ends of the second capacitor and the third capacitor are both connected to the preset ground.

[0008] Optionally, the circuit further includes a signal amplification sub-circuit and a power supply sub-circuit. The first connection end of the signal amplification sub-circuit is connected to the power supply sub-circuit, the second connection end of the signal amplification sub-circuit is connected to the signal sending pin of the processor, and the third connection end of the signal amplification sub-circuit is connected to one end of the isolation sub-circuit.

[0009] Optionally, the first connection end of the input side of the isolation sub-circuit is connected to the power supply sub-circuit, the second connection end of the input side of the isolation sub-circuit serves as one end of the isolation sub-circuit, the third connection end of the output side of the isolation sub-circuit is connected to the target power supply, and the fourth connection end of the output side of the isolation sub-circuit serves as the other end of the isolation sub-circuit.

[0010] Optionally, the signal amplification sub-circuit includes a first control switch, a second control switch, a fifth resistor, a sixth resistor and a seventh resistor. One end of the fifth resistor serves as the first connection end of the signal amplification sub-circuit, the other end of the fifth resistor is connected to the first connection end of the first control switch, one end of the sixth resistor serves as the second connection end of the signal amplification sub-circuit, the other end of the sixth resistor is connected to the control end of the first control switch and the control end of the second control switch, the second connection end of the first control switch and the first connection end of the second control switch are connected and serve as the third connection end of the signal amplification sub-circuit, the second connection end of the second control switch is connected to one end of the seventh resistor, and the other end of the seventh resistor is connected to the preset ground.

[0011] Optionally, the electron-donating circuit includes a fourth capacitor, a fifth capacitor, and a second inductor. One end of the fourth capacitor is connected to a preset power supply, one end of the fifth capacitor is connected to a preset voltage, the other ends of the fourth capacitor and the fifth capacitor are both connected to a preset ground, one end of the second inductor is connected to one end of the fifth capacitor, and the other end of the fifth capacitor is connected to the first connection end of the signal amplification sub-circuit.

[0012] Optionally, the isolation sub-circuit includes an optocoupler, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a sixth capacitor, a seventh capacitor, and an eighth capacitor. One end of the eighth resistor is connected to one end of the ninth resistor as the first connection end of the input side of the isolation sub-circuit, the other end of the ninth resistor is connected to one end of the sixth capacitor, the other end of the sixth capacitor and the other end of the eighth resistor are both connected to one end of the input side of the optocoupler, one end of the tenth resistor is used as the second connection end of the input side of the isolation sub-circuit, the other end of the tenth resistor is connected to the other end of the input side of the optocoupler, one end of the seventh capacitor and one end of the eighth capacitor are connected together as the third connection end of the output side of the isolation sub-circuit, the other ends of the seventh capacitor and the eighth capacitor are both connected to the target ground, one end of the output side of the optocoupler is connected to the target power supply, the other end of the output side of the optocoupler is used as the fourth connection end of the output side of the isolation sub-circuit, one end of the eleventh resistor is connected to the other end of the output side of the optocoupler, and the other end of the eleventh resistor is connected to the target ground.

[0013] Optionally, the type of the optocoupler corresponds to the type of the input signal. The input signal includes a digital signal and an analog signal. The optocoupler corresponding to the analog signal is a linear optocoupler, and the optocoupler corresponding to the digital signal is a high-speed optocoupler.

[0014] A signal isolation circuit provided by an embodiment of the present application, the circuit includes: an input signal contact for receiving an input signal; a processor, led out from a signal receiving pin of the processor as the input signal contact, and the type of the processor corresponds to the type of the input signal; an isolation sub-circuit, one end of the isolation sub-circuit is connected to a signal sending pin of the processor; an output signal contact, led out from the other end of the isolation sub-circuit as the output signal contact for sending an output signal output by the isolation sub-circuit. It is possible to correspondingly select a processor according to the type of the input signal, receive the input signal through the signal receiving pin of the processor and send the signal to the isolation sub-circuit through the signal output pin, and then the isolation sub-circuit transmits the signal, solving the problem that direct signal transmission between two modules in the prior art will affect each other, and achieving the technical effect of reducing the influence of signal transmission to improve the accuracy of signal transmission.

[0015] To make the above objects, features and advantages of the present application more obvious and understandable, the following specifically enumerates preferred embodiments and, in conjunction with the accompanying drawings, makes a detailed description as follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] To more clearly illustrate the technical solutions of the embodiments of the present application, the accompanying drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present application and should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0017] Figure 1 FIG. shows a schematic structural diagram of a signal isolation circuit provided by an embodiment of the present application.

[0018] Figure 2 FIG. shows a circuit diagram of a signal isolation circuit provided by an embodiment of the present application.

[0019] Figure 3 FIG. shows a circuit diagram of another signal isolation circuit provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0020] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only a part rather than all of the embodiments of this application. Components of the embodiments of this application described and illustrated in the accompanying drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of this application. Based on the embodiments of this application, every other embodiment obtained by those skilled in the art without creative efforts falls within the scope of protection of this application.

[0021] In the prior art, energy storage systems have more tended towards ecological management. The energy storage system includes independent modules such as photovoltaic modules, inverter modules, and wireless modules. When transmitting signals between these independent modules, it is extremely vulnerable to interference. In some cases, signals cannot be transmitted in a timely and effective manner, which is likely to affect the detection of controlled signals and may also affect the issuance of control signals, causing technical problems such as ineffective detection, control, output, and protection within or between systems.

[0022] In response to the above problems, the embodiments of this application provide a signal isolation circuit, which can select a processor according to the type of input signal, receive the input signal through the signal receiving pin of the processor, and send the signal to the isolation sub-circuit through the signal output pin. The isolation sub-circuit then transmits the signal, solving the problem that direct signal transmission between two modules in the prior art will affect each other, and achieving the technical effect of reducing the impact of signal transmission to improve the accuracy of signal transmission, as follows:

[0023] Please refer to Figure 1 , Figure 1 which is a schematic structural diagram of a signal isolation circuit provided by the embodiments of this application. As Figure 1 shown, the signal isolation circuit includes an input signal contact P01 for receiving an input signal; a processor 101, which is led out from the signal receiving pin of the processor as the input signal contact, and the type of the processor corresponds to the type of the input signal; an isolation sub-circuit 102, one end of the isolation sub-circuit is connected to the signal sending pin of the processor; and an output signal contact P02, which is led out from the other end of the isolation sub-circuit as the output signal contact for sending the output signal output by the isolation sub-circuit.

[0024] Among them, the input signal can be a sampling signal, a signal transmitted by a photovoltaic module, an inverter signal, etc. The sampling signal can be a sampling voltage signal or a sampling current signal. The specific application environment of the input signal is not limited. For occasions where signal transmission is required, there must be a signal output interface and a signal receiving interface. Only by connecting the input signal contact to the signal output interface that emits the input signal of a module and connecting the output signal contact to the signal receiving interface of another module can signal transmission be achieved. Moreover, signal isolation is achieved through the forwarding of the processor of the present application and the isolation sub-circuit, thereby achieving the effect of preventing signal interference.

[0025] Exemplarily, the input signal contact is connected to the grid end for receiving the sampling signal of the voltage. Further, the input signal is a sampling signal. The processor amplifies the input signal and then inputs it to the isolation sub-circuit. The isolation sub-circuit then transmits the output signal to the microcontroller unit MCU through the output signal contact, that is, the output signal contact is connected to the communication pin of the microcontroller unit, so that the microcontroller unit can determine whether the voltage of the grid end is abnormal by identifying the output signal, so as to perform protection when the voltage is abnormal.

[0026] Exemplarily, the output signal contact can also be directly connected to the control switch. The input signal can be a control signal. The control signal is sent to the control switch through the processor and the isolation sub-circuit to achieve the control of the conduction or cut-off of the control switch. The control switch can be set in the equipment loop that needs to be protected to play a protective role.

[0027] Moreover, different types of input signals correspond to different types of processors to facilitate the forwarding and processing of the input signals. The types of input signals are divided into digital signals and analog signals. The processor corresponding to the analog signal is an operational amplifier, and the processor corresponding to the digital signal is a logic gate device.

[0028] Please refer to Figure 2 , Figure 2 which is the circuit diagram of a signal isolation circuit provided by an embodiment of the present application. As Figure 2As shown, when the input signal is the analog signal A, the processor corresponding to the analog signal is the operational amplifier U1. The circuit further includes a first resistor R1, a second resistor R2, and a first capacitor C1. Among them, the power supply terminal P10 of the operational amplifier is connected to the preset power supply VCC. One end of the first resistor R1 is connected to the preset ground GND1, and the other end of the first resistor is connected to the first input terminal P11 of the operational amplifier U1. One end of the second resistor is connected to the other end of the first resistor, and the other end of the second resistor is connected to the first output terminal P12 of the operational amplifier. One end of the first capacitor is connected to one end of the second resistor, and the other end of the first capacitor is connected to the other end of the second resistor. The second input terminal P13 of the operational amplifier serves as the signal receiving pin of the processor, and the first output terminal of the operational amplifier serves as the signal sending pin of the processor.

[0029] Among them, the grounding terminal P14 of the operational amplifier is connected to the preset ground.

[0030] That is to say, the input signal contact is the contact led out from the second input terminal of the operational amplifier, so that the input signal V0 is input to the second input terminal of the operational amplifier through the input signal contact. The first resistor R1 and the second resistor R2 are gain matching resistors responsible for providing gain. The first capacitor C1 is a compensation capacitor used to compensate the phase of the input signal for phase correction. The gain of the operational amplifier Then the signal output from the first output terminal of the operational amplifier Furthermore, it is realized to preliminarily amplify the input signal V0 to obtain V1 through the operational amplifier.

[0031] Please refer to Figure 3 , Figure 3 , which is the circuit diagram of another signal isolation circuit provided by the embodiment of the present application. As Figure 3 shown, when the input signal is the digital signal D, the processor corresponding to the digital signal is the logic gate device U2. The circuit further includes a third resistor R3. One end of the third resistor is connected to the power supply terminal P20 of the logic gate device, the power supply terminal of the logic gate device is connected to the preset power supply VCC, the other end of the third resistor is connected to the third input terminal P21 of the logic gate device, the fourth input terminal P22 of the logic gate device serves as the signal receiving pin of the processor, and the second output terminal P23 of the logic gate device serves as the signal sending pin of the processor.

[0032] Among them, the ground terminal P24 of the logic gate device is connected to a preset ground. The logic gate device U2 is a buffer gate device, which can be understood as an in-phase buffer and driver, and has the functions of three-state output and integrated voltage conversion. Among them, the third input terminal of the logic gate device can be understood as an enable terminal, and the enable terminal is connected to a preset power supply through a third resistor to activate the logic gate device so that the logic gate device starts to work.

[0033] That is to say, when a high-level signal is received at the third input terminal of the logic gate device, the logic gate device starts to work. At this time, if an input signal D is received at the fourth input terminal of the logic gate device, the signal is output through the second output terminal of the logic gate device. Specifically, when a high-level signal is received at the third input terminal of the logic gate device, if a high-level signal is received at the fourth input terminal of the logic gate device, a high-level signal is output at the second output terminal of the logic gate device; if a low-level signal is received at the fourth input terminal of the logic gate device, a low-level signal is output at the second output terminal of the logic gate device. When a low-level signal is received at the third input terminal of the logic gate device, the logic gate device does not work, and no signal is output at the second output terminal of the logic gate device regardless of the input signal received at the fourth input terminal of the logic gate device.

[0034] That is to say, when the processor is an operational amplifier, the operational amplifier needs to be paired with a first resistor, a second resistor, and a first capacitor to achieve the functions of gain and phase correction of the operational amplifier, and the operational amplifier does not need to be enabled to be activated. Therefore, the first input terminal of the operational amplifier does not need to be paired with a third resistor to connect to a preset power supply to receive an enable signal. Therefore, the operational amplifier does not need a third resistor. When the processor is a logic gate device, since the logic gate device does not have the functions of gain and phase correction, the logic gate device does not need to be paired with a first resistor, a second resistor, and a first capacitor, but needs a third resistor to connect to a preset power supply to receive an enable signal to activate the logic gate device.

[0035] Such as Figure 2 and Figure 3 As shown, the circuit further includes a fourth resistor R4, a first inductor L1, a second capacitor C2, and a third capacitor C3. Among them, the fourth resistor is arranged between the signal receiving pin of the processor and the input signal contact, the first inductor is arranged between the preset power supply and the power supply terminal of the processor, one end of the second capacitor is connected to the preset power supply, one end of the third capacitor is connected to the power supply terminal of the processor, and the other ends of the second capacitor and the third capacitor are both connected to the preset ground.

[0036] Among them, the fourth resistor set between the signal receiving pin of the processor and the input signal contact is a matching resistor, which can avoid signal distortion and play a role in voltage division. The first inductor is used to prevent electromagnetic interference, and the first inductor can also be set as a bead. The second capacitor and the third capacitor are filter capacitors at the power supply end of the processor, which are used to provide a filtered voltage to the processor. The preset ground is the ground terminal corresponding to the input signal, that is, the ground terminal of the circuit where the input signal is located is used as the preset ground to prevent interference to the input signal. The preset power supply is the corresponding preset power supply of the circuit where the input signal is located, which plays a role in preventing external power supply from interfering with the input signal.

[0037] As Figure 2 and Figure 3 shown, the circuit further includes a signal amplification sub-circuit 103 and a power supply sub-circuit 104. The first connection end of the signal amplification sub-circuit is connected to the power supply sub-circuit. The second connection end of the signal amplification sub-circuit is connected to the signal transmission pin of the processor. The third connection end of the signal amplification sub-circuit is connected to one end of the isolation sub-circuit. The first connection end of the input side of the isolation sub-circuit is connected to the power supply sub-circuit. The second connection end of the input side of the isolation sub-circuit is used as one end of the isolation sub-circuit. The third connection end of the output side of the isolation sub-circuit is connected to the target power supply VDD. The fourth connection end of the output side of the isolation sub-circuit is used as the other end of the isolation sub-circuit.

[0038] Among them, the signal amplification sub-circuit is a push-pull circuit to improve the output power of the processor output signal V1, so as to play the functions of reducing distortion, reducing power consumption and improving reliability. The power supply sub-circuit is used to supply electrical energy to the isolation sub-circuit and the signal amplification sub-circuit.

[0039] Specifically, as Figure 2 and Figure 3 shown, the signal amplification sub-circuit 103 includes a first control switch Q1, a second control switch Q2, a fifth resistor R5, a sixth resistor R6 and a seventh resistor R7. One end of the fifth resistor is used as the first connection end of the signal amplification sub-circuit. The other end of the fifth resistor is connected to the first connection end of the first control switch. One end of the sixth resistor is used as the second connection end of the signal amplification sub-circuit. The other end of the sixth resistor is connected to the control end of the first control switch and the control end of the second control switch. The second connection end of the first control switch and the first connection end of the second control switch are connected and used as the third connection end of the signal amplification sub-circuit. The second connection end of the second control switch is connected to one end of the seventh resistor. The other end of the seventh resistor is connected to the preset ground.

[0040] Among them, the first control switch is an NPN-type triode, and the second control switch is a PNP-type triode. The first connection end of the first control switch is the collector of the NPN-type triode, the control end of the first control switch is the base of the NPN-type triode, and the second connection end of the first control switch is the emitter of the NPN-type triode; the first connection end of the second control switch is the emitter of the PNP-type triode, the control end of the second control switch is the base of the PNP-type triode, and the second connection end of the second control switch is the collector of the PNP-type triode. The fifth resistor is a matching resistor, which plays a role in avoiding signal distortion and realizing voltage division. The sixth resistor is a current-limiting resistor, which prevents excessive current from flowing into the control switch, and the power consumption of the circuit can also be reduced by adjusting the resistance value of the sixth resistor. The seventh resistor is a voltage-dividing resistor, which plays a role in protecting the second control switch.

[0041] Specifically, when the signal output by the processor is a high-level signal, the first control switch is turned on and the second control switch is turned off; when the signal output by the processor is a low-level signal, the first control switch is turned off and the second control switch is turned on.

[0042] Such as Figure 2 and [[ID=^9]] Figure 3 As shown in [figures], the power supply sub-circuit 104 includes a fourth capacitor C4, a fifth capacitor C5 and a second inductor L2. Among them, one end of the fourth capacitor is connected to a preset power supply, one end of the fifth capacitor is connected to a preset voltage, the other ends of the fourth capacitor and the fifth capacitor are both connected to a preset ground, one end of the second inductor is connected to one end of the fifth capacitor, and the other end of the fifth capacitor is connected to the first connection end of the signal amplification sub-circuit.

[0043] Among them, both the fourth capacitor and the fifth capacitor are filter capacitors, which play a role in voltage stabilization and filtering. The second inductor is used to prevent electromagnetic interference, and the second inductor can also be set as a magnetic bead.

[0044] The isolation circuit includes an optocoupler U3, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a sixth capacitor C6, a seventh capacitor C7, and an eighth capacitor C8. Among them, one end of the eighth resistor is connected to one end of the ninth resistor as the first connection end on the input side of the isolation circuit. The other end of the ninth resistor is connected to one end of the sixth capacitor. The other end of the sixth capacitor and the other end of the eighth resistor are both connected to one end of the input side of the optocoupler. One end of the tenth resistor is used as the second connection end on the input side of the isolation circuit, and the other end of the tenth resistor is connected to the other end of the input side of the optocoupler. One end of the seventh capacitor and one end of the eighth capacitor are connected together as the third connection end on the output side of the isolation circuit. The other end of the seventh capacitor and the other end of the eighth capacitor are both connected to the target ground. One end of the output side of the optocoupler is connected to the target power supply. The other end of the output side of the optocoupler is used as the fourth connection end on the output side of the isolation circuit. One end of the eleventh resistor is connected to the other end of the output side of the optocoupler, and the other end of the eleventh resistor is connected to the target ground GND2.

[0045] Among them, one end of the input side of the optocoupler is the anode of the input side of the optocoupler, and the other end of the input side of the optocoupler is the cathode of the input side of the optocoupler. One end of the output side of the optocoupler is the collector of the output side of the optocoupler, and the other end of the output side of the optocoupler is the emitter of the output side of the optocoupler. The eighth resistor is a current-limiting resistor to prevent excessive current from entering the optocoupler and can also reduce the power consumption of the circuit by adjusting the resistance value of the eighth resistor. The ninth resistor and the sixth capacitor are used as coupling compensation devices to stabilize the signal input to the anode of the input side of the optocoupler.

[0046] Among them, the tenth resistor and the eleventh resistor are both matching resistors to avoid signal distortion and play a role in voltage division. The seventh capacitor and the eighth capacitor are filter capacitors to filter the target power supply. The target power supply is the power supply of the circuit to which the output signal contact is connected, and the target ground is the grounding end of the circuit to which the output signal contact is connected to prevent interference with the output signal output by the isolation circuit. If the output signal contact is connected to a microcontroller unit MCU, the target power supply is the power supply of the circuit where the MCU is located, and the target ground is the grounding end of the circuit where the MCU is located.

[0047] The type of the optocoupler corresponds to the type of the input signal. Among them, the input signal includes a digital signal and an analog signal. The optocoupler corresponding to the analog signal is a linear optocoupler, and the optocoupler corresponding to the digital signal is a high-speed optocoupler.

[0048] That is to say, when the input signal is an analog signal, a linear optocoupler is selected for the optocoupler in the isolation sub-circuit to meet the requirement of linearly amplifying and adjusting the analog signal within the allowable current transfer ratio (CTR) range; when the input signal is a digital signal, a high-speed optocoupler is selected for the optocoupler in the isolation sub-circuit to meet the requirement of transmission rate, achieve the purpose of fast control and protection, and have high transmission efficiency.

[0049] Furthermore, when the first control switch is turned on and the second control switch is turned off, the diode on the input side of the optocoupler is not turned on. Thus, the output side of the optocoupler is also not turned on, and the output signal sent by the other end of the output side of the optocoupler to the output signal contact is a low-level signal; when the first control switch is turned off and the second control switch is turned on, the diode on the input side of the optocoupler is turned on. Thus, the output side of the optocoupler is turned on, and the output signal sent by the other end of the output side of the optocoupler to the output signal contact is a high-level signal. The purpose of sending a signal to the signal receiving interface of the module connected to the output signal contact is achieved.

[0050] Among them, the number of the input signal contacts, the number of the signal receiving pins, the number of the signal sending pins, the number of the signal amplification sub-circuits, the number of the isolation sub-circuits, and the number of the output signal contacts are all multiple. Among them, one input signal contact is used to receive one input signal, one signal receiving pin leads out one input signal contact correspondingly, one signal sending pin is correspondingly connected to the second connection end of one signal amplification sub-circuit, the third connection end of one signal amplification sub-circuit is correspondingly connected to the second connection end of the input side of one isolation sub-circuit, and the fourth connection end of the output side of one isolation sub-circuit leads out one output signal contact correspondingly.

[0051] That is to say, the signal receiving pins of the processor include multiple ones, and each signal receiving pin leads out one input signal contact to receive one input signal through this input signal contact. When all the input signals are analog signals, the processor is an integrated circuit including multiple operational amplifiers. The number of the first input terminals, the second input terminals, and the first output terminals of the operational amplifiers in the integrated circuit is at least the number of the input signals. And, the second input terminal of each operational amplifier leads out to be used as one input signal contact, the first input terminal of each operational amplifier is correspondingly connected to a first resistor, a second resistor, and a first capacitor to achieve gain and phase adjustment, and the first output terminal of each operational amplifier is connected to the second connection end of one signal amplification sub-circuit.

[0052] When the input signals are all digital signals, the processor is an integrated circuit including multiple logic gate devices. The third input terminal of the logic gate devices in the integrated circuit can have only one to implement enabling. The number of the fourth input terminals and the second output terminals of the logic gate devices is at least the number of input signals. Moreover, the fourth input terminal of each logic gate device is led out as an input signal contact, and the second output terminal of each logic gate device is connected to the second connection terminal of a signal amplification sub-circuit.

[0053] Each signal amplification sub-circuit includes a first control switch, a second control switch, a fifth resistor, a sixth resistor, and a seventh resistor to implement the functions of reducing distortion, lowering power consumption, and improving reliability. The first connection terminal of each signal amplification sub-circuit is connected to a power supply sub-circuit, the second connection terminal of each signal amplification sub-circuit is connected to a signal transmission pin of the processor, and the third connection terminal of each signal amplification sub-circuit is connected to the second connection terminal of the input side of an isolation sub-circuit.

[0054] Furthermore, the isolation sub-circuit includes multiple ones, or an integrated circuit including multiple opto-couplers is selected. The first connection terminal of the input side of an isolation sub-circuit is connected to a power supply sub-circuit, the second connection terminal of the input side of an isolation sub-circuit is correspondingly connected to the third connection terminal of a signal amplification sub-circuit, the third connection terminal of the output side of an isolation sub-circuit is connected to a target power supply, and the fourth connection terminal of the output side of an isolation sub-circuit is led out as an output signal contact.

[0055] Furthermore, when it is necessary to transmit multiple communication signals (such as USART, SPI) or multiple analog signals, the signal amplification and isolation functions of signal transmission can be achieved by increasing the signal receiving pins and signal output pins of the processor, as well as replicating and expanding the number of signal amplification sub-circuits and isolation sub-circuits, without being affected by the number of input signals, with simple devices and lower costs.

[0056] In specific implementation, the circuit of the present application is anti-interference by setting opto-couplers, is not affected by signals such as photovoltaic, inverter, wireless, etc., and can increase the transmission distance. When implementing signal detection, control, transmission between high voltage and low voltage in an energy storage system or signal detection, control, transmission between ecosystem, it has a better response speed and can prevent interference, playing a better role in protecting the normal use of the product. Moreover, the design of the circuit is simple, reliable, has good compatibility, and low costs. The present application can not only be applied to module communication within an energy storage system, but can also be used in any occasion where signal transmission is required.

[0057] In the description of the present application, it should be noted that the orientation or positional relationship indicated by terms such as "inner" and "outer" is based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the product of this application is usually placed during use. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present application. In addition, terms such as "first" and "second" are only used for distinguishing descriptions and cannot be construed as indicating or implying relative importance.

[0058] It should also be noted that unless otherwise clearly specified and defined, the terms "arranged" and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected, or indirectly connected through an intermediate medium, and it can be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0059] The above are only the embodiments of the present application and are not used to limit the protection scope of the present application. For those skilled in the art, the present application can have various changes and modifications. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A signal isolation circuit, characterized in that, The circuit includes: An input signal contact for receiving an input signal; A processor, with a signal receiving pin of the processor led out as the input signal contact, and the type of the processor corresponding to the type of the input signal; An isolation sub-circuit, with one end of the isolation sub-circuit connected to the signal sending pin of the processor; An output signal contact, led out from the other end of the isolation sub-circuit as the output signal contact for sending the output signal output by the isolation sub-circuit; Wherein, the circuit further includes a signal amplification sub-circuit and a power supply sub-circuit. A first connection end of the signal amplification sub-circuit is connected to the power supply sub-circuit, a second connection end of the signal amplification sub-circuit is connected to the signal sending pin of the processor, and a third connection end of the signal amplification sub-circuit is connected to one end of the isolation sub-circuit.

2. The circuit according to claim 1, wherein The input signal includes an analog signal, and the processor corresponding to the analog signal is an operational amplifier. The circuit further includes a first resistor, a second resistor, and a first capacitor. Wherein, a power supply terminal of the operational amplifier is connected to a preset power supply, one end of the first resistor is connected to a preset ground, the other end of the first resistor is connected to a first input terminal of the operational amplifier, one end of the second resistor is connected to the other end of the first resistor, the other end of the second resistor is connected to a first output terminal of the operational amplifier, one end of the first capacitor is connected to one end of the second resistor, and the other end of the first capacitor is connected to the other end of the second resistor. A second input terminal of the operational amplifier serves as the signal receiving pin of the processor, and the first output terminal of the operational amplifier serves as the signal sending pin of the processor.

3. The circuit according to claim 1, wherein The input signal includes a digital signal, and the processor corresponding to the digital signal is a logic gate device. The circuit further includes a third resistor. One end of the third resistor is connected to a power supply terminal of the logic gate device, the power supply terminal of the logic gate device is connected to a preset power supply, and the other end of the third resistor is connected to a third input terminal of the logic gate device. A fourth input terminal of the logic gate device serves as the signal receiving pin of the processor, and a second output terminal of the logic gate device serves as the signal sending pin of the processor.

4. The circuit according to any one of claims 1 to 3, characterized in that The circuit further includes a fourth resistor, a first inductor, a second capacitor, and a third capacitor. Wherein, the fourth resistor is arranged between the signal receiving pin of the processor and the input signal contact, and the first inductor is arranged between the preset power supply and the power supply terminal of the processor. One end of the second capacitor is connected to the preset power supply, one end of the third capacitor is connected to the power supply terminal of the processor, and the other ends of the second capacitor and the third capacitor are both connected to the preset ground.

5. The circuit according to claim 1, wherein A first connection end on the input side of the isolation sub-circuit is connected to the power supply sub-circuit, a second connection end on the input side of the isolation sub-circuit serves as one end of the isolation sub-circuit, a third connection end on the output side of the isolation sub-circuit is connected to a target power supply, and a fourth connection end on the output side of the isolation sub-circuit serves as the other end of the isolation sub-circuit.

6. The circuit according to claim 1, wherein The signal amplification sub - circuit includes a first control switch, a second control switch, a fifth resistor, a sixth resistor, and a seventh resistor. One end of the fifth resistor serves as the first connection end of the signal amplification sub - circuit. The other end of the fifth resistor is connected to the first connection end of the first control switch. One end of the sixth resistor serves as the second connection end of the signal amplification sub - circuit. The other end of the sixth resistor is connected to the control end of the first control switch and the control end of the second control switch. The second connection end of the first control switch and the first connection end of the second control switch are connected and serve as the third connection end of the signal amplification sub - circuit. The second connection end of the second control switch is connected to one end of the seventh resistor, and the other end of the seventh resistor is connected to a preset ground.

7. The circuit according to claim 1, wherein The power supply sub - circuit includes a fourth capacitor, a fifth capacitor, and a second inductor. Among them, one end of the fourth capacitor is connected to a preset power supply, one end of the fifth capacitor is connected to a preset voltage, the other ends of the fourth capacitor and the fifth capacitor are both connected to a preset ground. One end of the second inductor is connected to one end of the fifth capacitor, and the other end of the fifth capacitor is connected to the first connection end of the signal amplification sub - circuit.

8. The circuit according to claim 5, characterized in that, The isolation sub - circuit includes an opto - coupler, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a sixth capacitor, a seventh capacitor, and an eighth capacitor. Among them, one end of the eighth resistor and one end of the ninth resistor are connected and serve as the first connection end of the input side of the isolation sub - circuit. The other end of the ninth resistor is connected to one end of the sixth capacitor. The other end of the sixth capacitor and the other end of the eighth resistor are both connected to one end of the input side of the opto - coupler. One end of the tenth resistor serves as the second connection end of the input side of the isolation sub - circuit. The other end of the tenth resistor is connected to the other end of the input side of the opto - coupler. One end of the seventh capacitor and one end of the eighth capacitor are connected and serve as the third connection end of the output side of the isolation sub - circuit. The other ends of the seventh capacitor and the eighth capacitor are both connected to a target ground. One end of the output side of the opto - coupler is connected to the target power supply. The other end of the output side of the opto - coupler serves as the fourth connection end of the output side of the isolation sub - circuit. One end of the eleventh resistor is connected to the other end of the output side of the opto - coupler, and the other end of the eleventh resistor is connected to the target ground.

9. The circuit according to claim 8, characterized in that, The type of the opto - coupler corresponds to the type of the input signal. Among them, the input signal includes a digital signal and an analog signal. The opto - coupler corresponding to the analog signal is a linear opto - coupler, and the opto - coupler corresponding to the digital signal is a high - speed opto - coupler.

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