Current sharing control circuit, power supply device and energy storage equipment

Abstract

The utility model provides a current sharing control circuit, a power supply device and an energy storage device, the current sharing control circuit is applied to a branch circuit formed by connecting a plurality of power circuits in parallel, and the current sharing control circuit comprises a control module, a delay adjustment module and a logic module. The control module is connected with the power circuit and the control end of the delay adjustment module, the input end of the delay adjustment module and the first input end of the logic module are connected with original driving signals of the power circuit, the output end of the delay adjustment module is connected with the second input end of the logic module, and the output end of the logic module is connected with the power circuit. The current-sharing control circuit adjusts the duty ratio of the original driving signal based on the current of the power circuit so as to adjust the current of the power circuit, and the current-sharing control circuit is subsequently applied to a plurality of power circuits connected in parallel, and can adjust the duty ratio of the original driving signal of each power circuit based on the circuit of each power circuit so as to adjust the current of the power circuit. Therefore, each power circuit can work based on the corresponding actual driving signal, and the current sharing control of each power circuit is realized.

Description

Technical Field

[0001] The embodiments of the utility model relate to the technical field of electronic circuits, and in particular to a current sharing control circuit, a power supply device and an energy storage device. Background Art

[0002] With the development of power electronics technology, the power of electrical equipment is gradually increasing, and the requirements for the output power of switching power supplies are getting higher and higher. Since a single high-power power supply module directly affects the normal operation of the entire system when power supply anomalies occur, the importance of switching power supply parallel technology is gradually increasing. The use of multiple small and medium-sized modules in parallel to replace a single high-power module has become the development direction of power supply systems. However, during the parallel connection of circuits, due to the parameter differences of the power devices themselves or the PCB routing conditions, the output currents of the two parallel circuits are unbalanced. For example, some parallel branches have a large output current, while some parallel branches have a small output current, resulting in uneven current distribution. Utility Model Content

[0003] The embodiments of the present invention provide a current balancing control circuit, a power supply device and an energy storage device, which can adjust the duty cycle of the original drive signal based on the current of the power circuit, and are subsequently applied to parallel power circuits to achieve the purpose of balancing the current of the parallel power circuits.

[0004] In a first aspect, an embodiment of the present invention provides a current sharing control circuit, which is applied to a branch of multiple power circuits connected in parallel. The current sharing control circuit includes a control module, a delay adjustment module, and a logic module. The control module is respectively connected to the control ends of the power circuit and the delay adjustment module, the input end of the delay adjustment module and the first input end of the logic module are both connected to the original drive signal of the power circuit, the output end of the delay adjustment module is connected to the second input end of the logic module, and the output end of the logic module is connected to the power circuit. The control module is configured to determine the control signal based on the current of the power circuit. The delay adjustment module is configured to adjust the delay time based on the control signal, and delay the original drive signal according to the adjusted delay time to obtain a delayed signal. The logic module is configured to adjust the duty cycle of the original drive signal based on the original drive signal and the delayed signal, and use the original drive signal after adjusting the duty cycle as the actual drive signal of the power circuit.

[0005] In some embodiments, the delay adjustment module includes a delay unit and a gating unit; the delay unit has multiple delay channels with different preset delay times, and the delay channels are all connected to the original driving signal. The gating unit is respectively connected to the control module, the second input end of the logic module and each of the delay channels; the delay channel is configured to delay the original driving signal according to the preset delay time to obtain the delayed original driving signal; the gating unit is configured to use the delayed original driving signal output by one of the delay channels as the delayed signal based on the control signal.

[0006] In some embodiments, the delay unit includes M cascaded buffers, where M is an integer greater than or equal to 2; the input end of the first buffer is respectively connected to the first input end of the gating unit and the original driving signal, the input end of the mth buffer is respectively connected to the mth input end of the gating unit and the output end of the m-1th buffer, and the output end of the Mth buffer is connected to the M+1th input end of the gating unit, where m is an integer greater than or equal to 2, and m≤M.

[0007] In some embodiments, the selection unit includes a channel selector; the first input end of the channel selector is respectively connected to the input end of the first buffer and the original driving signal, the mth input end of the channel selector is respectively connected to the input end of the mth buffer and the output end of the m-1th buffer, the M+1th input end of the channel selector is connected to the output end of the Mth buffer, the output end of the channel selector is connected to the second input end of the logic module, and the control end of the channel selector is connected to the control module.

[0008] In some embodiments, the channel selector is an eight-channel selector.

[0009] In some embodiments, the logic module includes an AND gate; a first input terminal of the AND gate is connected to the original driving signal, a second input terminal of the AND gate is connected to the output terminal of the delay adjustment module, and an output terminal of the AND gate is connected to the power circuit.

[0010] In some embodiments, the current sharing control circuit further includes a current sampling module; the current sampling module is respectively connected to the control module and the power circuit; the current sampling module is configured to sample the current of the power circuit and output a sampling signal to the control module; the control module is configured to determine the current of the power circuit based on the sampling signal.

[0011] In the second aspect, an embodiment of the utility model provides a power supply device, which includes multiple power circuits and a current balancing control circuit as described in any one of the first aspects, arranged in each power circuit; the power circuits correspond one-to-one to the current balancing control circuits, and the output end of the logic module in the current balancing control circuit is connected to the corresponding power circuit.

[0012] In some embodiments, the power circuit includes a switch module; the output end of each logic module in the current sharing control circuit is connected to the corresponding switch module.

[0013] In a third aspect, an embodiment of the present invention provides an energy storage device, which includes: a load; a power supply device as described in any embodiment of the second aspect, wherein the power supply device is connected to the load and is used to supply power to the load.

[0014] Compared with the prior art, the beneficial effects of the present invention are as follows: Different from the prior art, the present invention provides a current sharing control circuit, a power supply device and an energy storage device. The current sharing control circuit is applied to a branch of multiple power circuits in parallel, and the current sharing control circuit includes a control module, a delay adjustment module and a logic module. The control module is respectively connected to the control ends of the power circuit and the delay adjustment module, the input end of the delay adjustment module and the first input end of the logic module are both connected to the original drive signal of the power circuit, the output end of the delay adjustment module is connected to the second input end of the logic module, and the output end of the logic module is connected to the power circuit. The current sharing control circuit adjusts the duty cycle of the original drive signal based on the current of the power circuit to adjust the current of the power circuit. It is subsequently applied to multiple power circuits in parallel, and the duty cycle of the original drive signal of each power circuit can be adjusted based on the circuit of each power circuit, so that each power circuit can work based on the corresponding actual drive signal, thereby realizing current sharing control of each power circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] One or more embodiments are exemplarily described by pictures in the corresponding drawings. These exemplified descriptions do not constitute limitations on the embodiments. Elements / modules and steps with the same reference numerals in the drawings are represented as similar elements / modules and steps. Unless otherwise stated, the figures in the drawings do not constitute a scale limitation.

[0016] Figure 1 This is a structural block diagram of a current sharing control circuit provided by an embodiment of the present utility model;

[0017] Figure 2 This is a circuit diagram of a current sharing control circuit provided by an embodiment of the present utility model;

[0018] Figure 3This is a schematic diagram of an original driving signal, an actual driving signal and an address signal provided by an embodiment of the present utility model;

[0019] Figure 4 This is a structural block diagram of a power supply device provided by an embodiment of the present utility model;

[0020] Figure 5 This is a structural block diagram of another power supply device provided by an embodiment of the present utility model. DETAILED DESCRIPTION

[0021] The present invention will be described in detail below with reference to specific embodiments. The following embodiments will help those skilled in the art further understand the present invention, but are not intended to limit the present invention in any way. It should be noted that a person skilled in the art may make various modifications and improvements without departing from the scope of the present invention. These modifications and improvements are all within the scope of protection of the present invention.

[0022] To facilitate understanding of the present invention, the present invention is described in more detail below in conjunction with the accompanying drawings and specific embodiments. Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as those commonly understood by those skilled in the art to which this invention pertains. The terms used in this specification are intended solely for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" as used in this specification includes any and all combinations of one or more of the related listed items.

[0023] It should be noted that, unless they conflict, the various features of the embodiments of the present invention may be combined with each other and are all within the scope of protection of the present invention. Furthermore, although the functional modules are divided in the device schematic, in some cases, the module division may be different from that in the device. Furthermore, the terms "first," "second," and the like used herein do not limit the order of data or execution; they are merely used to distinguish between identical or similar items with substantially the same functions and effects.

[0024] In power supply products, due to the performance limitations of the power devices themselves, in order to achieve high-power circuits, it is often necessary to design multiple power devices in parallel. However, during the parallel connection process, due to differences in the parameters of the power devices themselves or the layout of the printed circuit board, there are differences in the output current of the two parallel circuits or the temperature of the devices themselves. In order to make the product work reliably, it is necessary to use power devices with larger margins, which increases the cost of the product and prevents the power circuit with smaller current from being fully utilized. Currently, digital signal processors (DSPs) and high-performance microcontroller units (MCUs) with built-in multiple high-precision pulse width modulation (PWM) modules can be used to achieve current sharing regulation, but they are relatively expensive and have a limited range of applicable scenarios, making them unusable.

[0025] In order to improve the above-mentioned technical problems, the embodiments of the present invention provide a current sharing control circuit, a power supply device and an energy storage device, which adjusts the current of the power circuit by adjusting the duty cycle of the original drive signal based on the current of the power circuit. Subsequently, it is applied to multiple power circuits in parallel, and the duty cycle of the original drive signal of each power circuit can be adjusted based on the circuit of each power circuit, so that each power circuit can operate based on the corresponding actual drive signal, adjust the current of each power circuit, and realize current sharing control of each power circuit. There is no need to use an MCU or other switching power supply control chip with a high-precision PWM module, which can reduce the circuit cost.

[0026] In the first aspect, the embodiment of the present invention provides a current sharing control circuit, which is applied to a branch of multiple power circuits connected in parallel. Figure 1 The current sharing control circuit includes a control module 10 , a delay adjustment module 20 and a logic module 30 .

[0027] The control module 10 is connected to the control end of the power circuit and the delay adjustment module 20 respectively. The input end of the delay adjustment module 20 and the first input end of the logic module 30 are both connected to the original driving signal signal1 of the power circuit. The output end of the delay adjustment module 20 is connected to the second input end of the logic module 30, and the output end of the logic module 30 is connected to the power circuit.

[0028] The control module 10 is configured to determine a control signal based on the current of the power circuit. The delay adjustment module 20 is configured to adjust the delay time based on the control signal and delay the original drive signal signal1 according to the adjusted delay time to obtain a delayed signal. The logic module 30 is configured to adjust the duty cycle of the original drive signal signal1 based on the original drive signal signal1 and the delayed signal, and use the original drive signal signal1 with the adjusted duty cycle as the actual drive signal signal2 of the power circuit.

[0029] A power circuit is a circuit used for energy conversion in energy storage devices and other electronic power equipment. It converts electrical energy from one form (such as AC) to another (such as DC), such as an AC-DC circuit, a DC-DC circuit, or a DC-AC circuit. Alternatively, a power circuit can be used to regulate parameters such as voltage and current. For example, a power circuit can be a step-down circuit, a step-up circuit, or a step-up / step-down circuit. When connected in parallel, each power circuit can independently power a load.

[0030] The control module 10 may include an MCU or a Field-Programmable Gate Array (FPGA).

[0031] The original driving signal signal1 may be a PWM signal, and the duty cycle refers to the ratio of the time the signal is at a high level (or valid state) to the total time of the cycle within one cycle.

[0032] The delay adjustment module 20 may include devices such as counters, capacitors, and timers that can be used to delay signals. After receiving the control signal, it will determine the delay time corresponding to the control signal and delay the original driving signal signal1 based on the delay time to obtain a delayed signal.

[0033] In this current sharing control circuit, when the control module 10 is connected to the power circuit, the current of the power circuit can be monitored and a corresponding control signal can be generated according to the magnitude of the current; after receiving the control signal, the delay adjustment module 20 will determine the delay time and delay the original drive signal signal1 according to the delay time to obtain a delayed signal; after receiving the original drive signal signal1 and the delay signal from the delay adjustment module 20, the logic module 30 will adjust the duty cycle of the original drive signal signal1 according to the logical relationship between the two signals, thereby obtaining the actual drive signal signal2, wherein the actual drive signal signal2 is also a PWM signal.

[0034] Specifically, among multiple power circuits connected in parallel, for a power circuit with a larger current, the delay time determined by the delay adjustment module 20 based on the control signal is longer, so that the duty cycle of the actual drive signal signal2 is smaller than the original drive signal signal1. After the power circuit receives the actual drive signal signal2, it will reduce the on-time of the switch module or increase the off-time of the switch module, thereby reducing the current of the power circuit.

[0035] It can be seen that the current sharing control circuit can adjust the duty cycle of the original drive signal signal1 based on the current of the power circuit to adjust the current of the power circuit. Subsequently, it can be applied to multiple power circuits in parallel. The duty cycle of the original drive signal signal1 can be adjusted for each power circuit based on the circuit of each power circuit, so that each power circuit can work based on the corresponding actual drive signal signal2 to adjust the current of each power circuit, realize current sharing control of each power circuit, and reduce problems such as equipment overheating and efficiency reduction caused by uneven current distribution.

[0036] In some of these embodiments, see Figure 2 The delay adjustment module 20 includes a delay unit 21 and a gating unit 22. The delay unit 21 has multiple delay channels with different preset delay times, each of which is connected to the original drive signal signal1. The gating unit 22 is respectively connected to the control module 10, the second input terminal of the logic module 30, and each delay channel. The delay channel is configured to delay the original drive signal signal1 according to the preset delay time to obtain the delayed original drive signal signal1. The gating unit 22 is configured to use the delayed original drive signal signal1 output by one of the delay channels as the delayed signal based on the control signal.

[0037] The delay unit 21 includes multiple different delay channels, each of which has a preset delay time. The delay channels may include capacitors, resistors, inductors, or more complex digital logic circuits (such as counters and timers) that can implement signal time delay.

[0038] The gating unit 22 may include devices such as a multiplexer, a switch tube, etc. After receiving the control signal, the gating unit 22 selects a signal output from one of the delay channels as the delay signal, and the preset delay time of the delay channel is the delay time corresponding to the control signal.

[0039] Specifically, when the original drive signal signal 1 enters the delay unit 21, the original drive signal signal 1 is simultaneously sent to all delay channels. Each delay channel processes the signal according to its preset delay time, resulting in different time delays for the signal after passing through different channels. In this way, the signal output from each delay channel is a delayed signal of the original signal, but with different delay times. After receiving the control signal, the selection unit 22 establishes a connection between the corresponding delay channel and the second input terminal of the logic module 30. In this way, the signal output from the delay channel is output to the logic module 30, so that the delay adjustment module 20 can change the delay time of the original drive signal signal 1 based on the control signal and output the delayed signal to the logic module 30.

[0040] It can be seen that in the delay adjustment module 20, through the cooperation of the delay unit 21 and the gating unit 22, the delay time of the original driving signal signal1 can be flexibly adjusted based on the control signal to ensure normal operation of the circuit.

[0041] In some embodiments, the delay unit 21 includes M cascaded buffers, where M is an integer greater than or equal to 2. The input end of the first buffer is respectively connected to the first input end of the gating unit 22 and the original driving signal signal1, the input end of the m-th buffer is respectively connected to the m-th input end of the gating unit 22 and the output end of the m-1-th buffer, and the output end of the M-th buffer is connected to the M+1-th input end of the gating unit 22, where m is an integer greater than or equal to 2, and m≤M.

[0042] A buffer is a device that delays the input signal for a certain period of time before outputting it. Figure 2The delay unit 21 includes 7 cascaded buffers (U11, U12, ..., U17), and the delay time of each buffer (U11, U12, ..., U17) is the same. Among them, the input end of the first buffer U11 is respectively connected to the first input end of the gating unit 22 and the original driving signal signal1, the input end of the second buffer U12 is respectively connected to the second input end of the gating unit 22 and the output end of the first buffer U11, the input end of the third buffer U13 is respectively connected to the third input end of the gating unit 22 and the output end of the second buffer U12, and the input end of the fourth buffer U13 is respectively connected to the third input end of the gating unit 22 and the output end of the second buffer U12. The input end of the buffer U14 is respectively connected to the fourth input end of the selection unit 22 and the output end of the third buffer U13, the input end of the fifth buffer U15 is respectively connected to the fifth input end of the selection unit 22 and the output end of the fourth buffer U14, the input end of the sixth buffer U16 is respectively connected to the sixth input end of the selection unit 22 and the output end of the fifth buffer U15, the input end of the seventh buffer U17 is respectively connected to the seventh input end of the selection unit 22 and the output end of the sixth buffer U16, and the output end of the seventh buffer U17 is connected to the eighth input end of the selection unit 22.

[0043] In this current sharing control circuit, if the gating unit 22 chooses to establish a connection between the first input end of the gating unit 22 and the output end of the gating unit 22, the original drive signal signal1 will be directly output through the gating unit 22. At this time, the delayed signal is consistent with the original drive signal signal1. If the gating unit 22 chooses to establish a connection between the eighth input end of the gating unit 22 and the output end of the gating unit 22, the original drive signal signal1 will pass through these seven buffers in sequence and be output. At this time, the delay time is the sum of the delay times of the seven buffers.

[0044] In this embodiment, the delay time can be adjusted by selecting the number of buffers through the gating unit 22 , so that the original driving signal signal1 can be delayed according to different delay times.

[0045] In some embodiments, the gating unit 22 includes a channel selector. A first input terminal of the channel selector is respectively connected to an input terminal of the first buffer and the original driving signal signal1, an m-th input terminal of the channel selector is respectively connected to an input terminal of the m-th buffer and an output terminal of the m-1-th buffer, an M+1-th input terminal of the channel selector is connected to an output terminal of the M-th buffer, an output terminal of the channel selector is connected to a second input terminal of the logic module 30, and a control terminal of the channel selector is connected to the control module 10.

[0046] For details, see Figure 2The channel selector is an eight-channel selector U2. The eight-channel selector U2 has eight input terminals and one output terminal. The first to seventh input terminals of the eight-channel selector U2 correspond to the seven buffers one by one, respectively. These seven input terminals are respectively connected to the input terminals of the corresponding buffers. The eighth input terminal of the eight-channel selector U2 is connected to the output terminal of the seventh buffer U17. The output terminal of the eight-channel selector U2 is connected to the second input terminal of the logic module 30. The control terminals (add0, add1, add2) of the eight-channel selector U2 are respectively connected to the control module 10. After receiving the control signal of the control module 10, the eight-channel selector U2 can establish a connection between one of the input terminals and the output terminal, so that the original drive signal signal1 is output to the logic module 30 through the selection unit 22.

[0047] Among them, the control signal is the address signal of the eight-channel selector U2, and the address signal is used to determine the connection between the input terminal and the output terminal of the eight-channel selector U2, so as to determine the delay of the original drive signal through several buffers. The control module 10 can pre-establish a lookup table, which stores the correspondence between the number of buffers and the delay time; after obtaining the current of the power circuit, the control module 10 determines the delay time required for the original drive signal signal1, finds the required number of buffers from the lookup table, and determines the corresponding address signal, and inputs the address signal to the eight-channel selector U2 through the control terminal add0, the control terminal add1 and the control terminal add2. The eight-channel selector U2 establishes a connection between a certain input terminal and an output terminal according to the address signal, so that the original drive signal is output after passing through the required number of buffers, thereby realizing the output of the original drive signal after the required delay time. As Figure 3 As shown, when the address signals of the control terminals add0, add1 and add2 change, the duty cycle of the actual driving signal signal2 is different from that of the original driving signal signal1, and the duty cycle reduction is equal to the product of the address number and the delay time of each buffer.

[0048] It should be noted that the eight-channel selector and eight buffers in the above embodiment are used merely as examples to facilitate understanding of the solution of the present application and do not constitute a limitation on the solution of the present application. Specifically, the number of channels of the selector and the number of buffers can be reasonably designed according to user needs.

[0049] Compared with the embodiment using multiple switches or complex logic gate circuits as the selection unit 22, this embodiment integrates the switching device into one component by setting a channel selector, reducing the number of components and connection complexity, thereby reducing design difficulty and cost.

[0050] In some of these embodiments, see Figure 2The logic module 30 includes an AND gate U3. A first input terminal of the AND gate U3 is connected to the original driving signal signal1, a second input terminal of the AND gate U3 is connected to the output terminal of the delay adjustment module 20, and an output terminal of the AND gate U3 is connected to the power circuit.

[0051] The AND gate U3 has multiple input terminals and one output terminal. Its logic function is that the output terminal is high only when all input terminals are high level. Otherwise, the output terminal is low level as long as one or more input terminals are low level.

[0052] In the logic module 30, the actual drive signal signal2 output by the AND gate U3 is high only when the original drive signal signal1 and the delayed signal are both high. When the original drive signal signal1 or the delayed signal is low, the actual drive signal signal2 output by the AND gate U3 is low. In this case, the AND gate U3 can delay the rising edge of the original drive signal signal1 without delaying the falling edge of the original drive signal signal1, so that the duty cycle of the actual drive signal signal2 is different from the duty cycle of the original drive signal signal1, thereby achieving the purpose of changing the duty cycle.

[0053] In some embodiments, the current sharing control circuit further includes a current sampling module. The current sampling module is connected to the control module 10 and the power circuit. The current sampling module is configured to sample the current of the power circuit and output a sampling signal to the control module 10. The control module 10 is configured to determine the current of the power circuit based on the sampling signal.

[0054] The current sampling module refers to a device that can be used to measure current in real time. It may include suitable sampling devices such as current sensors and current differential sampling circuits, which can convert current signals into sampling signals that can be recognized and processed by the control module 10. Its specific circuit structure can refer to the existing technology and is not limited here.

[0055] In this embodiment, by providing a current sampling module, the control module 10 can obtain current information of the power circuit.

[0056] In a second aspect, the present invention provides a power supply device. Figure 4 The power supply device includes a plurality of power circuits (210, 220, ..., 2N0) and a current sharing control circuit (101, 102, ..., 10N) according to any one of the embodiments of the first aspect, which is arranged in each power circuit; the power circuits (210, 220, ..., 2N0) correspond one-to-one to the current sharing control circuits (101, 102, ..., 10N), and the output ends of the logic modules in the current sharing control circuits (101, 102, ..., 10N) are connected to the corresponding power circuits (210, 220, ..., 2N0).

[0057] The power supply device refers to a device that can be used to output electrical energy. In this embodiment, the current sharing control circuit has the same structure and function as the current sharing control circuit described in any embodiment of the first aspect, and will not be described in detail here.

[0058] Specifically, in some embodiments, the control module in each current sharing control circuit may be the same control module. Figure 5 As shown, the power supply device includes two current sharing control circuits and two power circuits (210, 220), each current sharing control circuit includes a control module, a delay adjustment module and a logic module, and the control modules in the two current sharing control circuits are the same control module 100, and the control module 100 is respectively connected to the control end of the delay adjustment module 201 and the control end of the delay adjustment module 202 in the two current sharing control circuits, the input end of the delay adjustment module 201 and the first input end of the logic module 301 are both connected to the original drive signal signal11 of the power circuit 210, the output end of the delay adjustment module 201 is connected to the second input end of the logic module 301, and the output end of the logic module 301 is connected to the power circuit 210. Similarly, the input end of the delay adjustment module 202 and the first input end of the logic module 302 are both connected to the original drive signal signal12 of the power circuit 220, the output end of the delay adjustment module 202 is connected to the second input end of the logic module 302, and the output end of the logic module 302 is connected to the power circuit 220.

[0059] In the power supply device, first, the control module 100 receives the current sampling signals of the power circuit 210 and the power circuit 220 in parallel, and determines the current size of the power circuit 210 and the power circuit 220, and the current average value of the two power circuits, and compares and integrates the current size of the power circuit 210 and the power circuit 220 with the current average value, and determines the duty cycle adjustment amount of each power circuit, and calculates the delay time required for each power circuit based on the relationship between the duty cycle adjustment amount of each power circuit and the original duty cycle, and then calculates the delay time required for each power circuit based on the required delay time. Corresponding control signals are respectively output to corresponding delay adjustment modules (201, 202), so that the delay adjustment modules (201, 202) delay the output of corresponding original drive signals, and finally, actual drive signals having a different duty cycle from the original drive signals are outputted via corresponding logic modules (301, 302), so that power circuits with larger currents can reduce their currents based on the corresponding actual drive signals, and power circuits with smaller currents can increase their currents based on the corresponding actual drive signals, until the currents or temperatures of the two circuits are sufficiently close, and the duty cycle adjustment work is terminated, thereby achieving current sharing control of each power circuit.

[0060] In some embodiments, the power circuit includes a switch module; the output end of each logic module in the current sharing control circuit is connected to the corresponding switch module.

[0061] The switch module may include a power switch tube, which may be a suitable switching device such as a MOS tube or an IGBT tube. The switch module can be turned on or off based on an actual drive signal to adjust parameters such as the current of the power circuit. Its specific circuit structure can refer to the existing technology and is not limited here. In a power circuit, the longer the on-time or the shorter the off-time of the switch module, the greater the output current of the power circuit. The shorter the on-time or the longer the off-time of the switch module, the smaller the output current of the power circuit. Therefore, the duty cycle of the actual drive signal can be adjusted by using a current sharing control circuit to adjust the on-time or off-time of the switch module, thereby adjusting the output current of the power circuit.

[0062] In a third aspect, an embodiment of the present invention provides an energy storage device, which includes: a load, a power supply device as described in any embodiment of the second aspect, and the power supply device is connected to the load for supplying power to the load.

[0063] The energy storage device may be an inverter or other device, and the load may be a vehicle, a drone or other device. In this embodiment, the power supply device has the same structure and function as the power supply device described in any embodiment of the second aspect, and will not be repeated here.

[0064] It should be noted that the device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the modules may be selected based on actual needs to achieve the objectives of this embodiment.

[0065] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Under the idea of the present invention, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations in different aspects of the present invention as described above. For the sake of simplicity, they are not provided in detail. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the above embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A current sharing control circuit, characterized in that: Applicable to a branch of multiple power circuits connected in parallel, the current sharing control circuit includes a control module, a delay adjustment module and a logic module; The control module is connected to the control end of the power circuit and the delay adjustment module respectively, the input end of the delay adjustment module and the first input end of the logic module are both connected to the original driving signal of the power circuit, the output end of the delay adjustment module is connected to the second input end of the logic module, and the output end of the logic module is connected to the power circuit; The control module is configured to determine a control signal based on the current of the power circuit; The delay adjustment module is configured to adjust the delay time based on the control signal, and delay-process the original driving signal according to the adjusted delay time to obtain a delayed signal; The logic module is configured to adjust the duty cycle of the original driving signal based on the original driving signal and the delayed signal, and use the original driving signal after the duty cycle is adjusted as the actual driving signal of the power circuit.

2. The current sharing control circuit according to claim 1, wherein: The delay adjustment module includes a delay unit and a gating unit; The delay unit has a plurality of delay channels with different preset delay times, each of the delay channels is connected to the original driving signal, and the gating unit is respectively connected to the control module, the second input end of the logic module and each of the delay channels; The delay channel is configured to perform delay processing on the original driving signal according to a preset delay time to obtain a delayed original driving signal; The gating unit is configured to use the delayed original driving signal output by one of the delay channels as the delayed signal based on the control signal.

3. The current sharing control circuit according to claim 2, wherein: The delay unit includes M cascaded buffers, where M is an integer greater than or equal to 2; The input end of the first buffer is respectively connected to the first input end of the gating unit and the original driving signal, the input end of the mth buffer is respectively connected to the mth input end of the gating unit and the output end of the m-1th buffer, and the output end of the Mth buffer is connected to the M+1th input end of the gating unit, where m is an integer greater than or equal to 2, and m≤M.

4. The current sharing control circuit according to claim 3, characterized in that: The gating unit includes a channel selector; The first input end of the channel selector is respectively connected to the input end of the first buffer and the original driving signal, the mth input end of the channel selector is respectively connected to the input end of the mth buffer and the output end of the m-1th buffer, the M+1th input end of the channel selector is connected to the output end of the Mth buffer, the output end of the channel selector is connected to the second input end of the logic module, and the control end of the channel selector is connected to the control module.

5. The current sharing control circuit according to claim 4, characterized in that: The channel selector is an eight-channel selector.

6. The current sharing control circuit according to any one of claims 1 to 5, characterized in that: The logic module includes an AND gate; The first input end of the AND gate is connected to the original driving signal, the second input end of the AND gate is connected to the output end of the delay adjustment module, and the output end of the AND gate is connected to the power circuit.

7. The current sharing control circuit according to any one of claims 1 to 5, characterized in that: The current sharing control circuit further includes a current sampling module; The current sampling module is connected to the control module and the power circuit respectively; The current sampling module is configured to sample the current of the power circuit and output a sampling signal to the control module; The control module is configured to determine a current of the power circuit based on the sampled signal.

8. A power supply device, characterized in that: A device comprising a plurality of power circuits and a current sharing control circuit according to any one of claims 1 to 7 arranged in each power circuit; The power circuits correspond to the current sharing control circuits on a one-to-one basis, and the output end of the logic module in the current sharing control circuit is connected to the corresponding power circuit.

9. The power supply device according to claim 8, characterized in that: The power circuit includes a switch module; The output end of each logic module in the current sharing control circuit is connected to the corresponding switch module.

10. An energy storage device, characterized in that: include: load; The power supply device according to claim 8 or 9, wherein the power supply device is connected to the load to supply power to the load.

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