Optical coupling packaging structure
By stacking the light-emitting chip and the light-receiving chip up and down on the same base island, and optimizing the optical transmission path using a transparent substrate or a translucent insulating structure, the secondary packaging complexity problem of the optical coupled packaging structure is solved, and cost reduction and efficiency improvement are achieved.
Patent Information
- Application Number
- CN202421650771.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-12
- Publication Date
- 2025-08-08
- Estimated Expiration
- 2034-07-12
AI Technical Summary
The existing optically coupled packaging structures require secondary packaging, with complex process steps and high cost, how to improve the packaging process to reduce manufacturing steps and reduce costs.
The light-emitting chip and the light-receiving chip are stacked up and down on the same base island, and a transparent substrate or a translucent insulating structure is adopted to avoid secondary packaging. The light transmission path is optimized through the design of the transparent substrate or translucent insulating structure, and the photoelectric conversion efficiency is improved.
The packaging process flow is simplified, production costs are reduced, photoelectric conversion efficiency and wafer utilization are improved, the heating problem of light-emitting chips is solved, and the reliability of the optically coupled packaging structure is enhanced.
Smart Images

Figure CN223206272U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of optoelectronic devices, and more specifically, to an optical coupling packaging structure. Background Art
[0002] Compared to traditional solid-state relays, optocoupler packaging offers advantages such as fast response, low power consumption, long service life, strong electromagnetic interference resistance, and high reliability. It has been widely used in fields such as communications and automotive electronics. An optocoupler package integrates a light-emitting diode (LED) as the input signal source, a light-receiving chip as the optocoupler device, and a power MOSFET as the output device, resulting in a miniaturized solid-state relay with high-speed switching capabilities.
[0003] The existing optical coupling packaging structure has many packaging schemes and packaging forms. Different packaging schemes and packaging forms correspond to different layout structures. The light emitting chip and the light receiving chip are located on different base islands. The two base islands are usually designed in an upper and lower relative layout, such as Figure 1 As shown, the light emitting chip 1 is located on the lower surface of the upper base island, and the light receiving chip 2 is located on the upper surface of the lower base island. The two are arranged opposite each other and are covered by a transparent plastic package 3. The outside of the transparent plastic package 3 is also covered with a non-transparent plastic package 4. The existing two base islands can also adopt a left-right relative layout design, such as Figure 2 As shown, the light emitting chip 1 is located on the left base island, and the light receiving chip 2 is located on the right base island. The two are arranged opposite to each other and are covered by a transparent plastic package 3. The outside of the transparent plastic package 3 is also covered with a non-transparent plastic package 4.
[0004] Due to the need to ensure the light transmission path from the light-emitting chip to the light-receiving chip, the existing optical coupling packaging structure usually requires secondary packaging, that is, a transparent package covering the light-emitting chip and the light-receiving chip, and then performing non-transparent conventional plastic packaging outside the transparent package. This involves many process steps, and the secondary packaging requires more molds and equipment, which is not only inconvenient to manufacture but also costly.
[0005] Therefore, how to improve the layout of the optical coupling packaging structure, reduce the number of manufacturing steps, and lower product costs are issues that need to be urgently addressed at this stage. Utility Model Content
[0006] In view of this, an object of the present invention is to provide an optical coupling packaging structure to improve the packaging process, reduce process complexity, and lower product costs.
[0007] The utility model provides an optical coupling packaging structure, comprising: a carrier base island, on which a light receiving chip and a light emitting chip located on the light receiving chip are arranged; a first output base island, on which a first power chip is arranged; a second output base island, on which a second power chip is arranged; a first output pin, connected to the first output base island and extending from the plastic package; a second output pin, connected to the second output base island and extending from the plastic package; a first input base island and a second input base island, respectively connected to a first electrode and a second electrode of the light emitting chip; a first input pin and a second input pin, the first input pin being connected to the first input base island and extending from the plastic package, and the second input pin being connected to the second input base island and extending from the plastic package; a plastic package covering the carrier base island, the first output base island, the second output base island, the first input base island, the second input base island, and the chips on each base island; wherein the area of the light emitting region of the light emitting chip is smaller than the area of the light sensing region of the light receiving chip, and the area of the light emitting region of the light emitting chip is not smaller than the area of the light sensing region of the light receiving chip.
[0008] Optionally, the area of the light-emitting region of the light-emitting chip is equal to the area of the light-sensing region of the light-receiving chip.
[0009] Optionally, the source of the first power chip is connected to the source of the second power chip, the positive electrode of the light receiving chip is connected to the gate of the first power chip and the second power chip respectively, and the negative electrode of the light receiving chip is connected to the source of the first power chip and / or the second power chip.
[0010] Optionally, the light-emitting chip includes a transparent substrate and a light-emitting structure located on the transparent substrate, the bottom surface area of the light-emitting structure is the area of the light-emitting area of the light-emitting chip, and the projection area of the transparent substrate toward the light-receiving chip is the area of the light-emitting area of the light-emitting chip.
[0011] Optionally, the light-emitting chip includes a light-emitting structure and the substrate of the light-emitting chip is peeled off, and an insulating light-transmitting structure is also arranged between the light-emitting chip and the light-receiving chip. The bottom surface area of the light-emitting structure is the area of the light-emitting area of the light-emitting chip, and the projection area of the insulating light-transmitting structure toward the light-receiving chip is the area of the light-emitting area of the light-emitting chip.
[0012] Optionally, the area of the light-emitting region of the light-emitting chip is 100% to 110% of the area of the light-sensing region of the light-receiving chip.
[0013] Optionally, the area of the light emitting region of the light emitting chip is 5% to 98% of the area of the light emitting region of the light emitting chip.
[0014] Optionally, the area of the light emitting region of the light emitting chip is 5% to 60% of the area of the light emitting region of the light emitting chip.
[0015] Optionally, the area of the light emitting region of the light emitting chip is 5% to 10% of the area of the light emitting region of the light emitting chip.
[0016] Optionally, the light-emitting chip includes a plurality of light-emitting structures arranged in an array.
[0017] Optionally, the bottom surface of the transparent substrate is a plane, a spherical cap protruding toward the light-receiving chip, or a spherical cap protruding toward the light-emitting structure.
[0018] Optionally, the bottom surface of the insulating light-transmitting structure is a plane, a spherical cap protruding toward the light-receiving chip, or a spherical cap protruding toward the light-emitting structure.
[0019] Optionally, the transparent substrate is fixed on the light-receiving chip by light-transmitting insulating glue.
[0020] Optionally, the light-emitting chip is fixed on the insulating light-transmitting structure by light-transmitting insulating glue, and the insulating light-transmitting structure is fixed on the light-receiving chip by light-transmitting insulating glue.
[0021] Optionally, the light receiving chip is fixed on the supporting base island by insulating glue.
[0022] Optionally, the plastic package body is made of non-light-transmitting material.
[0023] Optionally, the first input pin and the second input pin are led out from a first side of the plastic package body, and the first output pin and the second output pin are led out from a second side of the plastic package body, where the second side is opposite to the first side.
[0024] Optionally, it further includes supporting pins, which are connected to the supporting base island and extend from the side of the plastic package body.
[0025] Optionally, the cathode of the light receiving chip is connected to the support pin via a bonding wire, the source of the first power chip is connected to the support pin via a bonding wire, and the source of the second power chip is connected to the support pin via a bonding wire.
[0026] Optionally, the carrier base island and the first input base island are an integral structure, or the carrier base island and the second input base island are an integral structure; the first input pin and the second input pin are led out from the first side of the plastic package body, and the first output pin and the second output pin are led out from the second side of the plastic package body, and the second side is opposite to the first side.
[0027] Optionally, the first input pin is close to the third side of the plastic package body, the second input pin is close to the fourth side of the plastic package body, the third side and the fourth side are opposite, and the third side is perpendicular to the first side. The first input pin is electrically connected to the first pole of the light-emitting chip, and the second input pin is electrically connected to the second pole of the light-emitting chip. The first pole is the positive pole, and the second pole is the negative pole. The supporting base island and the second input base island are an integrated structure.
[0028] Optionally, the first input pin is close to the fourth side of the plastic package body, the second input pin is close to the third side of the plastic package body, the third side and the fourth side are opposite, and the third side is perpendicular to the first side. The first input pin is electrically connected to the first pole of the light-emitting chip, and the second input pin is electrically connected to the second pole of the light-emitting chip. The first pole is the positive pole, and the second pole is the negative pole. The supporting base island and the second input base island are an integrated structure.
[0029] Optionally, the first input pin is close to the third side of the plastic package body, the second input pin is close to the fourth side of the plastic package body, the third side and the fourth side are opposite, and the third side is perpendicular to the first side. The first input pin is electrically connected to the first pole of the light-emitting chip, and the second input pin is electrically connected to the second pole of the light-emitting chip. The first pole is the negative pole, and the second pole is the positive pole. The supporting base island and the second input base island are an integrated structure.
[0030] Optionally, the first input pin is close to the fourth side of the plastic package body, the second input pin is close to the third side of the plastic package body, the third side and the fourth side are opposite, and the third side is perpendicular to the first side. The first input pin is electrically connected to the first pole of the light-emitting chip, and the second input pin is electrically connected to the second pole of the light-emitting chip. The first pole is the negative pole, and the second pole is the positive pole. The supporting base island and the second input base island are an integrated structure.
[0031] Optionally, the first power chip and the second power chip include at least one of a silicon-based metal oxide semiconductor field effect transistor, a silicon carbide-based metal oxide semiconductor field effect transistor, and a gallium nitride-based high electron mobility transistor, the drain of the first power chip is connected to the first output pin, and the drain of the second power chip is connected to the second output pin.
[0032] Optionally, the drain of the first power chip is located on its bottom surface, and the drain of the first power chip is electrically connected to the first output base island through a conductive layer; the drain of the second power chip is located on its bottom surface, and the drain of the second power chip is electrically connected to the second output base island through a conductive layer.
[0033] Optionally, the drain of the first power chip is located on its front side, and the drain of the first power chip is electrically connected to the first output base island through a bonding wire; the drain of the second power chip is located on its front side, and the drain of the second power chip is electrically connected to the second output base island through a bonding wire.
[0034] Beneficial effects of the utility model:
[0035] The optical coupling packaging structure provided by the utility model stacks the light-emitting chip and the light-receiving chip up and down on the same base island, thereby ensuring the light transmission path, avoiding the complex process flow of secondary packaging, and reducing the packaging difficulty and production cost.
[0036] Furthermore, the light-emitting chip includes a transparent substrate and a light-emitting structure. The bottom surface area of the light-emitting structure is smaller than the projected area of the transparent substrate toward the light-receiving chip, thereby resolving heat generation issues in the light-emitting chip. The projected area of the transparent substrate toward the light-receiving chip is no smaller than the area of the light-sensitive region of the light-receiving chip, thereby improving photoelectric conversion efficiency. Preferably, the projected area of the transparent substrate toward the light-receiving chip is equal to the area of the light-sensitive region of the light-receiving chip, thereby preventing light spillage.
[0037] Furthermore, compared to a case where the substrate of the light-emitting chip is not stripped, stripping the substrate of the light-emitting chip frees the die size from being restricted by the substrate size. Thus, the die area cut out during the dicing phase is determined by the area of the light-emitting structure. Therefore, under the substrate stripping scheme, the number of effective dies on a wafer of the same size can be greatly increased, thereby improving the utilization rate of the wafer used to manufacture the light-emitting chip. A light-transmitting insulating structure is provided between the light-emitting structure and the light-receiving chip. The bottom surface area of the light-emitting structure is smaller than the area of the light-transmitting insulating structure projected toward the light-receiving chip, thereby resolving the heating problem of the light-emitting chip. The projected area of the light-transmitting insulating structure toward the light-receiving chip is not smaller than the area of the light-sensitive region of the light-receiving chip, thereby improving the photoelectric conversion efficiency. Preferably, the projected area of the light-transmitting insulating structure toward the light-receiving chip is equal to the area of the light-sensitive region of the light-receiving chip, thereby avoiding light overflow loss.
[0038] Furthermore, the lower surface of the transparent substrate or the light-transmitting insulating structure of the light-emitting chip is a spherical crown, and the transparent substrate or the light-transmitting insulating structure forms a concave lens, which can make the light emitted by the light-emitting chip more divergent and ensure that the photosensitive area of the light-receiving chip is illuminated.
[0039] Furthermore, the lower surface of the transparent substrate or the light-transmitting insulating structure of the light-emitting chip is a spherical crown, and the transparent substrate or the light-transmitting insulating structure forms a convex lens, which can make the light output of the light-emitting chip more concentrated, reduce the incident angle of light when reaching the light-receiving chip, improve the light absorption rate, and effectively improve the photoelectric conversion efficiency.
[0040] Furthermore, the light-emitting chip includes a plurality of light-emitting structures distributed in an array, which can make the light emission more uniform, and the area of each light-emitting structure is smaller, and the heat dissipation effect is better. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings.
[0042] Figure 1 A cross-sectional schematic diagram showing a conventional optical coupling packaging structure;
[0043] Figure 2 A cross-sectional schematic diagram showing another existing optical coupling packaging structure;
[0044] Figure 3 A schematic top view of the optical coupling packaging structure of the first embodiment of the present invention is shown;
[0045] Figure 4 A schematic top view of an optical coupling packaging structure according to a second embodiment of the present invention is shown;
[0046] Figure 5 A schematic diagram showing the stacking of the light-emitting chip and the light-receiving chip in the optical coupling package structure of the first embodiment of the present invention is shown;
[0047] Figures 6a to 8b The top view and cross-sectional view of the light-emitting chip in the optical coupling package structure of the first embodiment, the third embodiment, and the fourth embodiment are respectively shown;
[0048] Figure 9 A schematic diagram showing the stacking of a light-emitting chip and a light-receiving chip in an optical coupling package structure according to a fifth embodiment of the present invention is shown;
[0049] Figure 10 A schematic diagram showing the stacking of a light-emitting chip and a light-receiving chip in an optical coupling package structure according to a sixth embodiment of the present invention is shown;
[0050] Figure 11 A schematic diagram showing the stacking of a light-emitting chip and a light-receiving chip in an optical coupling package structure according to a seventh embodiment of the present invention is shown;
[0051] Figure 12 A circuit diagram showing the optical coupling package structure of the first embodiment of the present invention is shown. DETAILED DESCRIPTION
[0052] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, identical elements are represented by identical or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.
[0053] The present invention will be further described below with reference to the accompanying drawings and embodiments.
[0054] Figure 3 A schematic top view of an optical coupling package structure according to a first embodiment of the present invention is shown; the optical coupling package structure includes: a first input pin 10, a first input base island 11, a second input pin 20, a second input base island 21, a first output pin 30, a first output base island 31, a second output pin 40, a second output base island 41, a carrier base island 50, a support pin 80, and a plastic package body 90 covering the above base islands and part of the pins; wherein, the first input pin 10 is connected to the first input base island 11, the second input pin 20 is connected to the second input base island 21, the first output pin 30 is connected to the first output base island 31, the second output pin 40 is connected to the second output base island 41, and the support pin 80 is connected to the carrier base island 50; the first input pin 10 and the second input pin 20 extend from a first side edge of the plastic package body 90, and the first output pin 30 and the second output pin 40 extend from a second side edge of the plastic package body 90, where the second side edge is located opposite to the first side edge. A light-receiving chip 60 is disposed on the carrier base island 50 and fixed to the carrier base island 50, for example, using insulating adhesive. A light-emitting chip 70 is disposed above the light-receiving chip 60. In this embodiment, the light-emitting chip 70 includes a transparent substrate 71 and a light-emitting structure 72. The transparent substrate 71 has a certain thickness, which provides sufficient spacing between the light-emitting chip 70 and the light-receiving chip 60, thereby achieving sufficiently high insulation withstand voltage performance and ensuring the normal function and long-term reliability of the light-emitting chip 70 and the light-receiving chip 60. A first power chip 32 is disposed on the first output base island 31, and a second power chip 42 is disposed on the second output base island 41. The first power chip 32 and the second power chip 42 may include, but are not limited to, at least one of a silicon-based metal oxide semiconductor field effect transistor, a silicon carbide-based metal oxide semiconductor field effect transistor, and a gallium nitride-based high electron mobility transistor. The areas of the first output base island 31 and the second output base island 41 are, for example, larger than the areas of the first input base island 11 and the second input base island 21.
[0055] The light-emitting chip 70 is, for example, a light-emitting diode. The first input pin 10 is connected to the anode of the light-emitting chip 70 via the first input base island 11, and the second input pin 20 is connected to the cathode of the light-emitting chip 70 via the second input base island 21. The anode of the light-receiving chip 60 is connected to the gate of the first power chip 32 and the gate of the second power chip 42, respectively. The cathode of the light-receiving chip 60 is connected to the support pin 80 and is connected to the source of the first power chip 32 and the source of the second power chip 42. Each of the above connections is made, for example, via bonding wires.
[0056] In one embodiment, the drain of the first power chip 32 is located on its bottom surface and is fixed and electrically connected to the first output island 31 via a conductive layer (e.g., conductive glue). The drain of the second power chip 42 is located on its bottom surface and is fixed and electrically connected to the second output island 41 via a conductive layer. In another embodiment, the drain of the first power chip 32 is located on its front surface and is electrically connected to the first output island 31 via a bonding wire. Similarly, the drain of the second power chip 42 is also located on its front surface and is electrically connected to the second output island 41 via a bonding wire.
[0057] Figure 4 A schematic top view of the optical coupling package structure of the second embodiment of the present invention is shown; the same structure as the first embodiment is not repeated, and the difference between the second embodiment and the first embodiment is that the optical coupling package structure does not include the support pin 80. Figure 4 The middle load-bearing island 50 and the second input island 21 are integrally structured, with the second input island 21 supporting the load-bearing island 50. Alternatively, the load-bearing island 50 and the first input island 11 may be integrally structured, with the first input island 11 supporting the load-bearing island 50. The load-bearing island 50 is located in the middle region of the plastic package 90. The first output island 31 and the second output island 41 are symmetrically disposed on either side of the load-bearing island 50, and the first input island 11 and the second input island 21 are symmetrically disposed on either side of the load-bearing island 50. It is understood that the positions of the first input island 11 and the second input island 21 can be interchanged, and the positions of the first output island 31 and the second output island 41 can be interchanged. It can be understood that the positions of the first input pin 10 and the second input pin 20 can be interchanged, and the first input pin 10 and the second input pin 20 can be respectively connected to the positive and negative poles of the light-emitting chip 70, or respectively connected to the negative and positive poles of the light-emitting chip 70, and the supporting base island 50 can be an integrated structure with the first input base island 11, or an integrated structure with the second input base island 20.
[0058] Figure 5 A schematic diagram showing the stacking of the light emitting chip and the light receiving chip in the optical coupling package structure of the first embodiment of the present invention is shown; Figure 5As can be seen in the figure, the light-emitting chip 70 includes a transparent substrate 71 and a light-emitting structure 72 located on the transparent substrate 71. The transparent substrate 71 is located on the surface of the light-receiving chip 60. The transparent substrate 71 and the light-receiving chip 60 are bonded to each other by, for example, a transparent insulating adhesive. The light emitted by the light-emitting structure 72 is emitted toward the transparent substrate 71, and the light passing through the transparent substrate 71 is emitted to the photosensitive area of the light-receiving chip 60. The area of the bottom surface of the light-emitting structure 72 is the area of the light-emitting area of the light-emitting chip 70, and the projection area of the transparent substrate 71 toward the light-receiving chip 60 is the area of the light-emitting area of the light-emitting chip 70. The projected area of the transparent substrate 71 toward the light-receiving chip 60 is smaller than the area of the top surface of the light-receiving chip 60. Specifically, the projected area of the transparent substrate 71 toward the light-receiving chip 60 is not smaller than the area of the light-sensitive region of the light-receiving chip 60. For example, the projected area of the transparent substrate 71 toward the light-receiving chip 60 is 100% to 110% of the area of the light-sensitive region of the light-receiving chip 60 to improve photoelectric conversion efficiency. Preferably, the projected area of the transparent substrate 71 toward the light-receiving chip 60 is equal to the area of the light-sensitive region of the light-receiving chip 60 to avoid wasting light on the area of the light-receiving chip 60 and light overflow loss. To ensure that the entire light-sensitive region of the light-receiving chip 60 is illuminated, the light-emitting structure 72 of the light-emitting chip 70 is located, for example, in the middle region of the transparent substrate 71. The bottom surface area of the light-emitting structure 72 of the light-emitting chip 70 is 5% to 98% of the projected area of the transparent substrate 71 toward the light-receiving chip 60. Preferably, the bottom surface area of the light-emitting structure 72 of the light-emitting chip 70 is 5% to 60% of the projected area of the transparent substrate 71 toward the light-receiving chip 60 to reduce heat generation in the light-emitting chip 70. Further preferably, the area of the light-emitting structure 72 is 5% to 10% of the projected area of the transparent substrate 71 toward the light-receiving chip 60. If the area of the light-emitting structure 72 is too small, insufficient light will be emitted; if the area of the light-emitting structure 72 is too large, excessive heat will be generated. The light-emitting structure of the light-emitting chip 70 includes an epitaxial layer, which includes an N-type semiconductor layer, an active layer, and a P-type semiconductor layer stacked in sequence. The light-emitting chip 70 also includes a non-light-emitting structure 73, which is located at the edge of the light-emitting structure 72. Specifically, non-light-emitting structure 73 may include, for example, an N-type semiconductor layer. Since it lacks a quantum well layer and a P-type semiconductor layer, it does not emit light. Alternatively, non-light-emitting structure 73 may have the same epitaxial layer as light-emitting structure 72, but lacks an electrode, and therefore does not emit light. It is understood that non-light-emitting structure 73 may also include scribe lines.
[0059] Figures 6a to 8b The top view and cross-sectional view of the light-emitting chip in the optical coupling package structure of the first embodiment, the third embodiment, and the fourth embodiment are respectively shown, wherein: Figure 6b For the Figure 6aA schematic cross-sectional view of the light emitting chip 70 taken along the AA section line; the light emitting chip 70 in the first embodiment includes a light emitting structure 72 , which is located in the central area of the transparent substrate 71 , and a non-light emitting structure 73 is surrounding the light emitting structure 72 . Figure 7b For the Figure 7a A schematic cross-sectional view of the light emitting chip 70 taken along the BB section line; the light emitting chip 70 in the third embodiment includes four light emitting structures 72 arranged in a 2×2 array, which emits light more uniformly, and each light emitting structure 72 has a smaller area and a better heat dissipation effect. Figure 8b For the Figure 8a A schematic cross-sectional view of the light-emitting chip 70 taken along the CC section line; the light-emitting chip 70 in the fourth embodiment includes 9 light-emitting structures 72 arranged in a 3×3 array, which emits light more uniformly, and each light-emitting structure 72 has a smaller area and better heat dissipation effect.
[0060] Figure 9 and Figure 10 Schematic diagrams showing the stacking of the light emitting chip and the light receiving chip in the optical coupling package structure of the fifth embodiment and the sixth embodiment of the present invention respectively; Figure 9 As can be seen, the lower surface of the transparent substrate 71 in this fifth embodiment is a spherical cap (a portion of a spherical surface) that protrudes toward the side of the light-emitting structure 72, so that the transparent substrate 71 forms a concave lens. The light emitted by the light-emitting structure 72 is further diverged after passing through the transparent substrate 71, so that it is more evenly distributed in the photosensitive area of the light-receiving chip 60. In this embodiment, the thickness of the transparent substrate 71 can be thinner than in other embodiments, and it is only necessary to ensure that the photosensitive area of the light-receiving chip 60 can be illuminated. Specifically, a light-transmitting insulating adhesive 74 can be first applied to the upper surface of the light-receiving chip 60. The light-emitting chip 70 will be pressed together when it is mounted, and the gap between the transparent substrate 71 and the light-receiving chip 60 will be filled with the light-transmitting insulating adhesive 74.
[0061] See also Figure 10 In the sixth embodiment, the lower surface of the transparent substrate 71 is a spherical cap (a portion of a sphere) that bulges toward the light-receiving chip 60, forming a convex lens. Light emitted by the light-emitting structure 72 is further concentrated after passing through the transparent substrate 71, reducing the angle of incidence of the light upon reaching the light-receiving chip 60 and increasing light absorption, effectively improving photoelectric conversion efficiency. Specifically, a light-transmitting insulating adhesive 74 can be applied to the upper surface of the light-receiving chip 60. The light-emitting chip 70 is then pressed together during assembly, filling the gap between the transparent substrate 71 and the light-receiving chip 60 with the light-transmitting insulating adhesive 74.
[0062] Figure 11A schematic diagram illustrates the stacking of a light-emitting chip and a light-receiving chip in an optically coupled package structure according to a seventh embodiment of the present invention. In this seventh embodiment, the light-emitting chip 70 can be further processed by removing the substrate from the light-emitting chip 70. An insulating, light-transmitting structure 75 is thinned to a predetermined thickness and then cut into small pieces the same size as the photosensitive area of the light-receiving chip 60. The insulating, light-transmitting structure 75 is then bonded to the photosensitive area of the light-receiving chip 60 using a transparent insulating adhesive. The light-emitting chip 70, after the substrate has been removed, is then bonded to the insulating, light-transmitting structure 75 using a transparent insulating adhesive. In this embodiment, the light-emitting chip 70 includes only the light-emitting structure 72. Light emitted by the light-emitting structure 72 is emitted toward the insulating, light-transmitting structure 75. The light passing through the insulating, light-transmitting structure 75 is then emitted to the photosensitive area of the light-receiving chip 60. The bottom surface of the light-emitting structure 72 corresponds to the area of the light-emitting area of the light-emitting chip 70, and the projection of the insulating, light-transmitting structure 75 toward the light-receiving chip 60 corresponds to the area of the light-emitting area of the light-emitting chip 70. Compared with the case where the substrate of the light-emitting chip 70 is not stripped, the substrate of the light-emitting chip 70 is stripped so that the size of the tube core is not limited by the size of the substrate. In this way, the area of the tube core cut out during the dicing stage is determined by the area of the light-emitting structure. Therefore, under the substrate stripping scheme, the number of effective tube cores on the wafer of the same size can be greatly increased, thereby improving the utilization rate of the wafer for making the light-emitting chip 70. At the same time, a smaller light-emitting chip 70 can reduce the heat generated by the light-emitting chip 70.
[0063] The projection area of the insulating light-transmitting structure 75 toward the light-receiving chip 60 is not less than the area of the photosensitive region of the light-receiving chip 60. The projection area of the insulating light-transmitting structure 75 toward the light-receiving chip 60 is, for example, 100% to 110% of the area of the photosensitive region of the light-receiving chip 60 to improve the photoelectric conversion efficiency. Preferably, the projection area of the insulating light-transmitting structure 75 toward the light-receiving chip 60 is the same as the area of the photosensitive region of the light-receiving chip 60 to avoid wasting the area of the light-receiving chip 60 and light overflow loss. The bottom surface area of the light-emitting structure 72 of the light-emitting chip 70 is 5% to 98% of the projection area of the insulating light-transmitting structure 75 toward the light-receiving chip 60; preferably, the bottom surface area of the light-emitting structure 72 of the light-emitting chip 70 is 5% to 60% of the projection area of the insulating light-transmitting structure 75 toward the light-receiving chip 60, so as to reduce the heat generated by the light-emitting chip 70; further preferably, the area of the light-emitting structure 72 is 5% to 10% of the projection area of the insulating light-transmitting structure 75 toward the light-receiving chip 60. If the area of the light-emitting structure 72 is too small, the light will not be enough; if the area of the light-emitting structure 72 is too large, too much heat will be generated.
[0064] In the seventh embodiment, although compared with other embodiments, there is an additional bonding process and the cost of an additional light-transmitting insulating structure 75 , the area utilization of the wafer is effectively improved, thereby reducing the cost of the light-emitting chip 70 .
[0065] It is understood that the structures of the light-emitting chip 70, the light-transmitting insulating structure 75, and the light-receiving chip 60 in the first, third, and seventh embodiments can all be used in the second embodiment. Furthermore, as long as the light-emitting chip 70 and the light-receiving chip 60 are stacked one on top of the other, the structures of the light-emitting chip 70, the light-transmitting insulating structure 75, and the light-receiving chip 60 in the first, third, and seventh embodiments of the present application can be used regardless of the packaging structure.
[0066] Figure 12 The circuit diagram of the optical coupling package structure of the first embodiment of the present invention is shown. Figure 12 As shown, the light-emitting chip 70 is, for example, a light-emitting diode, the positive electrode of the light-emitting chip 70 is connected to the first input pin 10, and the negative electrode of the light-emitting chip 70 is connected to the second input pin 20; the light-receiving chip 60 is, for example, a photoelectric conversion chip, and the light-receiving chip 60 can generate a corresponding electrical signal through the received light signal to drive the first power chip 32 and the second power chip 42. Specifically, the positive electrode of the light-receiving chip 60 is respectively connected to the gate of the first power chip 32 and the gate of the second power chip 42, the source of the first power chip 32 is connected to the source of the second power chip 42 and is connected to the negative electrode of the light-receiving chip 60, the drain of the first power chip 32 is connected to the first output pin 30, and the drain of the second power chip 42 is connected to the second output pin 40.
[0067] The optical coupling packaging structure provided by the utility model stacks the light-emitting chip and the light-receiving chip up and down on the same base island, thereby ensuring the light transmission path, avoiding the complex process flow of secondary packaging, and reducing the packaging difficulty and production cost.
[0068] Furthermore, the light-emitting chip includes a transparent substrate and a light-emitting structure. The bottom surface area of the light-emitting structure is smaller than the projected area of the transparent substrate toward the light-receiving chip, thereby resolving heat generation issues in the light-emitting chip. The projected area of the transparent substrate toward the light-receiving chip is no smaller than the area of the light-sensitive region of the light-receiving chip, thereby improving photoelectric conversion efficiency. Preferably, the projected area of the transparent substrate toward the light-receiving chip is equal to the area of the light-sensitive region of the light-receiving chip, thereby preventing light spillage.
[0069] Furthermore, compared to a case where the substrate of the light-emitting chip is not stripped, stripping the substrate of the light-emitting chip frees the die size from being restricted by the substrate size. Thus, the die area cut out during the dicing phase is determined by the area of the light-emitting structure. Therefore, under the substrate stripping scheme, the number of effective dies on a wafer of the same size can be greatly increased, thereby improving the utilization rate of the wafer used to manufacture the light-emitting chip. A light-transmitting insulating structure is provided between the light-emitting structure and the light-receiving chip. The bottom surface area of the light-emitting structure is smaller than the area of the light-transmitting insulating structure projected toward the light-receiving chip, thereby resolving the heating problem of the light-emitting chip. The projected area of the light-transmitting insulating structure toward the light-receiving chip is not smaller than the area of the light-sensitive region of the light-receiving chip, thereby improving the photoelectric conversion efficiency. Preferably, the projected area of the light-transmitting insulating structure toward the light-receiving chip is equal to the area of the light-sensitive region of the light-receiving chip, thereby avoiding light overflow loss.
[0070] Furthermore, the lower surface of the transparent substrate or the light-transmitting insulating structure of the light-emitting chip is a spherical crown, and the transparent substrate or the light-transmitting insulating structure forms a concave lens, which can make the light emitted by the light-emitting chip more divergent and ensure that the photosensitive area of the light-receiving chip is illuminated.
[0071] Furthermore, the lower surface of the transparent substrate or the light-transmitting insulating structure of the light-emitting chip is a spherical crown, and the transparent substrate or the light-transmitting insulating structure forms a convex lens, which can make the light output of the light-emitting chip more concentrated, reduce the incident angle of light when reaching the light-receiving chip, improve the light absorption rate, and effectively improve the photoelectric conversion efficiency.
[0072] Furthermore, the light-emitting chip includes a plurality of light-emitting structures distributed in an array, which can make the light emission more uniform, and the area of each light-emitting structure is smaller, and the heat dissipation effect is better.
[0073] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or device comprising the element.
[0074] While embodiments of the present invention have been described above, these embodiments do not exhaustively describe all details, nor do they limit the present invention to the specific embodiments described. Obviously, numerous modifications and variations are possible based on the above description. These embodiments are selected and described in detail in this specification to better explain the principles and practical applications of the present invention, thereby enabling those skilled in the art to better utilize the present invention and its modifications. The present invention is limited only by the claims and their full scope and equivalents.
Claims
1. An optical coupling packaging structure, characterized in that: include: A carrier base island, wherein a light receiving chip and a light emitting chip located on the light receiving chip are arranged on the carrier base island; a first output base island, wherein a first power chip is disposed on the first output base island; a second output base island, wherein a second power chip is disposed on the second output base island; a first output pin connected to the first output base island and extending out from the plastic package; a second output pin connected to the second output base island and extending from the plastic package; A first input base island and a second input base island are connected to the first electrode and the second electrode of the light-emitting chip respectively; A first input pin and a second input pin, wherein the first input pin is connected to the first input base island and extends out of the plastic package, and the second input pin is connected to the second input base island and extends out of the plastic package; A plastic package covering the carrier base island, the first output base island, the second output base island, the first input base island, the second input base island and the chips on each base island; The light emitting region of the light emitting chip has an area smaller than the light sensing region of the light receiving chip, and the light emitting region of the light emitting chip has an area no smaller than the light sensing region of the light receiving chip.
2. The optical coupling package structure according to claim 1, wherein: The area of the light emitting region of the light emitting chip is equal to the area of the light sensing region of the light receiving chip.
3. The optical coupling package structure according to claim 1, wherein: The source of the first power chip is connected to the source of the second power chip, the positive electrode of the light receiving chip is connected to the gate of the first power chip and the second power chip respectively, and the negative electrode of the light receiving chip is connected to the source of the first power chip and / or the second power chip.
4. The optical coupling package structure according to claim 1, wherein: The light-emitting chip includes a transparent substrate and a light-emitting structure located on the transparent substrate. The bottom surface area of the light-emitting structure is the area of the light-emitting region of the light-emitting chip. The projection area of the transparent substrate toward the light-receiving chip is the area of the light-emitting region of the light-emitting chip.
5. The optical coupling package structure according to claim 1, wherein: The light-emitting chip includes a light-emitting structure and the substrate of the light-emitting chip is peeled off, and an insulating and light-transmitting structure is also arranged between the light-emitting chip and the light-receiving chip. The bottom surface area of the light-emitting structure is the area of the light-emitting area of the light-emitting chip, and the projection area of the insulating and light-transmitting structure toward the light-receiving chip is the area of the light-emitting area of the light-emitting chip.
6. The optical coupling package structure according to any one of claims 1 to 5, characterized in that: The area of the light emitting region of the light emitting chip is 100% to 110% of the area of the light sensing region of the light receiving chip.
7. The optical coupling package structure according to any one of claims 1 to 5, wherein: The area of the light emitting region of the light emitting chip is 5% to 98% of the area of the light emitting region of the light emitting chip.
8. The optical coupling package structure according to any one of claims 1 to 5, wherein: The area of the light emitting region of the light emitting chip is 5% to 60% of the area of the light emitting region of the light emitting chip.
9. The optical coupling package structure according to any one of claims 1 to 5, wherein: The area of the light emitting region of the light emitting chip is 5% to 10% of the area of the light emitting region of the light emitting chip.
10. The optical coupling package structure according to claim 4 or 5, characterized in that: The light-emitting chip includes a plurality of light-emitting structures arranged in an array.
11. The optical coupling package structure according to claim 4, wherein: The bottom surface of the transparent substrate is a plane, a spherical cap protruding toward the light receiving chip, or a spherical cap protruding toward the light emitting structure.
12. The optical coupling package structure according to claim 5, wherein: The bottom surface of the insulating light-transmitting structure is a plane, a spherical cap protruding toward the light-receiving chip, or a spherical cap protruding toward the light-emitting structure.
13. The optical coupling package structure according to claim 4, wherein: The transparent substrate is fixed on the light-receiving chip by light-transmitting insulating glue.
14. The optical coupling package structure according to claim 5, wherein: The light emitting chip is fixed on the insulating light-transmitting structure by light-transmitting insulating adhesive, and the insulating light-transmitting structure is fixed on the light-receiving chip by light-transmitting insulating adhesive.
15. The optical coupling package structure according to claim 1, wherein: The light receiving chip is fixed on the supporting base island by insulating glue.
16. The optical coupling package structure according to claim 1, wherein: The plastic package body is made of non-light-transmitting material.
17. The optical coupling package structure according to claim 1, wherein: The first input pin and the second input pin are led out from a first side of the plastic package body, and the first output pin and the second output pin are led out from a second side of the plastic package body, where the second side is opposite to the first side.
18. The optical coupling package structure according to claim 1, wherein: It also includes supporting pins, which are connected to the supporting base island and extend from the side of the plastic package body.
19. The optical coupling package structure according to claim 18, wherein: The cathode of the light receiving chip is connected to the support pin via a bonding wire, the source of the first power chip is connected to the support pin via a bonding wire, and the source of the second power chip is connected to the support pin via a bonding wire.
20. The optical coupling package structure according to claim 1, wherein: The carrier base island and the first input base island are an integral structure, or the carrier base island and the second input base island are an integral structure; the first input pin and the second input pin are led out from the first side of the plastic package body, and the first output pin and the second output pin are led out from the second side of the plastic package body, and the second side is opposite to the first side.
21. The optical coupling package structure according to claim 20, wherein: The first input pin is close to the third side of the plastic package body, the second input pin is close to the fourth side of the plastic package body, the third side is opposite to the fourth side, and the third side is perpendicular to the first side. The first input pin is electrically connected to the first pole of the light-emitting chip, and the second input pin is electrically connected to the second pole of the light-emitting chip. The first pole is the positive pole, and the second pole is the negative pole. The supporting base island and the second input base island are an integrated structure.
22. The optical coupling package structure according to claim 20, wherein: The first input pin is close to the fourth side of the plastic package body, the second input pin is close to the third side of the plastic package body, the third side is opposite to the fourth side, and the third side is perpendicular to the first side. The first input pin is electrically connected to the first pole of the light-emitting chip, and the second input pin is electrically connected to the second pole of the light-emitting chip. The first pole is the positive pole, and the second pole is the negative pole. The supporting base island and the second input base island are an integrated structure.
23. The optical coupling package structure according to claim 20, wherein: The first input pin is close to the third side of the plastic package body, the second input pin is close to the fourth side of the plastic package body, the third side is opposite to the fourth side, and the third side is perpendicular to the first side. The first input pin is electrically connected to the first pole of the light-emitting chip, and the second input pin is electrically connected to the second pole of the light-emitting chip. The first pole is the negative pole, and the second pole is the positive pole. The supporting base island and the second input base island are an integrated structure.
24. The optical coupling package structure according to claim 20, wherein: The first input pin is close to the fourth side of the plastic package body, the second input pin is close to the third side of the plastic package body, the third side is opposite to the fourth side, and the third side is perpendicular to the first side. The first input pin is electrically connected to the first pole of the light-emitting chip, and the second input pin is electrically connected to the second pole of the light-emitting chip. The first pole is the negative pole, and the second pole is the positive pole. The supporting base island and the second input base island are an integrated structure.
25. The optical coupling package structure according to claim 1, wherein: The first power chip and the second power chip include at least one of a silicon-based metal oxide semiconductor field effect transistor, a silicon carbide-based metal oxide semiconductor field effect transistor, and a gallium nitride-based high electron mobility transistor. The drain of the first power chip is connected to the first output pin, and the drain of the second power chip is connected to the second output pin.
26. The optical coupling package structure according to claim 25, wherein: The drain of the first power chip is located on its bottom surface, and the drain of the first power chip is electrically connected to the first output base island through a conductive layer; the drain of the second power chip is located on its bottom surface, and the drain of the second power chip is electrically connected to the second output base island through a conductive layer.
27. The optical coupling package structure according to claim 25, wherein: The drain of the first power chip is located on its front side, and the drain of the first power chip is electrically connected to the first output base island through a bonding wire; the drain of the second power chip is located on its front side, and the drain of the second power chip is electrically connected to the second output base island through a bonding wire.
Citation Information
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Optical coupling assembly, optical coupling device, and fabrication method for optical coupling assembly
WO2026170743A1