Photovoltaic bypass protection module
By adopting a separate layout of base island design and sawtooth structure in the photovoltaic bypass protection module, the performance degradation caused by heat concentration of the MOSFET module is solved, the heat dissipation uniformity and anti-tightening capability are improved, and the stability and efficiency of the photovoltaic system are ensured.
Patent Information
- Application Number
- CN202422054968.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-23
- Publication Date
- 2025-08-12
- Estimated Expiration
- 2034-08-23
AI Technical Summary
The existing MOSFET photovoltaic bypass protection modules are easily affected by heat in high temperature environments, resulting in performance degradation or component damage, affecting the reliability and efficiency of the photovoltaic system.
The MOS crystal cells, control chips and capacitors are set in a separate layout, and heat dissipation is used to utilize at least 3 base islands. Combined with the sawtooth structure and stress-relieving hole design, it improves heat dissipation uniformity and efficiency.
Effectively prevent the performance of the photovoltaic bypass protection module from being reduced due to heat concentration, improve the stability and heat dissipation ability of the photovoltaic system, and enhance the anti-detachment effect of the components.
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Figure CN223219060U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of solar photovoltaics, in particular to a photovoltaic bypass protection module. Background Art
[0002] The PV bypass protection module is a critical component of PV panels, primarily used to improve the reliability and efficiency of PV systems. When a cell in a PV string experiences a current mismatch due to shading, damage, or performance degradation, the bypass module provides a low-resistance bypass path for that cell, allowing current to continue flowing around the faulty cell. This reduces hot spot effects and maintains the overall efficiency of the PV panel.
[0003] MOSFET photovoltaic bypass protection modules are primarily used in photovoltaic systems to achieve more efficient power management and protection. These modules are typically integrated into the junction box of photovoltaic modules. Their primary function is to provide bypass protection under specific conditions to address various operating conditions, such as shading, hot spot effects, or module failures, thereby ensuring the stability and efficiency of the entire photovoltaic system.
[0004] When a section of a photovoltaic cell string malfunctions due to shading or damage, the impedance of that section increases, potentially hindering the output of the entire string. The MOSFET bypass module detects this imbalance and provides a relatively low-impedance path, ensuring continued power generation for the remaining healthy sections. The MOSFET bypass module, with its low on-resistance, significantly reduces energy loss and improves overall system conversion efficiency.
[0005] Compared with traditional photovoltaic bypass protection modules, MOSFET photovoltaic bypass protection modules have higher efficiency and stability. However, at the same time, the control chip and capacitor are easily affected by the heat generated by the MOSFET. Therefore, it is very important to know how to layout the MOSFET photovoltaic bypass protection module, how to more effectively dissipate the heat generated during operation, and how to reduce the impact of high temperature on the control components, thereby reducing performance degradation or component damage caused by overheating, and thus improving the overall reliability and economic benefits of the photovoltaic system.
[0006] The disclosure of the above background technology content is only used to assist in understanding the concept and technical solution of the present utility model. It does not necessarily belong to the prior art of the present application, nor does it necessarily provide technical guidance. In the absence of clear evidence that the above content has been disclosed before the filing date of the present application, the above background technology should not be used to evaluate the novelty and creativity of the present application. Utility Model Content
[0007] The purpose of the utility model is to provide a photovoltaic bypass protection module, which can improve the heat dissipation capacity and heat dissipation uniformity while ensuring the stability and efficiency of the entire photovoltaic system.
[0008] In order to achieve the above-mentioned purpose, the technical solution adopted by the present utility model is as follows:
[0009] A photovoltaic bypass protection module includes a first conductive body, a second conductive body, a MOS wafer, a control chip and a capacitor;
[0010] A first base island is provided on the first conductive body, a second base island is provided on the second conductive body, the first conductive body or the second conductive body further includes at least a third base island, and spacing grooves are provided between the multiple base islands;
[0011] The MOS chip is arranged on the first base island, and the MOS chip is electrically connected to the second base island;
[0012] At least one of the control chip and the capacitor is disposed on the third base island, and the control chip and the capacitor are electrically connected to the MOS wafer respectively, and the control chip is electrically connected to the capacitor.
[0013] Further, based on any one of the technical solutions or a combination of multiple technical solutions described above, the third base island is set on the first conductive body, the control chip is set on the third base island, and the capacitor is set on the third base island or the second base island or the first base island.
[0014] Further, based on any one of the technical solutions or a combination of multiple technical solutions described above, the third base island is arranged on the first conductive body, the capacitor is arranged on the third base island, and the control chip is arranged on the second base island or the first base island.
[0015] Furthermore, based on any one of the technical solutions or a combination of multiple technical solutions described above, the third base island is arranged on the second conductive body, the control chip is arranged on the third base island, and the capacitor is arranged on the third base island or the second base island or the first base island.
[0016] Further, based on any one of the technical solutions or a combination of multiple technical solutions described above, the third base island is arranged on the second conductive body, the capacitor is arranged on the third base island, and the control chip is arranged on the first base island or the second base island.
[0017] Furthermore, any one of the technical solutions or a combination of multiple technical solutions described above also includes a fourth base island, the third base island is arranged on the first conductive body, the fourth base island is arranged on the second conductive body, and the control chip and the capacitor are two components, one of which is arranged on the third base island, and the other component is arranged on the fourth base island.
[0018] Further, according to any one of the above technical solutions or a combination of multiple technical solutions, the MOS chip is electrically connected to the second base island via a metal conductor;
[0019] The gate of the MOS chip is electrically connected to the first interface of the control chip;
[0020] The drain of the MOS chip is electrically connected to the second interface of the control chip;
[0021] The source of the MOS wafer is electrically connected to the third interface of the control chip.
[0022] Furthermore, based on any one of the technical solutions or a combination of multiple technical solutions described above, a transition zone is provided on the upper surface of the first conductive body, and a conductive layer is provided in the transition zone. The solderability of the conductive layer is better than that of the first conductive body, and the conductive layer is connected to the second interface of the control chip through a wire.
[0023] Further, based on any one of the above technical solutions or a combination of multiple technical solutions, the third base island is a conductor, and the control chip and / or capacitor disposed on the third base island and attached to the surface of the third base island are provided with an insulating medium; or,
[0024] An insulating medium is provided on the surface of the third base island that contacts the control chip and / or capacitor.
[0025] Further, based on any one of the above technical solutions or a combination of multiple technical solutions, the edge of the base island is provided with a serrated structure; and / or,
[0026] The metal conductor is a metal interconnection sheet, a bump is provided at the bottom of the metal interconnection sheet, and the bump abuts against the upper surface of the MOS wafer; and / or,
[0027] An upwardly arched bending portion is provided in the middle of the metal conductor, and a stress relief hole is provided on the bending portion.
[0028] The beneficial effects brought about by the technical solution provided by the utility model are as follows:
[0029] a. The utility model provides at least three base islands and adopts a separate layout to set the MOS wafer, control chip and capacitor, which can improve the uniformity and efficiency of heat dissipation of the photovoltaic bypass protection module and prevent the performance of the photovoltaic bypass protection module from degrading during use;
[0030] b. The utility model provides a serrated structure with grooves on the edge of the base island. When epoxy resin is used for encapsulation, the grooves are also filled with epoxy resin, thereby increasing the resistance and pulling force of the base island on the epoxy resin, which can effectively prevent the pull-off effect;
[0031] c. The utility model provides an upwardly arched bending portion in the middle of the metal conductor, and a stress relief hole is provided on the bending portion. The stress relief hole can eliminate the internal stress generated when the metal conductor is bent. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments recorded in this application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0033] Figure 1 A schematic structural diagram of a photovoltaic module provided as an exemplary embodiment of the present invention;
[0034] Figure 2 for Figure 1 The enlarged schematic diagram shown at H in the middle;
[0035] Figure 3 A schematic structural diagram of a photovoltaic module provided as a second exemplary embodiment of the present invention;
[0036] Figure 4 A schematic structural diagram of a photovoltaic module provided as a third exemplary embodiment of the present invention;
[0037] Figure 5 A schematic structural diagram of a photovoltaic module provided as a fourth exemplary embodiment of the present invention;
[0038] Figure 6 A schematic structural diagram of a photovoltaic module provided as a fifth exemplary embodiment of the present invention;
[0039] Figure 7 A schematic structural diagram of a photovoltaic module provided as a sixth exemplary embodiment of the present invention;
[0040] Figure 8 A schematic structural diagram of a photovoltaic module provided as an exemplary embodiment seven of the present invention;
[0041] Figure 9 The present invention is a schematic structural diagram of a metal conductor provided by an exemplary embodiment of the present invention.
[0042] Among them, the figure marks include: 11-first base island, 111-transition region, 12-second base island, 13-third base island, 14-fourth base island, 21-first conductive body, 22-second conductive body, 3-MOS wafer, 4-control chip, 41-first interface, 42-second interface, 43-third interface, 5-capacitor, 6-metal interconnection sheet, 61-bump, 62-bending portion, 7-packaging material, 8-sawtooth structure. DETAILED DESCRIPTION
[0043] In order to help those skilled in the art better understand the present invention, the following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.
[0044] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, apparatus, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0045] In one embodiment of the present invention, a photovoltaic bypass protection module is provided, comprising a first conductive body 21, a second conductive body 22, a MOS wafer 3, a control chip 4, a capacitor 5, a metal conductor, and N spaced-apart base islands, where N ≥ 3. The control chip 4 and the capacitor 5 are electrically connected to the MOS wafer 3, respectively, and the control chip 4 is electrically connected to the capacitor 5.
[0046] In which, an insulating gap is set between the first conductive body 21 and the second conductive body 22, the first base island among the N base islands is electrically connected to the first conductive body 21 and is configured to set the MOS wafer 3, and the second base island among the N base islands is electrically connected to the second conductive body 22 and is configured to be electrically connected to the MOS wafer 3 through a metal conductor; other base islands among the N base islands other than the first and second base islands can be set on the first conductive body 21 or on the second conductive body 22, and other base islands among the N base islands other than the first and second base islands can be conductors or insulators.
[0047] Since the MOS wafer 3, control chip 4, and capacitor 5 all generate a certain amount of heat during operation, if these three components are arranged centrally, the heat will be more concentrated, dissipating heat more slowly, and the photovoltaic bypass protection module may even have performance degradation during use. The present invention provides at least three base islands, and adopts a separate layout to arrange the MOS wafer 3, control chip 4, and capacitor 5. The MOS wafer 3 is arranged on the first base island 11, and at least one of the control chip 4 and capacitor 5 is arranged on the third base island 13. This can improve the uniformity and efficiency of heat dissipation of the photovoltaic bypass protection module.
[0048] Taking a photovoltaic bypass protection module including three base islands as an example, there are multiple ways to arrange the position of the third base island 13 and the arrangement positions of the control chip 4 and the capacitor 5:
[0049] (1) The third base island 13 is disposed on the first conductive body 21 , the control chip 4 is disposed on the third base island 13 , and the capacitor 5 is disposed on the third base island 13 or the second base island 12 or the first base island 11 ;
[0050] (2) The third base island 13 is disposed on the first conductive body 21 , the capacitor 5 is disposed on the third base island 13 , and the control chip 4 is disposed on the second base island 12 or the first base island 11 ;
[0051] (3) The third base island 13 is disposed on the second conductive body 22 , the control chip 4 is disposed on the third base island 13 , and the capacitor 5 is disposed on the third base island 13 or the second base island 12 or the first base island 11 ;
[0052] (4) The third base island 13 is disposed on the second conductive body 22 , the capacitor 5 is disposed on the third base island 13 , and the control chip 4 is disposed on the first base island 11 or the second base island 12 .
[0053] Preferably, the first conductive body 21 and the base island disposed thereon are an integrally formed structure, and the second conductive body 22 and the base island disposed thereon are an integrally formed structure.
[0054] The photovoltaic bypass protection module provided by the present invention is described below through a number of embodiments.
[0055] Example 1
[0056] See also Figures 1 to 2 In this embodiment, the first conductive body 21 is provided with a first base island 11 and a third base conductor 13. Figure 1 As shown, the first base island 11 and the third base conductor 13 are provided with a spacing groove; the second base island 12 is provided on the second conductive body 22. The first conductive body 21, the first base island 11, and the third base conductor 13 are integrally formed using a metal material. The second conductive body 22 and the second base island 12 are also integrally formed using a metal material.
[0057] The MOS chip 3 is set on the first base island 11, the drain on the lower surface of the MOS chip 3 is electrically connected to the upper surface of the first base island 11, and the upper surface of the MOS chip 3 is electrically connected to the second base island 12 through the metal interconnection sheet 6.
[0058] See also Figure 1 and Figure 2 The gate of the MOS chip 3 is connected to the gate of the MOS chip 3 by one or more wires ( Figure 2 The wires B, C) shown in FIG are electrically connected to the first interface 41 of the control chip 4 .
[0059] The source of the MOS chip 3 is electrically connected to the second interface 42 of the control chip 4. Since the drain of the MOS chip 3 is electrically connected to the first base island 11, the third base conductor 13, and the first conductive body 21, and considering that the material of the first conductive body 21 is usually copper, it is difficult to connect / weld the wire to the copper. Therefore, preferably, Figure 1 As shown, a transition area 111 is provided on the upper surface of the first base island 11, and a conductive layer is provided in the transition area 111. The solderability of the conductive layer is better than that of the first conductive body 21. Figure 1 and Figure 2 The wire D) shown connects the conductive layer to the second interface 42 of the control chip 4. The transition region 111 can be a silver-plated region, a tin-plated region, a gold-plated region, etc.
[0060] The source of the MOS chip 3 is connected via a wire (such as Figure 2 The wire A) shown is electrically connected to the third interface 43 of the control chip 4 .
[0061] The control chip 4 and the capacitor 5 are connected by Figure 2 Wires E and F are shown to be electrically connected.
[0062] In this embodiment, an insulating medium is provided on the back of the control chip 4 and the capacitor 5, and the control chip 4 and the capacitor 5 are fixed to the upper surface of the third base island 13 through the insulating medium; alternatively, an insulating layer is provided on the upper surface of the third base island 13, and the back of the control chip 4 and the capacitor 5 are pasted on the insulating layer.
[0063] Example 2
[0064] This embodiment Figure 3 As shown, the difference between this embodiment and the first embodiment is that the transition zone 111 is not arranged on the upper surface of the first base island 11 , but is arranged on the upper surface of the third base island 13 .
[0065] In other embodiments, the transition region 111 may also be disposed at other locations on the upper surface of the first conductive body 21 that are convenient for wiring and can be fully packaged later.
[0066] Example 3
[0067] This embodiment Figure 4 As shown, the difference between this embodiment and embodiment 1 is that the third base island 13 is arranged on the second conductive body 22, a spacing groove is provided between the third base island 13 and the second base island 12, and the control chip 4 and the capacitor 5 are both arranged on the third base island 13.
[0068] In this embodiment, the transition region 111 is provided on the upper surface of the first base island 11. Preferably, the transition region 111 is provided on the first base island 11 near the control chip 4 and the capacitor 5.
[0069] Example 4
[0070] This embodiment Figure 5 As shown, in this embodiment, the third base island 13 is disposed on the first conductive body 21, similar to the first embodiment, and a spacing groove is provided between the third base island 13 and the first base island 11. This embodiment differs from the first embodiment in that the control chip 4 is disposed on the upper surface of the third base island 13, and the capacitor 5 is disposed on the upper surface of the second base island 12.
[0071] In this embodiment, the transition zone 111 may be as follows Figure 5 It is shown as being arranged on the upper surface of the third base island 13 , and may also be arranged on the upper surface of the first base island 11 .
[0072] Example 5
[0073] This embodiment Figure 6 As shown, in this embodiment, the third base island 13 is disposed on the second conductive body 22, similar to the third embodiment, and a spacing groove is provided between the third base island 13 and the second base island 12. This embodiment differs from the third embodiment in that the control chip 4 is disposed on the upper surface of the first base island 11, and the capacitor 5 is disposed on the upper surface of the third base island 13.
[0074] In this embodiment, the transition zone 111 may be as follows Figure 6 As shown, it is arranged on the upper surface of the first base island 11.
[0075] Example 6
[0076] This embodiment Figure 7 As shown, in this embodiment, the third base island 13 is arranged on the second conductive body 22. The control chip 4 is arranged on the upper surface of the third base island 13, and the capacitor 5 is arranged on the upper surface of the first base island 13. The difference between this embodiment and embodiment five is that the control chip 4 is arranged on the upper surface of the third base island 11, and the capacitor 5 is arranged on the upper surface of the second base island 13. A groove area is provided on the first base island 11, and the third base island 13 has a protrusion, which extends in the direction of the first conductive body 21 and falls into the groove area. In this embodiment, the spacing groove between the first base island 11 and the third base island 13 has a concave-convex matching structure along the width direction of the photovoltaic bypass protection module, and the width direction of the photovoltaic bypass protection module is Figure 7 The concave-convex matching structure can enhance the anti-pull-off force between each base island and the packaging material, thereby preventing the conductive body from being pulled off from the packaging material.
[0077] Example 7
[0078] This embodiment Figure 8 As shown, in this embodiment, a fourth base island 14 is further included. The third base island 13 is provided on the first conductive body 21, and the fourth base island 14 is provided on the second conductive body 22. Figure 8 As shown, spacing grooves are provided between the first base island 11 , the second base island 12 , the third base island 13 and the fourth base island 14 .
[0079] In this embodiment, the control chip 4 is arranged on the upper surface of the third base island 13, and the capacitor 5 is arranged on the upper surface of the fourth base island 14; or, the control chip 4 is arranged on the upper surface of the fourth base island 14, and the capacitor 5 is arranged on the upper surface of the third base island 13. Figure 7As shown, the transition zone 111 is disposed on the upper surface of the third base island 13 . It should be noted that the transition zone 111 may also be disposed on the upper surface of the first base island 11 .
[0080] In other embodiments, for a photovoltaic bypass protection module including three base islands, the MOS wafer 3, the control chip 4 and the capacitor 5 may also be arranged in the following manner. For example,
[0081] In any of the above embodiments, the N base islands, the MOS wafer 3 , the control chip 4 and the capacitor 5 are encapsulated by a packaging material 7 , preferably epoxy resin.
[0082] The first conductive body 21 has a non-encapsulated area with a busbar through-hole 211 and a busbar welding area 212 ; the second conductive body has a non-encapsulated area with a busbar through-hole 221 and a busbar welding area 222 .
[0083] See also Figures 1 to 9 The metal conductor is preferably a metal interconnect 6, more preferably a copper metal interconnect. The bottom surface of the metal interconnect 6 is provided with a bump 61, which abuts against the top surface of the MOS chip 3. The metal interconnect 6 has an upwardly arched curved portion 62, which is provided with a stress relief hole 621. The stress relief hole 621 can eliminate the internal stress generated when the metal conductor is bent.
[0084] Preferably, the N base islands are provided with anti-pull-off structures, and the outer edges of the N base islands are provided with sawtooth structures 8, such as Figure 1 、 3 -8 shows a wavy structure or a raised groove structure. For N base islands, when the MOS wafer 3, the control chip 4 and the capacitor 5 are encapsulated with epoxy resin, the grooves of the sawtooth structure 8 will also be filled with epoxy resin. This structure will increase the resistance and pulling force of the base island on the epoxy resin, which can effectively prevent it from pulling off.
[0085] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply the existence of any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element.
[0086] The above is only a specific implementation method of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.
Claims
1. A photovoltaic bypass protection module, characterized in that: It comprises a first conductive body (21), a second conductive body (22), a MOS wafer (3), a control chip (4) and a capacitor (5); A first base island (11) is provided on the first conductive body (21), a second base island (12) is provided on the second conductive body (22), the first conductive body (21) or the second conductive body (22) further includes at least a third base island (13), and spacing grooves are provided between the plurality of base islands; The MOS wafer (3) is arranged on the first base island (11), and the MOS wafer (3) is electrically connected to the second base island (12); At least one of the control chip (4) and the capacitor (5) is arranged on the third base island (13), and the control chip (4) and the capacitor (5) are respectively electrically connected to the MOS wafer (3), and the control chip (4) is electrically connected to the capacitor (5).
2. The photovoltaic bypass protection module according to claim 1, characterized in that: The third base island (13) is arranged on the first conductive body (21), the control chip (4) is arranged on the third base island (13), and the capacitor (5) is arranged on the third base island (13) or the second base island (12) or the first base island (11).
3. The photovoltaic bypass protection module according to claim 1, characterized in that: The third base island (13) is arranged on the first conductive body (21), the capacitor (5) is arranged on the third base island (13), and the control chip (4) is arranged on the second base island (12) or the first base island (11).
4. The photovoltaic bypass protection module according to claim 1, characterized in that: The third base island (13) is arranged on the second conductive body (22), the control chip (4) is arranged on the third base island (13), and the capacitor (5) is arranged on the third base island (13) or the second base island (12) or the first base island (11).
5. The photovoltaic bypass protection module according to claim 1, characterized in that: The third base island (13) is arranged on the second conductive body (22), the capacitor (5) is arranged on the third base island (13), and the control chip (4) is arranged on the first base island (11) or the second base island (12).
6. The photovoltaic bypass protection module according to claim 1, characterized in that: The invention also includes a fourth base island (14), wherein the third base island (13) is arranged on the first conductive body (21), and the fourth base island (14) is arranged on the second conductive body (22); and the control chip (4) and the capacitor (5) are two components, one of which is arranged on the third base island (13) and the other is arranged on the fourth base island (14).
7. The photovoltaic bypass protection module according to any one of claims 1 to 6, characterized in that: The MOS crystal element (3) is electrically connected to the second base island (12) via a metal conductor; The gate of the MOS wafer (3) is electrically connected to the first interface (41) of the control chip (4); The drain of the MOS wafer (3) is electrically connected to the second interface (42) of the control chip (4); The source electrode of the MOS wafer (3) is electrically connected to the third interface (43) of the control chip (4).
8. The photovoltaic bypass protection module according to claim 7, characterized in that: A transition zone (111) is provided on the upper surface of the first conductive body (1), and a conductive layer is provided in the transition zone (111). The conductive layer has better solderability than the first conductive body (1), and the conductive layer is connected to the second interface (42) of the control chip (4) via a wire.
9. The photovoltaic bypass protection module according to any one of claims 1 to 6, characterized in that: The third base island (13) is a conductor, and the control chip (4) and / or capacitor (5) disposed on the third base island (13) and attached to the surface of the third base island (13) are provided with an insulating medium; or, An insulating medium is provided on the surface of the third base island (13) that is in contact with the control chip (4) and / or the capacitor (5).
10. The photovoltaic bypass protection module according to claim 7, characterized in that: The edge of the base island is provided with a serrated structure; and / or, The metal conductor is a metal interconnection sheet (6), a bump (61) is provided at the bottom of the metal interconnection sheet (6), and the bump (61) abuts against the upper surface of the MOS wafer (3); and / or, An upwardly arched bending portion (62) is provided at the middle position of the metal conductor, and a stress relief hole (621) is provided on the bending portion (62).