Low-warpage ceramic circuit board

Abstract

The utility model discloses a low warpage ceramic circuit board, which comprises a circuit layer, a ceramic layer and a heat dissipation layer, the circuit layer, the ceramic layer and the heat dissipation layer are sequentially and fixedly connected from top to bottom, the circuit layer, the ceramic layer and the heat dissipation layer are all arranged to be arc-shaped, the metal grain size of the circuit layer is smaller than that of the heat dissipation layer, and the heat dissipation layer is arranged on the ceramic layer. The metal expansion coefficient of the circuit layer is smaller than that of the heat dissipation layer. The crystal grains and thermal expansion coefficients of the two sides of the ceramic layer are different, after sintering connection is completed, the circuit board shrinks towards one side of the circuit layer, and after etching of the circuit layer is completed, part of residual stress on the side of the circuit layer is released, so that the warping degree is reduced, the circuit layer and the ceramic layer shrink towards the heat dissipation layer, and the heat dissipation efficiency is improved. The arrangement can ensure that the etched circuit board is as flat as possible, and the overall warping degree is reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of circuit boards, in particular to a low-warpage ceramic circuit board. Background Art

[0002] Ceramic circuit boards are the most widely used substrate material in the power electronics field. They support chips, connect circuits, conduct heat and dissipate heat, and provide voltage-resistant insulation. Due to the difference in thermal expansion coefficient between copper and ceramic, residual stress forms at the ceramic-metal interface during the cooling process after brazing. As the circuit pattern is processed, the stress difference between the two sides causes product warping. Excessive warping can affect product packaging and increase risks during use. Currently, the same copper foil is used on both sides of the ceramic to ensure a flat circuit board. However, as the circuit layer is etched, the stress on the circuit side decreases, and the ceramic sheet shrinks toward the heat dissipation layer, exacerbating warping.

[0003] Therefore, solving the warpage problem has become a technical difficulty in the existing ceramic circuit board production process. For example, a Chinese patent (publication number CN112652541B) proposes a method for improving the warpage of AMB substrates. By designing grooves on the non-graphic surface of the AMB substrate, the thermal stress is released to balance the stress on the graphic surface and reduce the degree of warpage (concavity) of the substrate toward the copper foil graphic surface. However, this method affects the contact with the heat sink and sacrifices the heat transfer performance.

[0004] Another disclosed technology (patent publication number CN206672901U) provides a device for generating warpage in a ceramic substrate. The device includes: a supporting device having a convex or concave portion on one side; and a loading device having a concave or convex portion on the side facing the convex or concave portion of the supporting device, which corresponds to the convex or concave portion of the supporting device. This method improves warpage by using a jig. As can be seen from the above content, although the curvature is small, the way external force is applied will also increase the risk of hidden cracks. For this reason, we propose a low-warpage ceramic circuit board. Utility Model Content

[0005] The purpose of the utility model is to provide a low-warpage ceramic circuit board to solve the problems raised in the background technology.

[0006] To achieve the above-mentioned purpose, the present invention provides the following technical solution: a low-warpage ceramic circuit board, comprising a circuit layer, a ceramic layer and a heat dissipation layer, wherein the circuit layer, ceramic layer and heat dissipation layer are fixedly connected in sequence from top to bottom, and the circuit layer, ceramic layer and heat dissipation layer are all arranged in an arc shape, the metal grain size of the circuit layer is smaller than the metal grain size of the heat dissipation layer, and the metal expansion coefficient of the circuit layer is smaller than the metal expansion coefficient of the heat dissipation layer.

[0007] Furthermore, the circuit layer, ceramic layer and heat dissipation layer are arranged in sequence from top to bottom, and the circuit layer, ceramic layer and heat dissipation layer are fixedly connected by active metal brazing or eutectic welding.

[0008] Furthermore, the circuit layer is made of a metal material, and the metal material is oxygen-free copper with a brand name of DCuB1.

[0009] Furthermore, the heat dissipation layer is made of a metal material, and the metal material is oxygen-free copper with a brand of PNA404.

[0010] Compared with the prior art, the present invention has the following beneficial effects: The present invention provides a ceramic layer with different grain sizes and thermal expansion coefficients on both sides. After sintering and connection, the circuit board will shrink toward the circuit layer side. When the circuit layer is etched, the residual stress on the circuit layer side will be partially released, thereby reducing the degree of warping. This allows the circuit layer and ceramic layer to shrink toward the heat dissipation layer. This arrangement ensures that the circuit board is as flat as possible after etching, reducing overall warpage.

[0011] In addition, this circuit board has a flat non-patterned surface and is not grooved, has good thermal conductivity, and will not use external force to change the degree of warping, so the risk of hidden cracks in the ceramic layer is smaller. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a schematic diagram of the front view structure of the utility model;

[0013] Figure 2 This is a schematic diagram of the front view structure of the utility model after etching.

[0014] In the figure: 1 circuit layer, 2 ceramic layer, 3 heat dissipation layer. DETAILED DESCRIPTION

[0015] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0016] See also Figure 1-Figure 2The utility model provides a technical solution: a low-warpage ceramic circuit board, comprising a circuit layer 1, a ceramic layer 2 and a heat dissipation layer 3, wherein the circuit layer 1, the ceramic layer 2 and the heat dissipation layer 3 are fixedly connected in sequence from top to bottom, and the circuit layer 1, the ceramic layer 2 and the heat dissipation layer 3 are all arranged in an arc shape, the metal grain size of the circuit layer 1 is smaller than the metal grain size of the heat dissipation layer 3, and the metal expansion coefficient of the circuit layer 1 is smaller than the metal expansion coefficient of the heat dissipation layer 3.

[0017] Among them, there are differences in the grains and thermal expansion coefficients on both sides of the ceramic layer 2, and the metal grain size of the circuit layer 1 is smaller than the metal grain size of the heat dissipation layer 3. The metal expansion coefficient of the circuit layer 1 is smaller than the metal expansion coefficient of the heat dissipation layer 3. Therefore, after the sintering connection is completed, the circuit board will shrink toward the side of the circuit layer 1. When the circuit layer 1 is etched, the residual stress on the side of the circuit layer 1 will be released in part, thereby reducing the degree of warping, so that the circuit layer 1 and the ceramic layer 2 shrink toward the heat dissipation layer 3. Such a setting can ensure that the circuit board is as flat as possible after etching, reducing the overall warping, and the structure has a flat non-patterned surface and is not grooved, has good thermal conductivity, and will not use external force to change the degree of warping, and the risk of hidden cracks in the ceramic layer 2 is smaller.

[0018] See also Figure 1 The circuit layer 1, ceramic layer 2 and heat dissipation layer 3 are arranged in sequence from top to bottom, and the circuit layer 1, ceramic layer 2 and heat dissipation layer 3 are fixedly connected by active metal brazing or eutectic welding.

[0019] Among them, the circuit layer 1, ceramic layer 2 and heat dissipation layer 3 connected by active metal brazing or eutectic welding are more firmly welded and no welding gaps will appear. The circuit layer 1, ceramic layer 2 and heat dissipation layer after welding have good sealing, strong corrosion resistance and conductivity, and active metal brazing or eutectic welding can be performed at a relatively low temperature.

[0020] See also Figure 1 The manufacturing material of the circuit layer 1 is a metal material, and the metal material is set to oxygen-free copper, and the brand is DCuB1. The manufacturing material of the heat dissipation layer 3 is a metal material, and the metal material is set to oxygen-free copper, and the brand is PNA404.

[0021] The circuit layer 1 and the heat dissipation layer 3 made of oxygen-free copper have different metal expansion coefficients and grain sizes. During sintering, the circuit layer 1 and the ceramic layer 2 can shrink toward the heat dissipation layer 3, thereby achieving a lower warpage effect.

[0022] Table 1 below compares the flatness of this circuit board with that of existing products.

[0023] Existing products This circuit board Example 1: 0.24mm 0.125mm Example 2: 0.247mm 0.144mm Example three: 0.181mm 0.116mm Example 4: 0.22mm 0.118mm Example five: 0.245mm 0.108mm

[0024] Table 1

[0025] When in use, first, there are differences in the crystal grains and thermal expansion coefficients on both sides of the ceramic layer 2, and the metal grain size of the circuit layer 1 is smaller than the metal grain size of the heat dissipation layer 3, and the metal expansion coefficient of the circuit layer 1 is smaller than the metal expansion coefficient of the heat dissipation layer 3. Therefore, after the sintering connection is completed, the circuit board will shrink toward the side of the circuit layer 1, and when the circuit layer 1 is etched, the residual stress on the side of the circuit layer 1 will be released in part, thereby reducing the degree of warping, thereby causing the circuit layer 1 and the ceramic layer 2 to shrink toward the heat dissipation layer 3. This setting can ensure that the circuit board is as flat as possible after etching, reducing the overall warping, and the non-patterned surface of this structure is flat and not grooved, with good The thermal conductivity is improved, and the degree of warping will not be changed by external force. The risk of hidden cracks in the ceramic layer 2 is smaller. The circuit layer 1, ceramic layer 2 and heat dissipation layer 3 connected by active metal brazing or eutectic welding are more firmly welded, and there will be no welding gaps. The welded circuit layer 1, ceramic layer 2 and heat dissipation layer have good sealing, strong corrosion resistance and conductivity, and active metal brazing or eutectic welding can be performed at a relatively low temperature. The circuit layer 1 and heat dissipation layer 3 made of oxygen-free copper have different metal expansion coefficients and grain sizes. The circuit layer 1 and ceramic layer 2 can shrink toward the heat dissipation layer 3 during sintering, thereby achieving the effect of lower warping.

[0026] Although the embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and variations may be made to these embodiments without departing from the principles and spirit of the present invention, and the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A low-warpage ceramic circuit board, comprising a circuit layer (1), a ceramic layer (2) and a heat dissipation layer (3), characterized in that: The circuit layer (1), the ceramic layer (2) and the heat dissipation layer (3) are fixedly connected in sequence from top to bottom; the circuit layer (1), the ceramic layer (2) and the heat dissipation layer (3) are all arranged in an arc shape; the metal grain size of the circuit layer (1) is smaller than the metal grain size of the heat dissipation layer (3); and the metal expansion coefficient of the circuit layer (1) is smaller than the metal expansion coefficient of the heat dissipation layer (3).

2. The low-warpage ceramic circuit board according to claim 1, characterized in that: The circuit layer (1), ceramic layer (2) and heat dissipation layer (3) are arranged in sequence from top to bottom, and the circuit layer (1), ceramic layer (2) and heat dissipation layer (3) are fixedly connected by active metal brazing or eutectic welding.

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