Display device

Abstract

The display device may include: a first pad group including first pads spaced apart from each other in a first direction; a second pad group spaced apart from the first pad group in a second direction crossing the first direction, and including second pads spaced apart from each other in the first direction; inspection wires disposed between the first pads, extending in the second direction, respectively, spaced apart from each other in the first direction, and connected to the second pads, respectively; and dummy pads disposed between the inspection wirings.

Description

Technical Field

[0001] The present invention relates to a display device, and more particularly to a display device capable of recognizing biological information. Background Art

[0002] The display device includes a display area and a non-display area. In the display area of ​​the display device, a driving element (e.g., a transistor, etc.) and a light-emitting element (e.g., an organic light-emitting diode, etc.) that receives a voltage or signal from the driving element to emit light are configured, thereby displaying a predetermined image. In the non-display area where no light-emitting element is configured, no image is displayed. In the non-display area of ​​the display device, a driving integrated circuit, a pad, etc. are configured to provide a voltage or signal to the light-emitting element. Utility Model Content

[0003] An object of the present invention is to provide a display device with improved reliability.

[0004] However, the purpose of the present invention is not limited to the above purpose, and various extensions can be made without departing from the scope of the concept and field of the present invention.

[0005] In order to achieve the aforementioned purpose of the present invention, the display device according to one embodiment of the present invention may include: a first pad group, including first pads separated from each other in a first direction; a second pad group, separated from the first pad group in a second direction intersecting the first direction, and including second pads separated from each other in the first direction; inspection wiring, arranged between the first pads and extending respectively in the second direction, and separated from each other in the first direction and connected to the second pads respectively; and dummy pads, arranged between the inspection wirings.

[0006] In one embodiment, the dummy pad and the first pad may be arranged side by side in the first direction.

[0007] In one embodiment, the inspection wirings and the dummy pads may be arranged alternately.

[0008] In one embodiment, the lengths of each of the first pad and the dummy pad in the second direction may be the same.

[0009] In one embodiment, the first pad and the dummy pad may be made of the same material.

[0010] In one embodiment, the thickness of each of the first pad and the dummy pad may be greater than the thickness of each of the inspection wirings.

[0011] In one embodiment, the display device may further include: a printed circuit substrate, disposed on the first pad group and the dummy pad.

[0012] In one embodiment, the display device may further include: an anisotropic conductive film disposed between the first pad group and the dummy pad and the printed circuit substrate.

[0013] In one embodiment, the display device may further include: an integrated circuit configured on the second pad group.

[0014] In order to achieve the aforementioned purpose of the present invention, a display device according to an embodiment of the present invention may include: a substrate, including a display area and a non-display area adjacent to the display area; a light-emitting element and a light-receiving element, arranged in the display area on the substrate; a first pad group, arranged in the non-display area on the substrate, and including first pads separated from each other in a first direction; inspection wiring, arranged between the first pads, and respectively extending in a second direction intersecting the first direction, and separated from each other in the first direction; and dummy pads, respectively arranged between the inspection wirings.

[0015] In one embodiment, the dummy pad and the first pad may be arranged side by side in the first direction.

[0016] In one embodiment, the inspection wirings and the dummy pads may be arranged alternately.

[0017] In one embodiment, the lengths of each of the first pad and the dummy pad in the second direction may be the same.

[0018] In one embodiment, the first pad and the dummy pad are made of the same material.

[0019] In one embodiment, the thickness of each of the first pad and the dummy pad may be greater than the thickness of each of the inspection wirings.

[0020] In one embodiment, the display device may further include: a second pad group, arranged in the non-display area on the substrate, spaced apart from the first pad group in the second direction, and including second pads spaced apart from each other in the first direction. The inspection wiring may be connected to each of the second pads.

[0021] In one embodiment, the display device may further include: a printed circuit substrate configured on the first pad group and the dummy pad; and an integrated circuit configured on the second pad group.

[0022] In one embodiment, the second pad may be electrically connected to the light receiving element.

[0023] In one embodiment, the display device may further include a readout wiring disposed on the substrate and electrically connected to the integrated circuit. The second pad may be electrically connected to the light receiving element via the readout wiring.

[0024] In one embodiment, the display device may further include: an anisotropic conductive film disposed between the first pad group and the dummy pad and the printed circuit substrate.

[0025] In a display device according to an embodiment of the present invention, the display device may include an inspection wiring configured between pads electrically connected to a printed circuit substrate and a dummy pad configured between the inspection wiring. Each of the pads and the dummy pads may have a thickness greater than the inspection wiring. The dummy pads can compensate for the thickness step between the area where the pads are configured and the area where the inspection wiring is configured, thereby preventing problems such as the squeezing of conductive particles in the anisotropic conductive film that may occur during the bonding process of the display panel and the printed circuit substrate. Based on this, a display device that prevents damage to the display panel and the printed circuit substrate and improves reliability can be provided.

[0026] However, the effects of the present invention are not limited to the above-mentioned effects, and various extensions can be made without departing from the scope of the concept and field of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 FIG. 1 is a plan view showing a display device according to an embodiment of the present invention.

[0028] Figure 2 It is magnified Figure 1 A plan view of a portion of a display area of ​​a display device.

[0029] Figure 3 It is along Figure 2 A cross-sectional view taken along line II'.

[0030] Figure 4 It is magnified Figure 1 An example of a plan view of area A.

[0031] Figure 5 It is magnified Figure 1 Another example of the floor plan of area A.

[0032] Figure 6 It is along Figure 4 A cross-sectional view taken along line II-II'.

[0033] Figure 7It is along Figure 4 A cross-sectional view taken along line III-III'.

[0034] (Explanation of Reference Numerals)

[0035] DD: Display device DP: Display panel

[0036] IC: Integrated Circuit FPC: Printed Circuit Board

[0037] PX: Pixel FX: Sensor

[0038] ROL: Read Out Wiring TL: Check Wiring

[0039] PDG1, PDG2: first and second pad groups

[0040] PD1, PD2: first and second pads

[0041] DPD: Dummy Pad ACF: Anisotropic Conductive Film DETAILED DESCRIPTION

[0042] Hereinafter, embodiments of the present invention will be described in more detail with reference to the accompanying drawings. Identical components in the drawings are denoted by the same reference numerals, and repeated descriptions thereof will be omitted.

[0043] Figure 1 FIG. 1 is a plan view showing a display device according to an embodiment of the present invention. Figure 2 It is magnified Figure 1 A plan view of a portion of a display area of ​​a display device.

[0044] Reference Figure 1 as well as Figure 2 The display device DD may include a display area DA and a non-display area NDA. In addition, the display device DD may include a display panel DP, an integrated circuit IC, and a printed circuit board FPC.

[0045] The display area DA may be an area capable of displaying an image, and the non-display area NDA may be an area not displaying an image. The non-display area NDA may be located around the display area DA. For example, the non-display area NDA may entirely surround the display area DA.

[0046] The display panel DP may include pixels PX arranged in the display area DA and sensors FX arranged in the display area DA. In one embodiment, each of the sensors FX may be arranged between two adjacent pixels PX on a plane. The pixels PX and the sensors FX may be arranged alternately along a first direction DR1 and a second direction DR2 intersecting the first direction DR1. For example, the first direction DR1 may be perpendicular to the second direction DR2.

[0047] Each of the pixels PX can emit light. As each of the pixels PX emits light, the display area DA can display an image. The pixels PX may include a first pixel PXR, a second pixel PXG, and a third pixel PXB that emit light in different wavelength bands. The first pixel PXR can emit first light R, the second pixel PXG can emit second light G, and the third pixel PXB can emit third light B. The first to third pixels PXR, PXG, and PXB may respectively include a pixel driving circuit PDC and first to third light-emitting elements ED_R, ED_G, and ED_B that emit light in different wavelength bands.

[0048] In other words, the first pixel PXR may include the pixel driving circuit PDC and the first light emitting element ED_R that emits the first light R, the second pixel PXG may include the pixel driving circuit PDC and the second light emitting element ED_G that emits the second light G, and the third pixel PXB may include the pixel driving circuit PDC and the third light emitting element ED_B that emits the third light B. For example, the first light emitting element ED_R may emit the first light R in a red wavelength band, the second light emitting element ED_G may emit the second light G in a green wavelength band, and the third light emitting element ED_B may emit the third light B in a blue wavelength band, but the present invention is not limited thereto.

[0049] Each of the first to third light emitting elements ED_R, ED_G, and ED_B may be electrically connected to the pixel driving circuit PDC. The pixel driving circuit PDC may include at least one transistor and at least one capacitor.

[0050] The sensor FX may include a sensor drive circuit SDC and a light receiving element OPD. The light receiving element OPD may be a light sensor that receives and identifies light reflected from an external object. For example, the light receiving element OPD may be a light sensor that identifies light in the visible light range reflected from an external object. In one embodiment, the light receiving element OPD may be a biometric sensor that identifies light reflected from a user's body part, such as a fingerprint or vein, and converts the optical signal into an electrical signal.

[0051] The light receiving element OPD may be electrically connected to the sensor driving circuit SDC. The sensor driving circuit SDC may include at least one transistor. In one embodiment, the sensor driving circuit SDC and the pixel driving circuit PDC may be formed simultaneously using the same process.

[0052] In one embodiment, the first pixels PXR and the third pixels PXB may be arranged in the same row and column, and alternately arranged along the first direction DR1 and the second direction DR2. The second pixels PXG may be arranged in different rows and columns from the first pixels PXR and the third pixels PXB, and arranged along the first direction DR1 and the second direction DR2. Furthermore, the sensor FX may be arranged between adjacent first and third pixels PXR and PXB, or between two adjacent second pixels PXG. However, the present invention is not limited to this, and the arrangement of the pixels PX and the sensor FX may be variously modified.

[0053] In one embodiment, the first light-emitting element ED_R may have an area larger than that of the second light-emitting element ED_G on a plane. The third light-emitting element ED_B may have an area larger than or equal to that of the first light-emitting element ED_R on a plane. In addition, the light-receiving element OPD may have an area smaller than that of the first light-emitting element ED_R and the third light-emitting element ED_B on a plane. The light-receiving element OPD may have an area smaller than or equal to that of the second light-emitting element ED_G on a plane. However, the present invention is not limited thereto, and the areas of each of the first to third light-emitting elements ED_R, ED_G, ED_B and the light-receiving element OPD may be variously modified.

[0054] The display panel DP may further include data lines DL and readout lines ROL. The data lines DL and the readout lines ROL may extend in the second direction DR2 and may be spaced apart from each other in the first direction DR1. For example, the data lines DL and the readout lines ROL may be alternately arranged along the first direction DR1. The pixels PX may be electrically connected to the data lines DL, and the sensors FX may be electrically connected to the readout lines ROL.

[0055] The display panel DP may further include a first pad group PDG1 and a second pad group PDG2 configured in the non-display area NDA. The second pad group PDG2 may be separated from the first pad group PDG1 in the second direction DR2. The first pad group PDG1 may include first pads PD1 arranged in the first direction DR1, and the first pads PD1 may be separated from each other in the first direction DR1. The second pad group PDG2 may include second pads PD2 arranged in the first direction DR1, and the second pads PD2 may be separated from each other in the first direction DR1. The second pad group PDG2 may be electrically connected to the data wiring DL and the readout wiring ROL.

[0056] The integrated circuit IC may be disposed in the non-display area NDA. The integrated circuit IC may be disposed on the second pad group PDG2. The integrated circuit IC may be electrically connected to the display panel DP. The integrated circuit IC may be electrically connected to the data lines DL and the readout lines ROL via the second pad group PDG2. The integrated circuit IC may provide signals or voltages to the pixels PX and the sensor FX.

[0057] In one embodiment, the integrated circuit IC may include a data driver and a timing controller. For example, the integrated circuit IC may be a timing controller embedded data driver (TED) in which the data driver and the timing controller are implemented in a single integrated circuit. In addition, the integrated circuit IC may also include a readout circuit.

[0058] Since the integrated circuit IC includes the data driver and the readout circuit, the integrated circuit IC can provide a data signal to the pixel PX and receive a sensing signal from the sensor FX. Specifically, the integrated circuit IC can provide the data signal to the pixel PX through the second pad group PDG2 and the data wiring DL, and can receive the sensing signal from the sensor FX through the second pad group PDG2 and the readout wiring ROL.

[0059] The printed circuit substrate FPC may be arranged in the non-display area NDA. The printed circuit substrate FPC may be arranged on the first pad group PDG1. The printed circuit substrate FPC may include a drive circuit for driving the display device DD, a connector for supplying power, and the like. The printed circuit substrate FPC may partially overlap with the display panel DP. That is, a portion of the printed circuit substrate FPC may overlap with the display panel DP, while another portion of the printed circuit substrate FPC may not overlap with the display panel DP. The printed circuit substrate FPC may be electrically connected to the integrated circuit IC and the display panel DP.

[0060] The display device DD can sense external input applied from the outside. The external input can include various forms of input provided from outside the display device DD. For example, the external input can include contact through a part of the user's body, such as a hand, or can include external input applied close to or adjacent to the display device DD at a predetermined distance (e.g., hovering). In addition, the external input can take various forms, such as force, pressure, temperature, and light.

[0061] The display device DD can sense externally applied biometric information of a user. A biometric information sensing region capable of sensing the biometric information of the user can be provided in the display area DA of the display device DD. The biometric information sensing region can be provided in the entire display area DA or in a portion of the display area DA.

[0062] Figure 3 It is along Figure 2 A cross-sectional view taken along line II'.

[0063] Reference Figures 1 to 3 , the display device DD may include the display panel DP, an input sensing layer ISL, a color filter layer CFL, and a window WM.

[0064] The display panel DP may include a substrate SUB, a circuit layer DP_CL, a device layer DP_ED, and an encapsulation layer TFE.

[0065] The substrate SUB may include a transparent material or an opaque material. Examples of materials that can be used for the substrate SUB include polyimide, quartz, glass, etc. These materials can be used alone or in combination.

[0066] The circuit layer DP_CL can be configured on the substrate SUB. The circuit layer DP_CL can include an insulating layer, a semiconductor pattern, a conductive pattern, and signal wiring. The insulating layer, semiconductor layer, and conductive layer can be formed on the substrate SUB through processes such as coating and evaporation, and the insulating layer, semiconductor layer, and conductive layer can be selectively patterned through multiple photolithography processes. Subsequently, the insulating layer, semiconductor pattern, conductive pattern, and signal wiring included in the circuit layer DP_CL can be formed.

[0067] The device layer DP_ED may be disposed on the circuit layer DP_CL. The device layer DP_ED may include the first to third light emitting devices ED_R, ED_G, and ED_B and the light receiving device OPD.

[0068] The device layer DP_ED may further include a pixel definition layer (PDL). The pixel definition layer (PDL) may define first to third openings OP1, OP2, and OP3, respectively, for arranging the first to third light-emitting elements ED_R, ED_G, and ED_B, and a fourth opening OP4 for arranging the light-receiving element OPD. Accordingly, the first to third light-emitting elements ED_R, ED_G, and ED_B and the light-receiving element OPD may be separated based on the pixel definition layer (PDL).

[0069] The first light-emitting element ED_R may include a first pixel electrode AE1, a first light-emitting layer EML1, and a common electrode CE. The second light-emitting element ED_G may include a second pixel electrode AE2, a second light-emitting layer EML2, and the common electrode CE. The third light-emitting element ED_B may include a third pixel electrode AE3, a third light-emitting layer EML3, and the common electrode CE. The light-receiving element OPD may include a fourth pixel electrode AE4, a light-receiving layer ORL, and the common electrode CE.

[0070] The light receiving element OPD may include the light receiving layer ORL arranged between the fourth pixel electrode AE4 and the common electrode CE. The light receiving layer ORL may include a light receiving substance that receives light and converts it into an electrical signal. For example, the light receiving layer ORL may include an organic substance. In one embodiment, the light receiving layer ORL may include an organic polymer substance as a light receiving substance. For example, the light receiving layer ORL may include a conjugated polymer. The light receiving layer ORL may include a thiophene conjugated polymer, a benzodithiophene conjugated polymer, a thieno[3,4-c]pyrrole-4,6-dione (TPD) conjugated polymer, a diketopyrrolidine (DPP) conjugated polymer, a benzothiadiazole (BT) conjugated polymer, etc.

[0071] At least a portion of the top surface of the first pixel electrode AE1 may be exposed through the first opening OP1, at least a portion of the top surface of the second pixel electrode AE2 may be exposed through the second opening OP2, at least a portion of the top surface of the third pixel electrode AE3 may be exposed through the third opening OP3, and at least a portion of the top surface of the fourth pixel electrode AE4 may be exposed through the fourth opening OP4.

[0072] Regions corresponding to the first to fourth pixel electrodes AE1, AE2, AE3, and AE4 exposed by the first to fourth openings OP1, OP2, OP3, and OP4 may define first to third light-emitting regions PXA-R, PXA-G, and PXA-B, and a light-receiving region IPA, respectively. The first to third light-emitting regions PXA-R, PXA-G, and PXA-B, and the light-receiving region IPA may overlap with the first to third light-emitting elements ED_R, ED_G, and ED_B, and the light-receiving element OPD, respectively.

[0073] A non-luminescent region NPXA may be defined between the first to third luminescent regions PXA-R, PXA-G, and PXA-B, and between the first to third luminescent regions PXA-R, PXA-G, and PXA-B and the light-receiving region IPA. The non-luminescent region NPXA may overlap with the pixel-defining layer PDL. The first to third luminescent regions PXA-R, PXA-G, and PXA-B and the light-receiving region IPA may be defined based on the non-luminescent region NPXA.

[0074] The encapsulation layer TFE may be disposed on the element layer DP_ED. The encapsulation layer TFE may include at least one inorganic layer and at least one organic layer. For example, the encapsulation layer TFE may include a first inorganic layer, an organic layer, and a second inorganic layer stacked in sequence, but the present invention is not limited thereto.

[0075] The input sensing layer ISL may be disposed on the encapsulation layer TFE. The input sensing layer ISL may include a first conductive pattern ICP1, an insulating layer IL, a second conductive pattern ICP2, and a protection layer PL.

[0076] The first conductive pattern ICP1 may be disposed on the encapsulation layer TFE. The insulating layer IL may be disposed on the encapsulation layer TFE and may cover the first conductive pattern ICP1. The second conductive pattern ICP2 may be disposed on the insulating layer IL.

[0077] The protective layer PL may be disposed on the insulating layer IL and may cover the second conductive pattern ICP2. The protective layer PL may include an organic insulating material and may protect the first and second conductive patterns ICP1 and ICP2 from moisture, oxygen, foreign matter, and the like.

[0078] exist Figure 3 In the figure, the input sensing layer ISL is shown to include the first and second conductive patterns ICP1 and ICP2, but the present invention is not limited thereto. For example, the input sensing layer ISL may include only one of the first and second conductive patterns ICP1 and ICP2, or may further include a conductive pattern disposed on the second conductive pattern ICP2.

[0079] The color filter layer CFL may be disposed on the input sensing layer ISL. The color filter layer CFL may include a first color filter CF_R, a second color filter CF_G, a third color filter CF_B, and a dummy color filter DCF.

[0080] The first color filter CF_R may overlap with the first light emitting element ED_R. That is, the first color filter CF_R may be arranged to correspond to the first light emitting region PXA-R. The first color filter CF_R may transmit the first light R and block light of a wavelength band different from that of the first light R.

[0081] The second color filter CF_G may overlap the second light emitting element ED_G. That is, the second color filter CF_G may be arranged to correspond to the second light emitting region PXA-G. The second color filter CF_G may transmit the second light G and block light of a wavelength band different from the second light G.

[0082] The third color filter CF_B may overlap the third light emitting element ED_B. That is, the third color filter CF_B may be arranged to correspond to the third light emitting region PXA-B. The third color filter CF_B may transmit the third light B and block light of a wavelength band different from that of the third light B.

[0083] In one embodiment, the dummy color filter DCF may overlap with the light receiving element OPD. That is, the dummy color filter DCF may be configured to correspond to the light receiving area IPA. In one embodiment, the dummy color filter DCF may transmit one of the first to third light beams R, G, and B, while blocking light of a wavelength band different from the one light beam. For example, the dummy color filter DCF may transmit the second light beam G while blocking light of a wavelength band different from the second light beam G, but the present invention is not limited to this.

[0084] The color filter layer CFL may further include a black matrix BM. The black matrix BM may be arranged to correspond to the non-light emitting area NPXA. The black matrix BM may overlap with the first and second conductive patterns ICP1 and ICP2.

[0085] The color filter layer (CFL) may further include an overcoat layer (OCL). The OCL may include an organic insulating material. The OCL may compensate for steps between the first to third color filters (CF_R, CF_G, and CF_B). The OCL may have a predetermined thickness and planarize the top surface of the color filter layer (CFL). For example, the OCL may include an acrylate-based organic material.

[0086] The window WM may be configured on the color filter layer CFL. The window WM may include an optically transparent material. For example, the window WM may include glass or plastic. The window WM may have a multi-layer structure or a single-layer structure. For example, the window WM may include a plurality of plastic films bonded by an adhesive, or include a glass substrate and a plastic film bonded by an adhesive. The window WM may be bonded to the color filter layer CFL via an adhesive layer. The adhesive layer may include an optically clear adhesive (Optical Clear Adhesive), an optically clear adhesive resin (Optically Clear Adhesive Resin), a pressure sensitive adhesive (PSA, Pressure Sensitive Adhesive), etc.

[0087] Figure 4 It is magnified Figure 1 An example of a plan view of area A. Figure 5 It is magnified Figure 1 Another example of the floor plan of area A.

[0088] Reference Figure 1 、 Figure 4 as well as Figure 5 , the display device DD may include the display panel DP, the integrated circuit IC and the printed circuit substrate FPC.

[0089] The display panel DP may include a first pad group PDG1 and a second pad group PDG2 arranged in the non-display area NDA. The second pad group PDG2 may be spaced apart from the first pad group PDG1 in the second direction DR2. The first pad group PDG1 may include the first pads PD1 spaced apart from each other in the first direction DR1, and the second pad group PDG2 may include the second pads PD2 spaced apart from each other in the first direction DR1.

[0090] In one embodiment, the display panel DP may further include a check wiring TL and a dummy pad DPD.

[0091] The inspection wiring TL may be arranged between two first pads PD1. The inspection wiring TL may extend in the second direction DR2 and be spaced apart from each other in the first direction DR1. The inspection wiring TL may be connected to each of the second pads PD2. The second pads PD2 connected to the inspection wiring TL may be electrically connected to the sensor FX via the readout wiring ROL. For example, each of the inspection wiring TL may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive substance, or the like. These may be used alone or in combination.

[0092] In the manufacturing process of the display device DD, the inspection wiring TL can be connected to a multiplexer circuit for inspecting the drive of the sensor FX. That is, in the manufacturing process of the display device DD, one end of each of the inspection wirings TL is connected to the second pad PD2, and the other end of each of the inspection wirings TL is connected to the multiplexer circuit. Based on this, an inspection process for inspecting the drive of the sensor FX can be performed through the inspection wiring TL. After the inspection process, a cutting process for laser cutting the mother substrate into multiple units can be performed. At this time, the mother substrate can cut the inspection wiring TL in the horizontal insertion direction, and a portion of each of the inspection wirings TL adjacent to the multiplexer circuit and the multiplexer circuit can be removed. Based on this, the display device DD that does not include the multiplexer circuit can be manufactured.

[0093] In one embodiment, the dummy pads DPD may be respectively arranged between two inspection lines TL. The inspection lines TL and the dummy pads DPD may be alternately arranged along the first direction DR1.

[0094] For example, the display device DD may include n inspection wirings TL and n-1 dummy pads DPD (see Figure 4 As another example, the display device DD may include n inspection wirings TL and n-2 or less dummy pads DPD (see Figure 5 ).

[0095] In addition, the dummy pads DPD may be arranged side by side with the first pads PD1 in the first direction DR1. The first pads PD1 and the dummy pads DPD may be arranged in the first direction DR1. That is, the printed circuit board FPC may be arranged on the first pad group PDG1 and the dummy pads DPD.

[0096] In one embodiment, the length of the dummy pad DPD in the second direction DR2 may be substantially the same as the length of the first pad PD1 in the second direction DR2. The length of the dummy pad DPD in the first direction DR1 may be smaller than the length of the first pad PD1 in the first direction DR1.

[0097] In one embodiment, the dummy pad DPD may be made of the same material as the first pad PD1 and formed using the same process. Furthermore, the first pad PD1 and the dummy pad DPD may each be made of the same material as the inspection line TL. For example, each of the first pad PD1 and the dummy pad DPD may be made of a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These materials may be used alone or in combination.

[0098] Figure 6 It is along Figure 4 A cross-sectional view taken along line II-II'. Figure 7 It is along Figure 4 For example, Figure 6 It can be a cross-sectional view of the first pad PD1, Figure 7 It may be a cross-sectional view of the first pad PD1 , the dummy pad DPD, and the inspection wiring TL.

[0099] Reference Figure 4 、 Figure 6 as well as Figure 7 The display device DD may include the display panel DP, the printed circuit board FPC and the anisotropic conductive film ACF.

[0100] The display panel DP may include the substrate SUB, the first pads PD1 , the dummy pads DPD, the inspection wiring TL, a first insulating layer ISL1 , and a second insulating layer ISL2 .

[0101] Each of the first pad PD1 and the dummy pad DPD may have a step with the inspection line TL. In one embodiment, the thickness of each of the first pad PD1 and the dummy pad DPD may be greater than the thickness of the inspection line TL. In other words, the length of each of the first pad PD1 and the dummy pad DPD in a third direction DR3 intersecting each of the first direction DR1 and the second direction DR2 may be greater than the length of the inspection line TL in the third direction DR3. For example, the third direction DR3 may be perpendicular to each of the first direction DR1 and the second direction DR2.

[0102] Each of the first pad PD1 and the dummy pad DPD may have a multi-layer structure. For example, the first pad PD1 may include a first pad pattern PP1, a second pad pattern PP2, and a third pad pattern PP3. The dummy pad DPD may include a first dummy pad pattern DPP1, a second dummy pad pattern DPP2, and a third dummy pad pattern DPP3. The inspection wiring TL may have a single-layer structure.

[0103] The first pad pattern PP1 , the first dummy pad pattern DPP1 , and the inspection line TL may be disposed on the substrate SUB.

[0104] The first insulating layer ISL1 may be disposed on the first pad pattern PP1, the first dummy pad pattern DPP1, and the inspection line TL. The first insulating layer ISL1 may define openings that expose at least a portion of the upper surfaces of the first pad pattern PP1 and the first dummy pad pattern DPP1. The first insulating layer ISL1 may cover the inspection line TL.

[0105] The second pad pattern PP2 and the second dummy pad pattern DPP2 may be disposed on the first pad pattern PP1 and the first dummy pad pattern DPP1, respectively. The second pad pattern PP2 and the second dummy pad pattern DPP2 may contact the first pad pattern PP1 and the first dummy pad pattern DPP1, respectively, through the opening.

[0106] The second insulating layer ISL2 may be disposed on the first insulating layer ISL1, the second pad pattern PP2, and the second dummy pad pattern DPP2. The second insulating layer ISL2 may define openings exposing at least a portion of the upper surfaces of the second pad pattern PP2 and the second dummy pad pattern DPP2.

[0107] The third pad pattern PP3 and the third dummy pad pattern DPP3 may be disposed on the second pad pattern PP2 and the second dummy pad pattern DPP2, respectively. The third pad pattern PP3 and the third dummy pad pattern DPP3 may contact the second pad pattern PP2 and the second dummy pad pattern DPP2, respectively, through the opening.

[0108] The first insulating layer ISL1 and the second insulating layer ISL2 may correspond to the insulating layer included in the circuit layer DP_CL. In addition, the first to third pad patterns PP1, PP2, PP3 may include the same material as the conductive pattern included in the circuit layer DP_CL and be formed by the same process.

[0109] exist Figure 6 as well as Figure 7 In the figure, the first pad PD1 and the dummy pad DPD are shown to have a three-layer multilayer structure, but the present invention is not limited thereto. For example, the first pad PD1 and the dummy pad DPD may also have a structure with less than two layers or more than four layers.

[0110] The printed circuit substrate FPC may be disposed on the first pad PD1 and the dummy pad DPD. The printed circuit substrate FPC may include a bump BMP. The bump BMP may overlap the first pad PD1. The bump BMP may include a conductive material. The bump BMP may be electrically connected to the first pad PD1. The printed circuit substrate FPC may output voltages, signals, etc. to the display panel DP via the bump BMP.

[0111] The anisotropic conductive film ACF can be configured between the display panel DP and the printed circuit substrate FPC. Specifically, the anisotropic conductive film ACF can be configured between the first pad PD1 and the dummy pad DPD and the printed circuit substrate FPC. The anisotropic conductive film ACF can bond the first pad PD1 and the bump BMP. The first pad PD1 and the bump BMP can be electrically connected through the anisotropic conductive film ACF. Accordingly, the anisotropic conductive film ACF can electrically connect the display panel DP and the printed circuit substrate FPC. The anisotropic conductive film ACF may include an adhesive layer AL and conductive particles CB arranged in the adhesive layer AL.

[0112] The adhesive layer AL may include an insulating polymer. Examples of insulating polymers that can be used for the adhesive layer AL include epoxy resins, acrylic resins, phenolic resins, melamine-formaldehyde resins, diallyl phthalate resins, urea-formaldehyde resins, polyimide resins, polystyrene resins, polyurethane resins, polyethylene resins, and polyvinyl acetate resins. These can be used alone or in combination.

[0113] The conductive particles CB may be disposed between the first pads PD1 and the bumps BMP. Thus, the conductive particles CB may electrically connect the display panel DP and the printed circuit board FPC. In one embodiment, each of the conductive particles CB may include a core comprising an insulating polymer and a conductive film surrounding the core and comprising a conductive metal.

[0114] In order to electrically connect the display panel DP and the printed circuit board FPC through the anisotropic conductive film ACF, a bonding process may be performed by applying heat and pressure. Through the bonding process, the anisotropic conductive film ACF may bond the first pads PD1 and the bumps BMP.

[0115] At this time, if the conductive particles CB are not fixed and become compressed due to the applied heat and pressure, poor contact between the first pad PD1 and the bump BMP may occur. For example, if the thickness of the first pad PD1 is greater than the thickness of the inspection line TL, a relatively large step is formed between the area where the first pad PD1 is located and the area where the inspection line TL is located, the conductive particles CB may tilt toward the area where the inspection line TL is located. This may cause problems such as dark spots, electrical shorts, and damage to the first pad PD1 or the bump BMP.

[0116] In contrast, even when the thickness of the first pad PD1 is greater than the thickness of the inspection wiring TL, a relatively small step is formed between the area where the first pad PD1 is configured and the area where the inspection wiring TL is configured, the conductive particles CB can be prevented from tilting toward the area where the inspection wiring TL is configured.

[0117] According to one embodiment of the present invention, the display device DD may include the inspection wiring TL configured between the first pads PD1 and the dummy pads DPD configured between the inspection wiring TL. Each of the first pads PD1 and the dummy pads DPD may have a thickness greater than that of the inspection wiring TL. The dummy pads DPD can compensate for the thickness step between the area where the first pads PD1 are configured and the area where the inspection wiring TL is configured, thereby preventing problems such as the extrusion of the conductive particles CB that may occur during the bonding process of the display panel DP and the printed circuit board FPC. Based on this, a display device DD that prevents damage to the display panel DP and the printed circuit board FPC and improves reliability can be provided.

[0118] The present invention can be applied to display devices and electronic devices including the same. For example, the present invention can be applied to high-resolution smartphones, mobile phones, smart pads, smart watches, tablet PCs, car navigation systems, televisions, computer monitors, notebooks, and the like.

[0119] The above description is made with reference to exemplary embodiments of the present invention, but a person having ordinary knowledge in the technical field will understand that various modifications and changes can be made to the present invention without departing from the concept and scope of the present invention described in the appended claims.

Claims

1. A display device, characterized in that: include: a first pad group including first pads spaced apart from each other in a first direction; a second pad group spaced apart from the first pad group in a second direction intersecting the first direction and comprising second pads spaced apart from each other in the first direction; inspection wirings, which are arranged between the first pads and extend in the second direction respectively, are spaced apart from each other in the first direction, and are connected to the second pads respectively; as well as The dummy pad is arranged between the inspection wirings.

2. The display device according to claim 1, wherein The dummy pad and the first pad are arranged side by side in the first direction.

3. The display device according to claim 1, wherein The inspection wirings and the dummy pads are alternately arranged.

4. The display device according to claim 1, wherein The first pads and the dummy pads each have the same length in the second direction.

5. The display device according to claim 1, wherein The first pad and the dummy pad are made of the same material.

6. The display device according to claim 1, wherein A thickness of each of the first pad and the dummy pad is greater than a thickness of each of the inspection wirings.

7. The display device according to claim 1, wherein The display device further includes: The printed circuit board is arranged on the first pad group and the dummy pad.

8. The display device according to claim 7, wherein: The display device further includes: An anisotropic conductive film is disposed between the first pad group and the dummy pad and the printed circuit board.

9. The display device according to claim 1, wherein The display device further includes: The integrated circuit is configured on the second pad group.

10. A display device, characterized in that: include: a substrate comprising a display area and a non-display area adjacent to the display area; A light emitting element and a light receiving element are arranged in the display area on the substrate; a first pad group, arranged in the non-display area on the substrate and comprising first pads spaced apart from each other in a first direction; inspection wirings, arranged between the first pads, extending in a second direction intersecting the first direction, and spaced apart from each other in the first direction; as well as The dummy pads are respectively arranged between the inspection wirings.

11. The display device according to claim 10, wherein: The dummy pad and the first pad are arranged side by side in the first direction.

12. The display device according to claim 10, wherein: The inspection wirings and the dummy pads are alternately arranged.

13. The display device according to claim 10, wherein: The first pads and the dummy pads each have the same length in the second direction.

14. The display device according to claim 10, wherein The first pad and the dummy pad are made of the same material.

15. The display device according to claim 10, wherein A thickness of each of the first pad and the dummy pad is greater than a thickness of each of the inspection wirings.

16. The display device according to claim 10, wherein The display device further includes: a second pad group, arranged in the non-display area on the substrate, spaced apart from the first pad group in the second direction, and comprising second pads spaced apart from each other in the first direction; The inspection wirings are connected to the second pads, respectively.

17. The display device according to claim 16, wherein: The display device further includes: a printed circuit board, disposed on the first pad group and the dummy pad; and The integrated circuit is configured on the second pad group.

18. The display device according to claim 17, wherein: The second pad is electrically connected to the light receiving element.

19. The display device according to claim 18, wherein The display device further includes: a readout wiring, arranged on the substrate and electrically connected to the integrated circuit, The second pad is electrically connected to the light receiving element via the readout wiring.

20. The display device according to claim 17, wherein The display device further includes: An anisotropic conductive film is disposed between the first pad group and the dummy pad and the printed circuit board.

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