System-in-package structure and leading-out terminal structure thereof

Abstract

The utility model relates to a system-in-package structure and a leading-out terminal structure thereof, the system-in-package structure comprises a package substrate and plastic package layers, the package substrate comprises a first surface and a second surface opposite to the first surface, the plastic package layers are located on the first surface and the second surface, and a plurality of metal circuit layers are arranged in the package substrate along the direction from the first surface to the second surface. The at least one metal circuit layer is electrically connected with a leading-out end wire, the first end of the leading-out end wire is electrically connected with a pin of a target electronic element on the packaging substrate through a conductive via hole formed in the packaging substrate in the direction from the first face to the second face, and the second end of the leading-out end wire is parallel to the first face and the second face and extends to the edge of the packaging substrate. And a leading-out end structure is formed on the side wall of the system-in-package structure. The leading-out end structure does not occupy the surface of the top layer and the bottom layer of the packaging substrate, more on-board area can be reserved as an electronic element mounting area, the current flowing capacity can be adjusted by adjusting the wiring width of the leading-out end, and the lead-out end structure has the advantages of being high in flexibility and wide in adaptability.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductor packaging, in particular to a system-level packaging structure and a lead-out terminal structure thereof. Background Art

[0002] As the feature size of traditional Moore's Law continues to approach the physical limit of integrated circuit technology, simply reducing the chip feature size can no longer meet the needs of the development of semiconductor technology and electronic products. From the perspective of packaging technology, system-level packaging technology organically combines multiple active electronic components with different functions with passive devices such as resistors and capacitors, as well as other components, and packages them into a package body to achieve a single standard packaged device with certain functions. This technology is considered to be another technical route to continue Moore's Law and is receiving more and more attention and application.

[0003] In system-level packaging (SLP) technology, double-sided plastic encapsulation allows for the placement of electronic components on both the top and bottom layers of the package substrate, enabling the integration of more electronic components and improving system integration. This has led to its gradual development and adoption. Because both the top and bottom layers of this double-sided plastic encapsulation structure are equipped with electronic components and encapsulation compound, solder bumping on these surfaces for external connections consumes surface area, limiting the number and variety of electronic components that can be mounted on the substrate. Utility Model Content

[0004] The first object of the present invention is to provide a lead-out terminal structure for a system-level packaging structure, so as to achieve external electrical connection of the system-level packaging structure while avoiding occupying the surface area of ​​the top and bottom layers of the packaging substrate.

[0005] The second object of the present invention is to provide a system-level packaging structure using the above-mentioned lead-out terminal structure.

[0006] To achieve the above objectives, the present invention provides the following technical solutions:

[0007] A lead-out terminal structure for a system-level packaging structure, the system-level packaging structure includes a packaging substrate and a plastic packaging layer, the packaging substrate includes a first surface and a second surface opposite to the first surface, the plastic packaging layer is respectively located on the first surface and the second surface, a plurality of metal circuit layers are arranged inside the packaging substrate along the direction from the first surface to the second surface, at least one layer of the metal circuit layer of the packaging substrate is electrically connected to a lead-out terminal trace, a first end of the lead-out terminal trace is electrically connected to a pin of a target electronic component on the packaging substrate through a conductive via arranged inside the packaging substrate along the direction from the first surface to the second surface, and a second end of the lead-out terminal trace extends to an edge of the packaging substrate along a direction parallel to the first surface and the second surface, and is flush with the side wall of the packaging substrate and the side wall of the plastic packaging layer, so as to form a lead-out terminal structure on the side wall of the system-level packaging structure.

[0008] In one embodiment of the present application, at least two of the metal circuit layers are connected to the lead-out wiring.

[0009] In one embodiment of the present application, the first ends of the lead-out traces of each layer are electrically connected through the conductive vias.

[0010] In one embodiment of the present application, the packaging substrate includes an insulating layer alternately interspersed with the metal circuit layer, and the conductive via is arranged in the insulating layer.

[0011] In one embodiment of the present application, the metal circuit layer is electrically connected to at least two of the lead-out terminal traces to form at least two lead-out terminal structures on the sidewall of the system-level package structure.

[0012] In one embodiment of the present application, the width of the lead-out trace is greater than or equal to the diameter of the conductive via.

[0013] A system-level packaging structure has a lead-out terminal structure as described above.

[0014] It can be seen from the above technical solution that the utility model discloses a lead-out terminal structure for a system-level packaging structure, which includes a packaging substrate and a plastic packaging layer. The packaging substrate includes a first surface and a second surface opposite to the first surface. The plastic packaging layer is respectively located on the first surface and the second surface. A plurality of metal circuit layers are arranged inside the packaging substrate along the direction from the first surface to the second surface. At least one metal circuit layer of the packaging substrate is electrically connected to a lead-out terminal trace. The first end of the lead-out terminal trace is electrically connected to the pin of the target electronic component on the packaging substrate through a conductive via arranged inside the packaging substrate along the direction from the first surface to the second surface. The second end of the lead-out terminal trace extends to the edge of the packaging substrate along a direction parallel to the first surface and the second surface, and is flush with the side wall of the packaging substrate and the side wall of the plastic packaging layer to form a lead-out terminal structure on the side wall of the system-level packaging structure.

[0015] The above-mentioned lead-out terminal structure is led out from the side wall of the packaging substrate, and will not occupy the top and bottom surfaces of the packaging substrate, that is, the surface area of ​​the first surface and the second surface. More board area can be reserved for the electronic component mounting area, which has the advantage of high integration. The current flow capacity can be adjusted by adjusting the lead-out terminal trace width, and it has the advantages of high flexibility and wide adaptability. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0017] Figure 1 A schematic diagram of the system-level packaging structure provided by an embodiment of the present invention;

[0018] Figure 2 A top view of the method for manufacturing the system-level packaging structure provided by an embodiment of the present invention after the step of plastic packaging the packaging substrate.

[0019] In the picture:

[0020] 1 is the package substrate; 2 is the plastic layer; 3 is the electronic component; 4 is the lead-out structure; 5 is the conductive via; 6 is the functional area; 7 is the cutting area; 8 is the dividing line. DETAILED DESCRIPTION

[0021] One of the core aspects of the present invention is to provide a lead-out structure for a system-level packaging structure. The structural design of the lead-out structure enables the system-level packaging structure to be electrically connected to the outside while avoiding occupying the top and bottom surface areas of the packaging substrate.

[0022] Another core of the present invention is to provide a system-level packaging structure using the above-mentioned lead-out terminal structure.

[0023] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0024] See also Figure 1 , Figure 1 A schematic diagram of the system-level packaging structure provided by an embodiment of the present invention.

[0025] An embodiment of the present application provides a lead-out terminal structure 4 for a system-level packaging structure, wherein the system-level packaging structure includes a packaging substrate 1 and a plastic packaging layer 2, the packaging substrate 1 includes a first surface and a second surface opposite to the first surface, the plastic packaging layer 2 is respectively located on the first surface and the second surface, a plurality of metal circuit layers are arranged inside the packaging substrate 1 along the direction from the first surface to the second surface, at least one metal circuit layer of the packaging substrate 1 is electrically connected to a lead-out terminal trace, a first end of the lead-out terminal trace is electrically connected to a pin of a target electronic component 3 on the packaging substrate 1 through a conductive via 5 arranged inside the packaging substrate 1 along the direction from the first surface to the second surface, a second end of the lead-out terminal trace extends to the edge of the packaging substrate 1 along a direction parallel to the first surface and the second surface, and is flush with the side wall of the packaging substrate 1 and the side wall of the plastic packaging layer 2, so as to form a lead-out terminal structure 4 on the side wall of the system-level packaging structure.

[0026] The width of the lead structure 4 is determined by the width of the lead trace, and the length is determined by the thickness of the package substrate 1. When a large current needs to flow through the lead, the current requirement can be met by adjusting the width of the lead trace.

[0027] Compared with the prior art, the lead-out terminal structure 4 provided in the embodiment of the present invention is led out from the side wall of the packaging substrate 1, and does not occupy the top and bottom surfaces of the packaging substrate 1, that is, the surface area of ​​the first surface and the second surface. More board area can be reserved for use as the mounting area of ​​the electronic components 3, which has the advantage of high integration, and the current flow capacity can be adjusted by adjusting the lead-out terminal trace width, which has the advantages of high flexibility and wide adaptability.

[0028] In one embodiment of the present application, at least two metal circuit layers are connected to lead-out wiring, and the lead-out wiring connected to each metal circuit layer can extend in the same direction or in different directions. Figure 1In the illustrated embodiment, each metal circuit layer is connected to a lead-out line, and the lead-out lines connected to each metal circuit layer extend in the same direction, so that the second end of each lead-out line forms a stacked structure from the first surface to the second surface.

[0029] To further optimize the above technical solution, the first ends of the lead-out wirings of each layer are electrically connected through the conductive vias 5 .

[0030] like Figure 1 As shown, the package substrate 1 includes an insulating layer alternately interspersed with the metal circuit layer, and the conductive via 5 is arranged in the insulating layer, so that the second end of the lead-out line and the different insulating layers of the package substrate 1 form a sidewall lead-out structure 4 interspersed with each other.

[0031] like Figure 1 As shown, the metal circuit layer is electrically connected to at least two lead-out terminal traces to form at least two lead-out terminal structures 4 on the side wall of the system-level packaging structure, that is, the side wall of the system-level packaging structure can form two or more lead-out terminal structures 4, and each lead-out terminal structure 4 can be electrically connected to the pin of the same electronic component 3, or can be electrically connected to the pins of different electronic components 3.

[0032] To further optimize the above technical solution, in one embodiment of the present application, the width of the lead-out trace is greater than or equal to the diameter of the conductive via 5 .

[0033] An embodiment of the present application also provides a system-level packaging structure, which has a lead-out terminal structure 4 as described in the above embodiment. Since the system-level packaging structure has the lead-out terminal structure 4 in the above embodiment, the technical effect of the system-level packaging structure please refer to the above embodiment.

[0034] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referenced to each other.

[0035] This document uses specific examples to illustrate the principles and implementation methods of the present invention. The above examples are only intended to help you understand the core concept of the present invention. It should be noted that those skilled in the art can make various improvements and modifications to the present invention without departing from the principles of the present invention, and such improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A terminal structure for a system-level packaging structure, the system-level packaging structure comprising a packaging substrate and a plastic encapsulation layer, the packaging substrate comprising a first surface and a second surface opposite to the first surface, the plastic encapsulation layer being located on the first surface and the second surface, respectively, and a plurality of metal circuit layers being disposed within the packaging substrate along a direction from the first surface to the second surface, characterized in that: At least one metal circuit layer of the packaging substrate is electrically connected to a lead-out line, and a first end of the lead-out line is electrically connected to a pin of a target electronic component on the packaging substrate through a conductive via arranged inside the packaging substrate along a direction from the first surface to the second surface, and a second end of the lead-out line extends to an edge of the packaging substrate along a direction parallel to the first surface and the second surface, and is flush with the side wall of the packaging substrate and the side wall of the plastic encapsulation layer, so as to form a lead-out structure on the side wall of the system-level packaging structure.

2. The lead-out terminal structure according to claim 1, wherein: At least two of the metal circuit layers are connected to the lead-out wiring.

3. The lead-out terminal structure according to claim 2, wherein: The first ends of the lead-out wirings of each layer are electrically connected through the conductive vias.

4. The lead-out terminal structure according to any one of claims 1 to 3, wherein: The packaging substrate includes an insulating layer alternately interspersed with the metal circuit layer, and the conductive via is arranged in the insulating layer.

5. The lead-out terminal structure according to any one of claims 1 to 3, characterized in that: The metal circuit layer is electrically connected to at least two of the lead-out terminal traces to form at least two lead-out terminal structures on the sidewall of the system-level package structure.

6. The lead-out terminal structure according to any one of claims 1 to 3, characterized in that: The width of the lead-out trace is greater than or equal to the diameter of the conductive via.

7. A system-level packaging structure, characterized in that: The system-level packaging structure has the lead-out terminal structure according to any one of claims 1 to 6.

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