Optimized and adjustable charging voltage-sharing device for super-capacitor power supply module based on CAN (Controller Area Network) bus

Abstract

The utility model discloses a CAN bus-based super-capacitor power supply module optimized adjustable charging voltage-sharing device, which comprises a super-capacitor power supply module, a CAN bus and an upper computer, and is characterized in that the super-capacitor power supply module and the upper computer carry out data interaction through CAN bus networking; voltage data of N * M super capacitors in a super capacitor power supply module and charging current data of M charging voltage-sharing branches are collected and transmitted to an upper computer through a CAN bus to be processed and analyzed, and a charging mode, constant-current charging current and voltage-sharing charging control data are sent to a core processor to be controlled. The constant-current charging current of the branch is adjusted according to the characteristics of the super capacitor monomer of each charging voltage-sharing branch, and the monomer is serially connected / disconnected according to the voltage difference between the monomers to control voltage sharing, so that the overall charging efficiency is improved, the charging energy consumption is reduced, overcharging is prevented, the problem of voltage imbalance is solved, and the influence of the abnormal monomer on the overall charging of the super capacitor power supply is reduced. And the method has important significance for ensuring the safety of the super-capacitor power supply.

Description

Technical Field

[0001] The utility model belongs to the field of supercapacitor charging devices, and in particular relates to an optimized and adjustable charging voltage balancing device for a supercapacitor power module based on a CAN bus. Background Art

[0002] With the rapid development of green energy, energy storage devices have received increasing attention. Among them, supercapacitors have gradually attracted widespread attention due to their outstanding advantages and irreplaceable nature in special scenarios. Compared with traditional energy storage components, they have lower series equivalent resistance, longer service life, wider temperature operating range, faster energy replenishment speed, higher power density, and are more environmentally friendly. They have been widely used in various high-power scenarios, such as new energy buses, subways and other large-scale transportation vehicles.

[0003] Due to differences in supercapacitor manufacturing processes, their internal resistance and capacitance parameters will vary. In actual applications, due to the low rated voltage and capacity of supercapacitor cells, multiple supercapacitors need to be used in series and parallel combination to increase the supercapacitor power supply voltage and supercapacitor power supply capacity. In supercapacitor power supplies, supercapacitors will age with the increase in charge and discharge times and thermal effects, exacerbating the differences in internal resistance and capacitance parameters. The different aging states of supercapacitor cells during charging will cause the supercapacitor power supply to have problems such as low charging efficiency, unbalanced cell voltage, increased energy consumption, overcharging, and over-discharging.

[0004] Common supercapacitor voltage balancing methods include the parallel resistor method and the parallel transfer capacitor method; the parallel voltage balancing resistor method consumes energy to balance the voltage, and the consumed energy is dissipated as heat, which increases the ambient temperature and thus reduces the system reliability; the parallel transfer capacitor method transfers energy to balance the voltage, reducing energy loss, but as the number of supercapacitors in series increases, the number of transfer capacitors needs to be increased to ensure voltage balancing efficiency, resulting in a complex circuit topology and increased difficulty in circuit design. Therefore, a supercapacitor power module optimization and adjustable charging voltage equalization device based on CAN bus is invented to collect supercapacitor cell voltage data and charging current data of charging voltage equalization branches in each charging voltage equalization branch of the supercapacitor power module, upload the collected data to the algorithm platform host computer through CAN bus networking to optimize the control parameters, and send the optimized control parameters to the core processor. The core processor controls the charging mode switching and constant current adjustment of each charging voltage equalization branch according to the received optimized control parameters, and controls the action of the dual-channel (normally open / normally closed) switch to connect / disconnect the supercapacitor cell in series with the main circuit to make the charging current bypass for voltage equalization, thereby improving the overall charging efficiency of the supercapacitor power module, reducing charging energy consumption, preventing overcharging, solving the voltage imbalance problem, and reducing the impact of abnormal cells on the overall charging of the supercapacitor power supply, which is of great significance to ensuring the safety of the supercapacitor power supply. Summary of the Invention

[0005] Based on the above background, the present invention provides an optimized and adjustable charging voltage balancing device for a supercapacitor power module based on a CAN bus.

[0006] The technical solution of the utility model to solve the above problems is: a supercapacitor power module optimization and adjustable charging voltage equalization device based on CAN bus includes a supercapacitor power module, a CAN bus and an algorithm platform host computer. The supercapacitor power module and the algorithm platform host computer are connected through the CAN bus to realize data transmission between the supercapacitor power module and the algorithm platform host computer, and the algorithm platform host computer completes data processing and analysis.

[0007] In the present invention, the supercapacitor power module based on CAN bus is optimized and adjustable charging voltage equalization device, which is characterized in that: the supercapacitor power module includes M Parallel charging voltage equalization branches, independent charging control switch group, core processor, CAN bus transceiver module; M charging voltage-equalizing branches, each of which includes a charging control circuit, a supercapacitor group, a current and voltage acquisition circuit, and a voltage-equalizing control circuit; the charging control circuit is connected to the core processor, and the core processor sends the charging mode parameters and the charging current size to the charging control circuit. The charging control circuit switches between constant current and constant voltage charging modes according to the received charging mode parameters. In the constant current charging mode, the charging current is set according to the received charging current size; the supercapacitor group includes N The current and voltage acquisition circuit is connected to the supercapacitor group and is responsible for collecting the voltage of the supercapacitor cells and the charging current of the supercapacitor group. The current and voltage acquisition circuit is connected to the core processor and sends the collected data to the core processor for processing. The voltage balancing control circuit includes N A dual-channel voltage-equalizing switch, each supercapacitor cell in the supercapacitor group is equipped with a corresponding dual-channel voltage-equalizing switch, the dual-channel voltage-equalizing switch has a normally closed channel and a normally open channel, the normally closed channel is connected to the main charging circuit, and the normally open channel is connected to the voltage-equalizing circuit. When the difference between the cell voltage in the supercapacitor group and the average voltage of all cells in the supercapacitor group exceeds the set safety threshold, the voltage-equalizing control circuit will actuate the dual-channel voltage-equalizing switch corresponding to the cell with a voltage greater than the average value according to the voltage-equalizing control parameters sent by the core processor, the normally closed channel will be disconnected, the normally open channel will be closed, the cell with a high voltage will be disconnected from the main charging circuit, and the charging current will bypass the cell with a high voltage to continue charging. When the average voltage of other cells reaches the voltage of the cell being equalized, the dual-channel voltage-equalizing switch will be actuated, the normally closed channel will be closed, the normally open channel will be disconnected, and the cell will be connected in series to the main charging circuit for charging. The independent charging control switch group includes M-1 switch, a switch is set between every two adjacent charging voltage equalization branches, and the independent charging control switch group is connected to the core processor. When the supercapacitor power module is charged, the control M - 1 switch is disconnected, M The charging equalization branches are charged independently, and when charging is completed, the control M -1 switch is closed; the core processor is connected to the independent charging control switch group, the charging control circuit, the voltage equalizing control circuit, the supercapacitor group, the current and voltage acquisition circuit, and the CAN bus transceiver module; the CAN bus transceiver module is connected to the core processor, and through the CAN bus networking, the core processor transmits the collected single-cell voltage and supercapacitor group charging current data to the algorithm platform host computer, and the algorithm platform host computer transmits the optimized constant current charging current of each charging voltage equalizing branch to the core processor.

[0008] In the present utility model, the supercapacitor power supply module is characterized in that: the charging control circuit adopts the digital-to-analog conversion chip DAC5578 as the current regulating device in the constant current mode, the voltage regulator chip LM317 as the voltage regulating device in the constant voltage mode, and the relay SRD-12VDC-SL-C as the switching switch of the constant current / constant voltage charging mode. The charging control circuit controls the relay to close / open according to the charging mode parameters sent by the core processor to achieve charging mode switching, and adjusts the charging current according to the size of the sent charging current in the constant current mode.

[0009] In the present invention, the supercapacitor power module is characterized in that the supercapacitor group uses supercapacitor monomers BCAP035 E270 T11 350F produced by Maxwell.

[0010] In the present utility model, the supercapacitor power supply module is characterized in that: the current and voltage acquisition circuit adopts the high-precision chip dual operational amplifier LM358AD as the voltage acquisition chip to collect the voltage of the supercapacitor monomer in the supercapacitor group; and adopts the chip-type isolated integrated Hall sensor CH70120CU3 as the current acquisition chip to collect the charging current of the supercapacitor group.

[0011] In the present utility model, the supercapacitor power supply module is characterized in that: the voltage-equalizing control circuit uses a dual-channel relay (normally open / normally closed) as the voltage-equalizing switch of the supercapacitor monomer, adopts the NPN transistor SS8050 as the driving circuit element of the dual-channel relay (normally open / normally closed), controls the base of the transistor SS8050 to be on and off through the core processor, drives the dual-channel relay (normally open / normally closed) to operate, and realizes the voltage-equalizing charging of the supercapacitor.

[0012] In the present utility model, the supercapacitor power supply module is characterized in that: the independent charging control switch group adopts the relay SRD-12VDC-SL-C as the independent charging control switch. During charging, the core processor controls the relay to close and disconnect the charging equalizing branches, thereby realizing independent charging of each charging equalizing branch.

[0013] In the present invention, the supercapacitor power module is characterized in that the CAN bus transceiver module uses a TCAN1042 chip, which converts logic-level signals from the main control module into differential-level signals on the CAN bus, transmitting signals via the differential signals. The CAN bus transceiver module includes input power filtering, anti-interference, and protection circuits.

[0014] The beneficial effects of the utility model are: the utility model uses CAN bus communication technology to form a network, constructs a super capacitor power module to optimize the adjustable charging voltage equalization device, collects the super capacitor power module N × M Supercapacitor voltage data and M The charging current of each charging voltage-equalizing branch is transmitted to the algorithm platform host computer via the CAN bus for data processing and optimization analysis, and the charging mode, constant current charging current, and voltage-equalizing charging control data are sent to the core processor to control the charging voltage. The constant current charging current of each branch is adjusted according to the different characteristics of the supercapacitor monomers in each charging voltage-equalizing branch. The voltage is controlled by connecting / disconnecting the monomer according to the voltage difference between the monomers, thereby improving the overall charging efficiency of the supercapacitor power supply module, reducing charging energy consumption, preventing overcharging, solving the voltage imbalance problem, and reducing the impact of abnormal monomers on the overall charging of the supercapacitor power supply. It is of great significance to ensure the safety of the supercapacitor power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is the structural diagram of the supercapacitor power module of the utility model;

[0016] Figure 2 This is a diagram showing an embodiment of the charging control circuit of the present utility model;

[0017] Figure 3 Schematic diagram of an embodiment of the utility model voltage-equalizing control circuit;

[0018] Figure 4 This is a diagram showing an embodiment of the current acquisition circuit of the present utility model;

[0019] Figure 5 This is a diagram showing an embodiment of the voltage acquisition circuit of the present utility model;

[0020] Figure 6 This is a diagram showing an embodiment of the independent charging control switch group of the utility model;

[0021] Figure 7 Schematic diagram of the core processor embodiment of the utility model;

[0022] Figure 8 This is a circuit diagram of a CAN bus transceiver module according to the present invention. DETAILED DESCRIPTION

[0023] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0024] See attached figure, Figure 1 This is a structural diagram of the supercapacitor power module of the utility model, which includes M Charging voltage equalization branch, independent charging control switch group, core processor, CAN bus transceiver module;

[0025] The said i The charging voltage equalization branch includes a charging control circuit i , supercapacitor group i , current and voltage acquisition circuit i , voltage equalization control circuit i , 1≤ i ≤ M ; The charging control circuit i Receive the charging mode parameters and charging current sent by the core processor, and switch the supercapacitor group according to the charging mode parameters i In constant current charging mode, the supercapacitor group is set according to the received charging current. i The charging current of the supercapacitor group i include N Supercapacitor cells connected in series C i1 -C iN ; The current and voltage acquisition circuit i With supercapacitor pack i , responsible for collecting the voltage of the single cell in the supercapacitor group and the supercapacitor group i Charging current, current and voltage acquisition circuit i Connected to the core processor, the collected data is sent to the core processor for processing; the voltage control circuit i include N A dual-channel voltage-equalizing switch, S i1 -S iN , supercapacitor pack i Each supercapacitor cell C ij Equipped with a corresponding dual-channel pressure equalizing switch S ij , 1≤j ≤ N , dual channel pressure equalization switch S ij The switch has one normally closed channel and one normally open channel. The normally closed channel is connected to the main charging circuit, and the normally open channel is connected to the voltage equalization circuit. i Medium monomer C ij Voltage and supercapacitor pack i The difference between the average voltages of all cells in the circuit exceeds the set safety threshold, and the voltage control circuit i According to the voltage balancing control parameters sent by the core processor, the dual-channel voltage balancing switch corresponding to the monomer with voltage greater than the average value is turned on. S ij The normally closed channel is disconnected and the normally open channel is closed, disconnecting the monomer with high voltage from the main charging circuit. The charging current bypasses the monomer with high voltage and continues to charge. When the average voltage of other monomers reaches the voltage of the monomer being balanced, the dual-channel voltage equalization switch S ij Action, the normally closed channel is closed, the normally open channel is disconnected, and this monomer C ij It is then connected in series to the main charging circuit for charging; the independent charging control switch group includes M -1 switch S g1 -S gM-1 , each two adjacent charging voltage equalization branches share a switch, and the switch is on during charging S g1 -S gM-1 Disconnect, disconnect the M parallel charging equalization branches for independent charging, and switch when charging is completed S g1 -S gM-1 Closed; the independent charging control switch group includes M -1 switch, a switch is set between every two adjacent charging voltage equalization branches, and the independent charging control switch group is connected to the core processor to control the switch when the supercapacitor power module is charging S g1 -S gM-1 disconnect, M Independent charging is carried out between the charging equalization branches, and the switch is controlled when charging is completed. S g1 -S gM-1 Closed; the core processor and the independent charging control switch group, charging control circuit i , voltage equalization control circuit i , supercapacitor group i, current and voltage acquisition circuit i , CAN bus transceiver module is connected; CAN bus transceiver module is connected to the core processor, and the core processor transmits the collected supercapacitor group through the CAN bus network i Neidi j Voltage of each cell and supercapacitor group i The charging current is sent to the algorithm platform host computer, and the algorithm platform host computer transmits the optimized charging current size to the core processor for the charging voltage equalization branch i To set the charging current, in the embodiment, M =2, N =3.

[0026] See attached figure, Figure 2 This is an embodiment diagram of the charging adjustable circuit of the utility model. The charging control circuit uses the digital-to-analog conversion chip DAC5578, the operational amplifier comparator LM2902 and the MOS tube 30N03 as the main components of constant current regulation. The SCL and SDA pins of the DAC5578 are connected to the PB7 and PB6 pins of the core processor. The target current is set and processed by the core processor as an analog signal and transmitted to the DAC5578. The 4-pin of the DAC5578 (U8) stabilizes the voltage through the comparator LM1 and the MOS tube, generating a constant current on R67, and the output end is connected to the 4-pin of the relay JK1; the 4-pin of the DAC5578 (U10) stabilizes the voltage through the comparator LM2 and the MOS tube, generating a constant current on R82, and the output end is connected Connect to pin 4 of relay JK2; use LM317 voltage regulator chip as the main component of constant voltage regulation, LM317 (U9) and resistor R73 form a constant voltage, which is output from pin 3 of LM317 (U9) to pin 5 of relay JK1, pin 3 of relay JK1 is connected to supercapacitor group 1, Mode1 is connected to core processor PB3 to control the constant current and constant voltage charging state switching of supercapacitor group 1; LM317 (U11) and resistor R94 form a constant voltage, which is output from pin 3 of LM317 (U11) to pin 5 of relay JK2, pin 3 of relay JK2 is connected to supercapacitor group 2, Mode2 is connected to core processor PB4 to control the constant current and constant voltage charging state switching of supercapacitor group 2.

[0027] See attached figure, Figure 3 This is an embodiment diagram of the voltage-equalizing control circuit of the utility model. The voltage-equalizing control circuit uses 6 magnetrons (normally open / normally closed) MDRR-DT as dual-channel voltage-equalizing switches and 6 NPN transistors SS8050 as driving devices of MDRR-DT. The bases of transistors Q7-Q9 are connected to the PC6-PC9 pins of the core processor. The core processor outputs a control driving signal to control the on-off of the transistors, thereby driving the MDRR-DT to realize the dual-channel voltage-equalizing switch S in the voltage-equalizing control circuit 1. 11、S 12 、S 13 The base of transistors Q10-Q12 is connected to the core processor PA8-PA9 pins, and the core processor outputs a control drive signal to control the on and off of the transistors, thereby driving the MDRR-DT action to realize the dual-channel voltage equalization switch S in the voltage equalization control circuit 2. 21 、S 22 、S 23 The supercapacitor group 2 is controlled to balance the voltage.

[0028] See attached figure, Figure 4 This is an embodiment diagram of the current acquisition circuit of the present invention. The current acquisition circuit uses two Hall sensors CH70120CU3 as current acquisition devices. Pins 4 and 5 of CH70120CU3 (U1) are connected to the charging voltage equalization branch 1 to acquire current and convert it into an analog voltage signal. Pin 3 is connected to the PC0 pin of the core processor to send the corresponding analog voltage signal to the core processor; pins 4 and 5 of CH70120CU3 (U2) are connected to the charging voltage equalization branch 2 to acquire current and convert it into an analog voltage signal. Pin 3 is connected to the PC1 pin of the core processor to send the corresponding analog voltage signal to the core processor.

[0029] See attached figure, Figure 5 This is an example of a voltage acquisition circuit of the utility model. The voltage acquisition circuit uses three dual-channel operational amplifiers LM358AD as the main voltage acquisition components. Pins 3 and 2 of LM358AD (U3) are connected to the supercapacitor monomer. C 12 The positive and negative poles of the LM358AD (U3) are connected, and the 1 pin is connected to the core processor PA1 pin; the 5 and 6 pins of the LM358AD (U3) are connected to the super capacitor monomer. C 11 The positive and negative poles of the LM358AD (U4) are connected, and the 1 pin is connected to the core processor PA0 pin; the 5 and 6 pins of the LM358AD (U4) are connected to the super capacitor monomer. C 13 The positive and negative poles of the LM358AD (U4) are connected, and the 1 pin is connected to the core processor PA2 pin; the 3 pin and the 2 pin of the LM358AD (U4) are connected to the super capacitor monomer. C 21 The positive and negative poles of the LM358AD (U5) are connected, and the 1 pin is connected to the core processor PA3 pin; the 3 pin and the 2 pin of the LM358AD (U5) are connected to the super capacitor monomer. C 23 The positive and negative poles of the LM358AD (U5) are connected, and the 1 pin is connected to the core processor PA5 pin; the 3 pin and the 2 pin of the LM358AD (U5) are connected to the super capacitor monomer. C 22The positive and negative poles are connected to each other, and the 1 pin is connected to the PA4 pin of the core processor.

[0030] See attached figure, Figure 6 This is an embodiment diagram of the independent charging control circuit of the utility model, which uses a relay SRD-12VDC-SL-C as a switch S g1 , pins 3 and 5 are connected to charging voltage equalization branch 1 and charging voltage equalization branch 2 respectively; NPN transistor SS8050 is used as the driver of the relay, the base of transistor Q3 is connected to the core processor PB10 pin, and the core processor outputs a control drive signal to control the transistor on and off, thereby driving the relay to realize S g1 control.

[0031] See attached figure, Figure 7 The core processor of the utility model is shown in the figure. The core processor adopts STM32F103RCT6 single chip microcomputer, which realizes the functions of data acquisition, internal ADC conversion, CAN bus communication, and control circuit. The single chip microcomputer pins PC0-PC1 and PA0-PA5 are connected to the current and voltage acquisition circuit 1 and 2 outputs CurOut1, CurOut2 and U respectively. 11 、U 12 、U 13 、U 21 、U 22 、U 23 1, 2 are connected; the MCU pins PA12 and PA11 are connected to the TXD and RXT pins of the TCAN1042 chip in the CAN bus transceiver module; the MCU pin PB10 is connected to the independent charging control circuit SG1; the MCU pins PB7 and PB6 are connected to the SDA and SCL pins of the DAC5578 chip in the charge adjustable circuits 1 and 2, and PB3 and PB4 are connected to the charge switching Mode1 and Mode2 in the charge adjustable circuits 1 and 2; the MCU pins PC6-PC9, PA8-PA9 are connected to the S 11 、S 12 、S 13 and S 21 、S 22 、S 23 connected.

[0032] See attached figure, Figure 8 This is a circuit diagram of an embodiment of the CAN bus transceiver module of the utility model. The CAN bus transceiver module uses the TCAN1042 chip. Two 60-ohm resistors are connected in series between the receiving and transmitting ports CANH and CANL to prevent signal distortion and reduce reflections and interference. PESD2CAN is a CAN-specific ESD protection diode to protect the chip from damage. The chip TXD and RXT pins are connected to the core processors PA12 and PA11, respectively.

Claims

1. A supercapacitor power module optimized and adjustable charging voltage equalization device based on CAN bus, characterized by The supercapacitor power module includes M Parallel charging voltage equalization branches, independent charging control switch group, core processor, CAN bus transceiver module; M The invention relates to a charging voltage-equalizing branch, each of which includes a charging control circuit, a supercapacitor group, a current and voltage acquisition circuit, and a voltage-equalizing control circuit; the charging control circuit is connected to the core processor, and the core processor sends the charging mode parameters and the charging current to the charging control circuit. The charging control circuit switches between constant current and constant voltage charging modes according to the received charging mode parameters. In the constant current charging mode, the charging current is set according to the received charging current; the current and voltage acquisition circuit is connected to the supercapacitor group, and is responsible for collecting the voltage of the single cells in the supercapacitor group and the charging current of the supercapacitor group. The current and voltage acquisition circuit is connected to the core processor and sends the collected data to the core processor for processing; the voltage-equalizing control circuit includes N A dual-channel voltage-equalizing switch, each supercapacitor cell in the supercapacitor group is equipped with a corresponding dual-channel voltage-equalizing switch, the dual-channel voltage-equalizing switch has a normally closed channel and a normally open channel, the normally closed channel is connected to the main charging circuit, and the normally open channel is connected to the voltage-equalizing circuit. When the difference between the cell voltage in the supercapacitor group and the average voltage of all cells in the supercapacitor group exceeds the set safety threshold, the voltage-equalizing control circuit will actuate the dual-channel voltage-equalizing switch corresponding to the cell with a voltage greater than the average value according to the voltage-equalizing control parameters sent by the core processor, the normally closed channel will be disconnected, the normally open channel will be closed, the cell with a high voltage will be disconnected from the main charging circuit, and the charging current will bypass the cell with a high voltage to continue charging. When the average voltage of other cells reaches the voltage of the cell being equalized, the dual-channel voltage-equalizing switch will be actuated, the normally closed channel will be closed, the normally open channel will be disconnected, and the cell will be connected in series to the main charging circuit for charging. The independent charging control switch group includes M -1 switch, a switch is set between every two adjacent charging voltage equalization branches, and the independent charging control switch group is connected to the core processor. When the supercapacitor power module is charged, the control M - 1 switch is disconnected, M The charging equalization branches are charged independently, and when charging is completed, the control M -1 switch is closed; the core processor is connected to the independent charging control switch group, the charging control circuit, the voltage equalization control circuit, the supercapacitor group, the current and voltage acquisition circuit, and the CAN bus transceiver module.

2. The CAN bus-based supercapacitor power module optimized adjustable charging voltage equalization device according to claim 1 is characterized in that The charging control circuit uses a digital-to-analog conversion chip DAC5578 as the main component for constant current regulation, an LM317 voltage regulator chip as the main component for constant voltage regulation, and an SRD-12VDC-SL-C relay as a switch for switching between constant current and constant voltage charging modes. The charging control circuit controls the relay switch according to the charging mode parameters sent by the core processor to complete the charging mode switching. In the constant current mode, the charging current is set according to the size of the sent charging current.

3. The CAN bus-based supercapacitor power module optimized adjustable charging voltage equalization device according to claim 1 is characterized in that The voltage-equalizing control circuit uses a magnetron (normally open / normally closed) MDRR-DT as a dual-channel voltage-equalizing switch. By comparing the voltage of a supercapacitor cell and the average voltage of all cells in the supercapacitor group, the magnetron (normally open / normally closed) is controlled to connect / disconnect the supercapacitor cell to the main charging circuit, thereby achieving voltage-equalizing charging of the supercapacitor group.

4. The CAN bus-based supercapacitor power module optimized adjustable charging voltage equalization device according to claim 1 is characterized in that The independent charging control switch group uses the relay SRD-12VDC-SL-C as the independent charging control switch, and controls the on and off of the relay through the core processor to achieve independent charging of each voltage-equalizing branch.

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