High isolation structure among multiple sampling circuits

By allocating independent layout areas for each circuit on the PCB board of the battery online core capacity device and setting up isolation strips, combining the use of components such as power supply isolation chips and optocoupling units, the interference problem between multiple sampling circuits is solved, and signal stability and accuracy are achieved.

CN223274290UActive Publication Date: 2025-08-26ZHUHAI DONGFAN NEW ENERGY CO LTD
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Patent Information

Application Number
CN202422460629.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-10-11
Publication Date
2025-08-26
Estimated Expiration
2034-10-11

AI Technical Summary

Technical Problem

In the existing online battery core capacity device, multiple voltage and current sampling circuits are susceptible to interference when integrated on the PCB board, affecting signal stability and accuracy.

Method used

The high isolation structure design is adopted, which includes allocating independent layout areas for each circuit on the PCB board, and setting up isolation strips between the areas, combining the use of power supply isolation chips, filter capacitors, isolation optocoupling units and other components to achieve isolation between circuits.

Benefits of technology

It effectively avoids interference between circuits and ensures the stability and accuracy of sampling signals. It is especially suitable for the integration of multiple sampling circuits on PCB boards with limited space.

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Abstract

The utility model provides a high isolation structure among multiple sampling circuits, which is characterized by comprising a single chip microcomputer, a diode sampling circuit and at least one battery voltage sampling circuit, the diode sampling circuit and the battery voltage sampling circuit are respectively provided with an independent layout area on a PCB (printed circuit board), isolation belts are arranged among the layout areas to isolate interference among the circuits. According to the utility model, the circuit structure and the PCB layout are synchronously isolated, so that the stability and accuracy of sampling signals are ensured, and the interference between the circuits is avoided, which is particularly important for integrating a plurality of sampling circuits on the PCB in a limited space.
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Description

Technical Field

[0001] The utility model relates to an online battery capacity verification device, in particular to a high isolation structure between multiple sampling circuits. Background Art

[0002] The battery online capacity verification device will include multiple voltage and current sampling circuits based on sampling needs. These sampling circuits need to be compactly integrated on the PCB board. To ensure the stability and accuracy of the sampling signals and avoid interference between circuits, an isolation design is required for the sampling circuit and PCB board layout. Utility Model Content

[0003] This utility model proposes a high isolation structure between multiple sampling circuits, the purpose of which is to ensure the stability and accuracy of the sampling signal and avoid interference between circuits. The specific technical content is as follows:

[0004] A high-isolation structure between multiple sampling circuits includes a single-chip microcomputer, a diode sampling circuit, and at least one battery voltage sampling circuit. The diode sampling circuit and the battery voltage sampling circuit each have independent layout areas on a PCB board, and isolation strips are provided between the layout areas to isolate interference between the circuits.

[0005] Furthermore, the battery voltage sampling circuit includes a plurality of voltage-dividing resistors connected in series to the two poles of the sampling terminal, the voltage-dividing output end of which is connected to the battery voltage sampling pin of the microcontroller, the low potential pole of the sampling terminal is grounded, and the voltage-dividing output end of the battery voltage sampling circuit is grounded via a filter capacitor.

[0006] Furthermore, a varistor is connected between the two poles of the sampling terminal.

[0007] Furthermore, the single-chip microcomputer has an isolated power supply circuit, which includes a power isolation chip and a voltage regulator and buck chip. The input end of the power isolation chip is connected to a DC source, and its output end is connected to the input end of the voltage regulator and buck chip. The output end of the voltage regulator and buck chip is connected to the power pin of the single-chip microcomputer.

[0008] Furthermore, the input end of the power isolation chip is connected to the DC source via a first choke inductor, the first choke inductor is connected to a first filter capacitor, the output end of the power isolation chip is connected to the input end of the voltage regulator and buck chip via a second choke inductor, and the second choke inductor is connected to a second filter capacitor.

[0009] Furthermore, the signal input pin and the signal output pin of the single chip microcomputer are respectively connected to an isolation optical coupling unit.

[0010] Furthermore, a diode sampling circuit, a first battery voltage sampling circuit, a second battery voltage sampling circuit, a fan control circuit, a temperature acquisition circuit, and a power supply circuit are sequentially arranged on the PCB board, and corresponding connection terminals for connecting each circuit are provided on the edge of the PCB board, and isolation strips are provided between the layout areas of each circuit.

[0011] Compared with the existing technology, the advantages of the present invention are: the isolation design is adopted simultaneously in the circuit structure and PCB board layout, which ensures the stability and accuracy of the sampling signal and avoids interference between circuits. This is especially important for integrating multiple sampling circuits on a PCB board with limited space. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 Schematic diagram of the layout structure of the PCB board.

[0013] Figure 2 This is the schematic diagram of the battery voltage sampling circuit.

[0014] Figure 3 This is the schematic diagram of the isolated power supply circuit for the microcontroller.

[0015] Figure 4 This is the schematic diagram of the communication isolation circuit of the microcontroller.

[0016] Figure 5 This is the circuit schematic diagram of the microcontroller. DETAILED DESCRIPTION

[0017] The following is combined with Figures 1 to 5 , further describe this application plan:

[0018] See attached Figure 1 The high isolation structure between multiple sampling circuits includes a single-chip microcomputer, a diode sampling circuit 1, a first battery voltage sampling circuit 21, a second battery voltage sampling circuit 22, a fan control circuit 3, a temperature acquisition circuit 4 and a power supply circuit 5. The above circuits have independent layout areas on the PCB board, and corresponding connection terminals for connecting each circuit are set at the edge of the PCB board. Isolation strips 6 are set between the layout areas of each circuit to isolate interference between circuits.

[0019] The isolation structure of each circuit specifically includes:

[0020] See attached Figure 2The battery voltage sampling circuit includes voltage-dividing resistors R181, R182, and R183 connected in series across sampling terminal P16. The high-potential end of voltage-dividing resistor R183 serves as a voltage-dividing output connected to the battery voltage sampling pin BAT1-ADC of the microcontroller. The low-potential end of sampling terminal P16 is grounded, and the voltage-dividing output of the battery voltage sampling circuit is grounded via filter capacitor C122. A varistor YMD2 is connected between the two terminals of sampling terminal P16.

[0021] See attached Figure 3 The microcontroller has an isolated power supply circuit, which includes a power isolation chip U57 and a voltage regulator and buck chip U59. The input of the power isolation chip U57 is connected to a +5V DC source, and its output is connected to the input of the voltage regulator and buck chip U59 to output a +5V voltage to it. The output of the voltage regulator and buck chip U59 is connected to the power pin of the microcontroller to output a stepped-down +3.3V voltage to it. The power isolation chip U57 is used to perform equivalent isolation of the +5V DC source, protecting the subsequent power supply circuit from DC source voltage fluctuations (surges, impacts), and then the voltage regulator and buck chip U59 performs secondary isolation and voltage reduction.

[0022] Furthermore, the input end of the power isolation chip U57 is connected to the +5V DC source via the first choke inductor L19, and the first choke inductor L19 is also connected to the first filter capacitor C126 for input side filtering. The output end of the power isolation chip U57 is connected to the input end of the voltage regulator and buck chip U59 via the second choke inductor L18, and the second choke inductor L18 is connected to the second filter capacitor C124 for output side filtering.

[0023] See attached Figure 4 To overcome potential interference and impact on the RS485 communication line, the signal input and output pins of the microcontroller are each connected to an isolation optocoupler unit. Specifically, the signal input pin is connected to an isolation optocoupler unit U56. The input side of the isolation optocoupler unit U56 is connected to the UART-RX terminal of the RS485 communication line, and the output side is connected to the base of transistor Q18. The electrical signal is amplified by transistor Q18 and then sent to the microcontroller. The signal output pin is connected to an isolation optocoupler unit U58. The input side of the isolation optocoupler unit U58 is connected to the microcontroller, and the output side is connected to the base of transistor Q19. The electrical signal is amplified by transistor Q19 and then sent to the UART-TX terminal of the RS485 communication line.

[0024] The utility model adopts isolation design in both circuit structure and PCB layout to ensure the stability and accuracy of sampling signals and avoid interference between circuits, which is particularly important for integrating multiple sampling circuits on a PCB board with limited space.

[0025] The above preferred embodiments should be regarded as examples of the implementation methods of the present application scheme. Any technical deductions, replacements, improvements, etc. that are identical or similar to the present application scheme or made based on it should be regarded as within the scope of protection of this patent.

Claims

1. A high isolation structure between multiple sampling circuits, characterized in that: The system includes a single-chip microcomputer, a diode sampling circuit, and at least one battery voltage sampling circuit. The diode sampling circuit and the battery voltage sampling circuit each have independent layout areas on a PCB board, and isolation strips are provided between the layout areas to isolate interference between the circuits.

2. The high isolation structure between multiple sampling circuits according to claim 1, characterized in that: The battery voltage sampling circuit includes multiple voltage-dividing resistors connected in series to the two poles of the sampling terminal. The voltage-dividing output end is connected to the battery voltage sampling pin of the microcontroller. The low potential pole of the sampling terminal is grounded. The voltage-dividing output end of the battery voltage sampling circuit is grounded through a filter capacitor.

3. The high isolation structure between multiple sampling circuits according to claim 2, characterized in that: A varistor is connected between the two poles of the sampling terminal.

4. The high isolation structure between multiple sampling circuits according to claim 1, characterized in that: The single-chip microcomputer has an isolated power supply circuit, which includes a power isolation chip and a voltage regulator and buck chip. The input end of the power isolation chip is connected to a DC source, and the output end is connected to the input end of the voltage regulator and buck chip. The output end of the voltage regulator and buck chip is connected to the power pin of the single-chip microcomputer.

5. The high isolation structure between multiple sampling circuits according to claim 4, characterized in that: The input end of the power isolation chip is connected to a DC source via a first choke inductor, the first choke inductor is connected to a first filter capacitor, the output end of the power isolation chip is connected to the input end of the voltage regulator and buck chip via a second choke inductor, the second choke inductor is connected to a second filter capacitor.

6. The high isolation structure between multiple sampling circuits according to claim 1, characterized in that: The signal input pin and signal output pin of the single chip computer are respectively connected to an isolation optical coupling unit.

7. The high isolation structure between multiple sampling circuits according to claim 1, characterized in that: The diode sampling circuit, first battery voltage sampling circuit, second battery voltage sampling circuit, fan control circuit, temperature acquisition circuit and power supply circuit are arranged in sequence on the PCB board. Corresponding connection terminals for each circuit are set at the edge of the PCB board, and isolation strips are set between the layout areas of each circuit.