Microdisplay device

Abstract

The utility model discloses a micro display device, which belongs to the technical field of semiconductors and comprises a driving wafer and a plurality of display device layers arranged on the driving wafer. Any display device layer comprises sub-pixels, and the tops of the sub-pixels in each display device layer are in contact with the same continuous transparent conductive layer; at least one display device layer further comprises an electrode conduction structure, the electrode conduction structure is conducted with an electrode contact in the driving wafer, and the electrode conduction structure comprises a first electrode conduction structure and a second electrode conduction structure which are stacked in the direction away from the driving wafer. The top height of the first electrode conduction structure is lower than the top height of the sub-pixel in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixel in the current display device layer.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductors, in particular to a micro display device. Background Art

[0002] In the field of microdisplay, in order to achieve colored display, there is a demand for multi-color stacking integration.

[0003] In related technologies, color stacking solutions are generally manufactured using the following process: pixelation, followed by filling with an insulating layer, then flattening, forming a through-hole interconnect structure, and stacking multiple times to complete the multi-color display; or, after pixelation, separating the cathode and anode layers with an insulating layer, then filling with an insulating layer, then flattening, forming a through-hole interconnect structure, and stacking multiple times to complete the multi-color display. All of these technologies require through-hole interconnects to connect to electrode contacts in the driver wafer to achieve addressing display.

[0004] However, with the trend toward smaller pixels, the aspect ratio of via fabrication is increasing, making processing more difficult and requiring the upgrading of high-end etching equipment suitable for nanoscale integrated circuits, which significantly increases processing costs. Furthermore, vias with large aspect ratios are prone to voids when filling with interconnecting metal, resulting in poor current transmission and further compromising the optoelectronic and reliability performance of the device. Utility Model Content

[0005] The purpose of the utility model is to provide a micro display device with better photoelectric performance.

[0006] In order to achieve the above-mentioned purpose of the utility model, the utility model proposes the following technical solutions:

[0007] The present application provides a stacked integrated micro display device, the micro display device comprising a driver wafer and a multi-layer display device layer disposed on the driver wafer;

[0008] Any of the display device layers includes sub-pixels, and the tops of the sub-pixels in each display device layer are in contact with the same continuous transparent conductive layer;

[0009] At least one of the display device layers also includes an electrode conduction structure, which is conductively connected to the electrode contacts in the driving wafer. The electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driving wafer. The top height of the first electrode conduction structure is lower than the top height of the sub-pixels in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixels in the current display device layer.

[0010] In a possible implementation, the first electrode conduction structure is a fence-style structure, and the first electrode conduction structure includes: a first partial structure arranged in a horizontal direction, and a second partial structure surrounding the first partial structure.

[0011] In a possible implementation, a color compound is disposed inside the first electrode conductive structure.

[0012] In one possible implementation, the top height of the color compound is not higher than the top height of the sub-pixel in the same display device layer, and the top height of the second part structure in the first electrode conduction structure is lower than the top height of the color compound.

[0013] In one possible implementation, the second electrode conductive structure includes: a third partial structure attached to the side wall of the color compound, and the third partial structure is in contact with the top or side wall of the second partial structure.

[0014] In a possible implementation, the second electrode conduction structure further includes: a fourth partial structure covering the color compound and the top of the third partial structure.

[0015] In a possible implementation manner, the top of the third partial structure is flush with the top of the color compound.

[0016] In a possible implementation, the angle of the second portion of the structure is between 45 degrees and 135 degrees.

[0017] In a possible implementation manner, the thickness of the second partial structure is between 10 nm and 1500 nm.

[0018] In a possible implementation, the first structure includes:

[0019] A bonding metal layer and a first ohmic contact layer are stacked in a direction away from the driving wafer.

[0020] In a possible implementation, the interior of the first electrode conductive structure is filled with an insulating medium to form an inner fence insulating layer, and the top height of the inner fence insulating layer is not higher than the top height of the second partial structure;

[0021] The second electrode conductive structure is covered on the first electrode conductive structure and the insulation layer inside the fence.

[0022] In a possible implementation, the angle of the second portion of the structure is between 45 degrees and 135 degrees.

[0023] In a possible implementation manner, the thickness of the second partial structure is between 10 nm and 1500 nm.

[0024] In a possible implementation, an outer edge of the second electrode conduction structure is farther away from a central axis of the electrode conduction structure than an outer edge of the first electrode conduction structure.

[0025] In a possible implementation, a bottom height of the second electrode conductive structure is no higher than a top height of the first electrode conductive structure.

[0026] In a possible implementation, the bottom height of the second electrode conductive structure is not lower than the height of the active layer in the sub-pixel in the same display device layer.

[0027] Compared with the prior art, the present invention has the following beneficial effects:

[0028] The micro-display device includes a driver wafer and a multi-layer display device layer arranged on the driver wafer. Any display device layer includes sub-pixels. The tops of the sub-pixels in each display device layer are in contact with the same continuous transparent conductive layer. At least one display device layer also includes an electrode conduction structure. The electrode conduction structure is conductively connected to the electrode contacts in the driver wafer. The electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driver wafer. The top height of the first electrode conduction structure is lower than the top height of the sub-pixels in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixels in the current display device layer. The stacked electrode conduction structure reduces the aspect ratio of the through-hole, which, on the one hand, reduces the processing difficulty of the through-hole process, and on the other hand, eliminates the problem of voids in the through-hole metal filling, thereby avoiding the problem of poor current transmission caused by the voids.

[0029] Furthermore, the bottom height of the second electrode conduction structure is designed to be no lower than the height of the active layer in the sub-pixel in the same display device layer, thereby avoiding the second electrode conduction structure from being too deep and reducing the difficulty of preparing the second electrode conduction structure.

[0030] Furthermore, the first electrode conduction structure includes: a first partial structure arranged in a horizontal direction, and a second partial structure surrounding the first partial structure. The first partial structure includes: a bonding metal layer and a first ohmic contact layer vertically stacked in a direction away from the driving wafer, so that the first partial structure can be formed by utilizing the bonding structure itself in the display device layer, and the second partial structure can be formed by utilizing the structure formed by reverse sputtering during the etching process of the first partial structure, thereby facilitating the preparation of the first electrode conduction structure.

[0031] It should be noted that the present invention only needs to achieve at least one of the above technical effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;

[0033] Figure 2 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;

[0034] Figure 3 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;

[0035] Figure 4 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;

[0036] Figure 5 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;

[0037] Figure 6 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;

[0038] Figure 7 It is a structural schematic diagram of a micro display device provided in an embodiment of the present application.

[0039] Markings in the figure: 100-driving wafer, 110-electrode contact, 200-first display device layer, 210-first sub-pixel, 300-second display device layer, 310-second sub-pixel, 400-third display device layer, 410-third sub-pixel, 510-first electrode conduction structure, 511-first partial structure, 512-second partial structure, 513-bonding metal layer, 514-first ohmic contact layer, 520-second electrode conduction structure, 521-third partial structure, 522-fourth partial structure, 530-color compound, 540-insulating layer in the fence, 600-transparent conductive layer, 700-metal reinforcement structure. DETAILED DESCRIPTION

[0040] To make the purpose, technical solutions, and advantages of the present invention more clear, the following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0041] In the description of the present invention, it should be understood that the terms "vertical", "upper", "lower", "top", "side", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0042] In the description of this utility model, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections, electrical connections; direct connections, indirect connections through an intermediate medium, and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this utility model based on specific circumstances.

[0043] In the embodiments of the present application, the shortcomings of non-aligned bonding metal and stacked devices in through-hole preparation are mainly optimized. An electrode conduction structure that is interconnected with the drive wafer is prepared through an unconventional through-hole process. In addition to the second electrode conduction structure in the through-hole style, the electrode conduction structure also includes a stacked fence style first electrode conduction structure, thereby greatly reducing the aspect ratio of the through-hole interconnection, reducing the process difficulty of through-hole preparation, and solving the void problem of through-hole interconnection metal filling.

[0044] Combined with reference Figures 1 to 2 An embodiment of the present application provides a micro display device, which includes a driving wafer 100 and a multi-layer display device layer arranged on the driving wafer 100.

[0045] Among them, any display device layer includes sub-pixels, and the tops of the sub-pixels in each display device layer are in contact with the same continuous transparent conductive layer 600; at least one display device layer also includes an electrode conduction structure, and the electrode conduction structure is conductive with the electrode contact 110 in the driving wafer 100, and the electrode conduction structure includes: a first electrode conduction structure 510 and a second electrode conduction structure 520 stacked in a direction away from the driving wafer 100, the top height of the first electrode conduction structure 510 is lower than the top height of the sub-pixels in the current display device layer, and the top height of the second electrode conduction structure 520 is not lower than the top height of the sub-pixels in the current display device layer.

[0046] In an embodiment of the present application, a micro-display device having multiple display device layers is provided. Each display device layer is provided with at least one sub-pixel, and the sub-pixels in different display device layers can be designed to emit light of different wavelengths, thereby achieving a color display. At least one display device layer is provided with a stacked electrode conductive structure. This electrode conductive structure includes a first electrode conductive structure 510 and a second electrode conductive structure 520 stacked in a direction away from the driver wafer 100. In this stacked electrode conductive structure, the first electrode conductive structure 510 is not higher than the height of the sub-pixels in the display device layer, and the second electrode conductive structure 520 is not lower than the height of the sub-pixels in the display device layer.

[0047] It can be understood that the present application does not limit the specific number of display device layers on the driver wafer 100. For example, the number of display device layers is two, and the first display device layer adopts this electrode conduction structure; the number of display device layers is three, and at least one of the first display device layer and the second display device layer adopts this electrode conduction structure.

[0048] Exemplary, with reference to Figure 1 、 Figure 2 , comprising three display device layers: a first display device layer 200, a second display device layer 300 and a third display device layer 400, wherein the first display device layer 200 comprises a first sub-pixel 210, the second display device layer 300 comprises a second sub-pixel 310, and the third display device layer 400 comprises a third sub-pixel 410, wherein the first display device layer 200 and the second display device layer 300 comprise a stacked electrode conduction structure, and the electrode conduction structure comprises a first electrode conduction structure 510 and a second electrode conduction structure 520 stacked in a direction away from the moving wafer.

[0049] Among them, the driver wafer 100 can be an active design that combines one or more of thin film transistors (TFT), low temperature polycrystalline silicon (LTPS), CMOS integrated circuits, high mobility transistors (HEMT), etc. Specifically, the driver wafer 100 is provided with a driving circuit, and the driving circuit is provided with at least one electrode contact 110. The driving circuit may include an active, passive or semi-passive control circuit. All electrode contacts 110 included in the driving circuit can be arranged linearly or in an array, and any electrode contact 110 is located in the middle or at the edge of the driver wafer 100. This embodiment does not limit this.

[0050] Among them, any display device layer is filled with an insulating layer, and the insulating layer includes materials such as silicon oxide, silicon nitride, SiC, SiCN, PSG, BPSG, polyimide, etc. This application does not limit the specific material of the insulating layer, as long as it is used to achieve the insulating function.

[0051] Each sub-pixel may include: a bonding metal layer 513 , a first ohmic contact layer 514 , an active layer, and a second ohmic contact layer stacked in a direction away from the driving wafer 100 .

[0052] It is understandable that the first ohmic contact layer 514 and the second ohmic contact layer in the present application can be designed to be a P-type ohmic contact layer and an N-type ohmic contact layer, respectively, or can be designed to be an N-type ohmic contact layer and a P-type ohmic contact layer, respectively.

[0053] For example, the sub-pixels are made of compound wafer materials. The structures of some compound wafers are as follows. In some practical applications, the film layers of the compound wafers will be more complex, or there will be cross-use of materials. The material range is not limited. It typically mainly includes P-type material (corresponding to the second ohmic contact layer or the first ohmic contact layer), N-type material (corresponding to the first ohmic contact layer or the second ohmic contact layer), and an MQW quantum well (corresponding to the active layer) sandwiched between the two, and other functional layers:

[0054]

[0055] In a possible implementation, the first electrode conduction structure 510 is a fence-style structure, and the first electrode conduction structure 510 includes: a first partial structure 511 arranged along the horizontal direction, and a second partial structure 512 surrounding the first partial structure 511.

[0056] In this implementation, the first electrode conduction structure 510 is designed to be composed of a first partial structure 511 and a second partial structure 512, and the first partial structure 511 can be used to electrically connect to the electrode conduction structure or driving wafer in the lower display device layer, and the second partial structure 512 can be used to electrically connect to the second electrode conduction structure 520 stacked in the current display device layer, thereby realizing the electrode conduction function.

[0057] Furthermore, the first partial structure 511 includes a bonding metal layer 513 and a first ohmic contact layer 514, stacked vertically away from the driver wafer. In other words, the first partial structure 511 is formed by utilizing the inherent bonding structure of the display device layer, thereby facilitating the fabrication of the fence-style first electrode conductive structure 510. The thickness of the bonding metal layer 513 is between 10nm and 1.5um. The thickness of the first ohmic contact layer 514 is between 5nm and 300nm.

[0058] Furthermore, under the above design, the second portion structure 512 of the first electrode conductive structure 510 can be formed by reverse sputtering during the etching process of the first portion structure 511, thereby facilitating the preparation of the fence-like first electrode conductive structure 510. The angle of the second portion structure 512 is between 45 degrees and 135 degrees, and the thickness of the second portion structure 512 is between 10 nm and 1500 nm.

[0059] In one possible implementation, Figure 3 、 Figure 4 As shown, the interior of the first electrode conduction structure 510 is filled with an insulating medium to form an inner-fence insulating layer 540, and the top height of the inner-fence insulating layer 540 is not higher than the top height of the second part structure 512; the second electrode conduction structure 520 is covered on the first electrode conduction structure 510 and the inner-fence insulating layer 540.

[0060] In this implementation, since the first electrode conductive structure 510 of the conductive interconnection is a fence-style structure, if the thickness is thin and the elastic modulus is small, collapse is likely to occur during the process. An insulating medium is filled inside the first electrode conductive structure 510, and the first electrode conductive structure 510 is supported by the insulating layer 540 inside the fence, so that the first electrode conductive structure 510 is attached to the side wall surface of the insulating layer 540 inside the fence, rather than being in a suspended state, thereby solving the problem of collapse. Under this design, the second electrode conductive structure 520 is entirely covered on the first electrode conductive structure 510 and the insulating layer 540 inside the fence. Among them, the top height of the second electrode conductive structure 520 can be as follows Figure 3 As shown, it is flush with the height of the sub-pixels in the same display device layer, or it can be as shown Figure 4As shown, it is higher than the height of the sub-pixels in the same display device layer. In addition, the top height of the insulation layer 540 within the fence can be flush with the top height of the second portion structure 512, or it can be lower than the top height of the second portion structure 512, so that the second portion structure 512 protrudes relative to the insulation layer 540 within the fence and is further embedded in the second electrode conductive structure 520.

[0061] In another possible implementation, Figure 5 、 Figure 6 、 Figure 7 As shown, a color compound 530 is disposed inside the first electrode conductive structure 510 .

[0062] In this implementation, since the first electrode conductive structure 510 of the conductive interconnection is a fence-style structure, if the thickness is thin and the elastic modulus is small, it is easy to collapse during the process. The color compound 530 is retained inside the first electrode conductive structure 510 to support the first electrode conductive structure 510, so that the first electrode conductive structure 510 is attached to the side wall surface of the color compound 530 instead of being in a suspended state, thereby solving the problem of collapse. In addition, the color compound 530 has better heat diffusion ability, which helps to dissipate heat as a whole. The angle of the color compound 530 is between 45 degrees and 135 degrees. The thickness of the color compound 530 is between 0.2um and 5um.

[0063] Furthermore, the top height of the color compound 530 is no higher than the top height of the sub-pixels in the same display device layer, and the top height of the second portion structure 512 in the first electrode conductive structure 510 is lower than the top height of the color compound 530. In other words, the remaining color compound 530 can be flush with or lower than the height of the sub-pixels in the same display device layer. Accordingly, to facilitate process implementation, the height of the prepared first electrode conductive structure 510 is lower than the height of the color compound 530.

[0064] Further, such as Figure 5 、 Figure 6 、 Figure 7 As shown, the second electrode conductive structure 520 includes a third portion 521 attached to the sidewalls of the color compound 530, and the third portion 521 contacts the top or sidewalls of the second portion 512. The third portion 521 surrounds the second electrode conductive structure 520 above the sidewalls of the color compound 530 that are not in contact with the second portion 512, thereby supporting the second electrode conductive structure 520 with the color compound 530 to prevent collapse.

[0065] Further, such as Figure 5As shown, the top of the third partial structure 521 is flush with the top of the color-based compound 530 .

[0066] Further, such as Figure 6 、 Figure 7 As shown, the second electrode conductive structure 520 further includes: a fourth portion structure 522 covering the top of the color compound 530 and the third portion structure 521. By adding the fourth portion structure 522 to the second electrode conductive structure 520, the current conduction capability of the electrode conductive structure can be further enhanced. Figure 6 As shown, the fourth part structure 522 can be added on top of the color compound 530 and the third part structure 521 after etching the color compound 530, as shown in FIG. Figure 7 As shown, a portion of the insulating layer may be retained on top of the color compound 530 and the sub-pixel 210 , and a fourth portion structure 522 may be further added to the portion of the insulating layer.

[0067] In a possible implementation, an outer edge of the second electrode conduction structure 520 is farther away from a central axis of the electrode conduction structure than an outer edge of the first electrode conduction structure 510 .

[0068] In this implementation, in order to ensure electrical contact between the second electrode conduction structure 520 and the first electrode conduction structure 510, the outer edge of the second electrode conduction structure 520 is designed to deviate further away from the central axis, so that the top second electrode conduction structure 520 can better contact the bottom first electrode conduction structure 510.

[0069] In a possible implementation, the bottom height of the second electrode conductive structure 520 is not higher than the top height of the first electrode conductive structure 510 .

[0070] In this implementation, in order to ensure electrical contact between the second electrode conduction structure 520 and the first electrode conduction structure 510, the bottom height of the second electrode conduction structure 520 is flush with the top height of the first electrode conduction structure 510, or lower than the top height of the first electrode conduction structure 510.

[0071] In a possible implementation, the bottom height of the second electrode conductive structure 520 is not lower than the height of the active layer in the sub-pixel in the same display device layer.

[0072] In this implementation, the bottom height of the second electrode conduction structure 520 is designed to be no lower than the height of the active layer in the sub-pixel in the same display device layer, thereby avoiding the second electrode conduction structure 520 from being too deep and reducing the difficulty of preparing the second electrode conduction structure 520.

[0073] In a possible implementation, the top of the sub-pixels in each display device layer is covered with a continuous transparent conductive layer 600. The sub-pixels in each display device layer are also connected to the transparent conductive layer 600 to achieve cathode connection.

[0074] Among them, the transparent conductive layer 600 can be a combination of one or more of an ITO (Indium Tin Oxide) film, an AZO (Antimony doped Zinc Oxide) film, an ATO (Antimony doped Tin Oxide) film, and an FTO (Fluorine doped Tin Oxide) film, or a metal-doped ITO single layer or stacked layer formed by thinly coating Al, Au, or Ag on the ITO surface and then annealing to enhance the current transmission capability of the transparent conductive layer 600.

[0075] Further, such as Figure 1 、 Figure 2 As shown, a metal reinforcement structure 700 may be provided on top of the transparent conductive layer 600 to enhance current diffusion capability. The metal reinforcement structure 700 may be a single layer or multiple layers of metal layers such as Cr, Pt, Ti, Au, Al, Cu, TiN, or TaN.

[0076] In summary, an embodiment of the present application provides a microdisplay device, which includes a driving wafer and a multi-layer display device layer arranged on the driving wafer. Any display device layer includes sub-pixels, and the tops of the sub-pixels in each display device layer are in contact with the same continuous transparent conductive layer. At least one display device layer also includes an electrode conduction structure, and the electrode conduction structure is conductive with the electrode contacts in the driving wafer. The electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driving wafer. The top height of the first electrode conduction structure is lower than the top height of the sub-pixels in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixels in the current display device layer. Through the stacked electrode conduction structure, the aspect ratio of the through-hole is reduced, which on the one hand reduces the processing difficulty of the through-hole process, and on the other hand eliminates the problem of voids in the through-hole metal filling, thereby avoiding the problem of poor current transmission caused by the voids.

[0077] All of the above optional technical solutions can be combined in any way to form optional embodiments of the present invention, that is, any multiple embodiments can be combined to meet the needs of different application scenarios. They are all within the scope of protection of this application and will not be described in detail here.

[0078] It should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A micro display device, characterized in that: The micro display device includes a driving wafer and a multi-layer display device layer arranged on the driving wafer; Any of the display device layers includes sub-pixels, and the tops of the sub-pixels in each display device layer are in contact with the same continuous transparent conductive layer; At least one of the display device layers also includes an electrode conduction structure, which is conductively connected to the electrode contacts in the driving wafer. The electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driving wafer. The top height of the first electrode conduction structure is lower than the top height of the sub-pixels in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixels in the current display device layer.

2. The micro display device according to claim 1, characterized in that The first electrode conduction structure is a fence-style structure, and the first electrode conduction structure includes: a first partial structure arranged in a horizontal direction, and a second partial structure surrounding the first partial structure.

3. The micro display device according to claim 2, characterized in that A color compound is disposed inside the first electrode conductive structure.

4. The micro display device according to claim 3, characterized in that The top height of the color compound is not higher than the top height of the sub-pixel in the same display device layer, and the top height of the second part structure in the first electrode conduction structure is lower than the top height of the color compound.

5. The micro display device according to claim 3, characterized in that: The second electrode conductive structure includes: a third partial structure attached to the side wall of the color compound, and the third partial structure is in contact with the top or side wall of the second partial structure.

6. The micro display device according to claim 5, characterized in that The second electrode conductive structure further includes a fourth partial structure covering the color compound and the top of the third partial structure.

7. The micro display device according to claim 5, characterized in that The top of the third partial structure is flush with the top of the color compound.

8. The micro display device according to claim 3, characterized in that: The angle of the color compound is between 45 degrees and 135 degrees.

9. The micro display device according to claim 3, characterized in that: The thickness of the color compound is between 0.2um and 5um.

10. The micro display device according to claim 2, characterized in that: The first part of the structure includes: A bonding metal layer and a first ohmic contact layer are stacked in a direction away from the driving wafer.

11. The micro display device according to claim 2, characterized in that: The interior of the first electrode conductive structure is filled with an insulating medium to form an inner fence insulating layer, and the top height of the inner fence insulating layer is not higher than the top height of the second part structure; The second electrode conductive structure is covered on the first electrode conductive structure and the insulation layer inside the fence.

12. The micro display device according to claim 2, characterized in that: The angle of the second portion of the structure is between 45 degrees and 135 degrees.

13. The micro display device according to claim 2, characterized in that: The thickness of the second portion of the structure is between 10 nm and 1500 nm.

14. The micro display device according to claim 1, wherein: An outer edge of the second electrode conduction structure is farther away from a central axis of the electrode conduction structure than an outer edge of the first electrode conduction structure.

15. The micro display device according to claim 1, characterized in that A bottom height of the second electrode conductive structure is no higher than a top height of the first electrode conductive structure.

16. The micro display device according to claim 1, characterized in that The bottom height of the second electrode conductive structure is not lower than the height of the active layer in the sub-pixel in the same display device layer.

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