Stacked integrated microdisplay device

Abstract

The utility model discloses a stacked and integrated micro display device, and relates to the technical field of semiconductors. The micro display device comprises a driving wafer and a plurality of display device layers arranged on the driving wafer, any display device layer comprises a sub-pixel, and the sub-pixel is electrically connected with a first type of electrode contact in the driving wafer through a transparent conductive layer at the top of the display device layer; at least one display device layer further comprises an electrode conduction structure, the electrode conduction structure is conducted with electrode contacts including the first type of electrode contacts in the driving wafer, and the electrode conduction structure comprises a first electrode conduction structure and a second electrode conduction structure which are stacked in the direction away from the driving wafer; the top height of the first electrode conduction structure is not higher than the top height of the sub-pixel in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixel in the current display device layer.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductors, and in particular to a stacked integrated micro display device. Background Art

[0002] In the field of microdisplay, in order to achieve colored display, there is a demand for multi-color stacking integration.

[0003] In related technologies, color stacking solutions are generally manufactured using the following process: pixelation, followed by filling with an insulating layer, then flattening, forming a through-hole interconnect structure, and stacking multiple times to complete the multi-color display; or, after pixelation, separating the cathode and anode layers with an insulating layer, then filling with an insulating layer, then flattening, forming a through-hole interconnect structure, and stacking multiple times to complete the multi-color display. All of these technologies require through-hole interconnects to connect to electrode contacts in the driver wafer to achieve addressing display.

[0004] However, with the trend toward smaller pixels, the aspect ratio of via fabrication is increasing, making processing more difficult and requiring the upgrading of high-end etching equipment suitable for nanoscale integrated circuits, which significantly increases processing costs. Furthermore, vias with large aspect ratios are prone to voids when filling with interconnecting metal, resulting in poor current transmission and further compromising the optoelectronic and reliability performance of the device. Utility Model Content

[0005] The purpose of the utility model is to provide a stacked integrated micro display device, which can reduce the influence of the through-hole interconnection method for electrode conduction on the device performance.

[0006] In order to achieve the above-mentioned purpose of the utility model, the utility model proposes the following technical solutions:

[0007] In one aspect, a micro display device is provided, comprising a driving wafer and a multi-layer display device layer disposed on the driving wafer;

[0008] Any of the display device layers includes sub-pixels, and the sub-pixels are electrically connected to the first type of electrode contacts in the driver wafer through the transparent conductive layer on top of the display device layer;

[0009] At least one layer of the display device layer also includes an electrode conduction structure, which is conductive with the electrode contacts in the driving wafer, including the first type of electrode contacts. The electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driving wafer. The top height of the first electrode conduction structure is not higher than the top height of the sub-pixel in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixel in the current display device layer. The first electrode conduction structure and the second electrode conduction structure belong to different levels of insulating layers in the current display device layer.

[0010] In a possible implementation, the first electrode conductive structure is a fence-style structure, and the first electrode conductive structure includes: a first partial structure arranged in a horizontal direction, and a second partial structure surrounding the first partial structure;

[0011] The second electrode conductive structure is a through-hole structure.

[0012] In a possible implementation manner, a metal reinforcement structure is provided between the first electrode conduction structure and the second electrode conduction structure.

[0013] In a possible implementation manner, the metal reinforcement structure contacts the top and part of the sidewall of the second portion structure.

[0014] In a possible implementation, the second electrode conductive structure contacts the top and a portion of the sidewall of the second partial structure.

[0015] In a possible implementation, a color compound is disposed inside the first electrode conductive structure.

[0016] In one possible implementation, the top height of the color compound is not higher than the top height of the sub-pixel in the same display device layer, and the top height of the second part structure in the first electrode conduction structure is lower than the top height of the color compound.

[0017] In a possible implementation, the second electrode conductive structure is attached to the top and part of the side wall of the color compound, and is in contact with the top and part of the side wall of the second partial structure;

[0018] or,

[0019] The metal reinforcement structure below the second electrode conductive structure is attached to the top and part of the side wall of the color compound and is in contact with the top and part of the side wall of the second partial structure.

[0020] In a possible implementation, the first electrode conductive structure and the color compound are separated by a fence inner reflective layer and a fence inner insulating layer.

[0021] In a possible implementation, the thickness of the sub-pixel and the color compound is between 0.2 um and 5 um.

[0022] In a possible implementation, the surface size of the first electrode conductive structure is smaller than or equal to the surface size of a sub-pixel in the same display device layer.

[0023] In a possible implementation, the first structure includes:

[0024] A bonding metal layer and a first ohmic contact layer are stacked in a direction away from the driving wafer.

[0025] In one possible implementation, the outer periphery of the sub-pixel is surrounded by a metal fence structure that is structurally consistent with the first electrode conduction structure, and the bottom of the metal fence structure is connected to the bonding metal layer at the bottom of the sub-pixel and the outer edge of the first ohmic contact layer to surround the sub-pixel, and the top height of the metal fence structure is not higher than the top height of the sub-pixel.

[0026] In a possible implementation, a surface of the sub-pixel away from the driver wafer is covered with a transparent conductive layer; and a dielectric insulating layer is provided between the top of the metal fence structure and the transparent conductive layer.

[0027] In a possible implementation, the metal fence structure and the sub-pixel are separated by a fence inner reflective layer and a fence inner insulating layer.

[0028] In a possible implementation, the angle of the second portion of the structure is between 45 degrees and 135 degrees.

[0029] In a possible implementation manner, the thickness of the second partial structure is between 10 nm and 1500 nm.

[0030] In a possible implementation, the electrode contact further includes a second-type electrode contact, and the electrode conductive structure includes a second-type electrode conductive structure conductively connected to the second-type electrode contact.

[0031] In a possible implementation, the electrode conductive structure includes a first-type electrode conductive structure conductively connected to the first-type electrode contact;

[0032] A metal reinforcement structure is provided between the first electrode conduction structure and the second electrode conduction structure in the first type electrode conduction structure;

[0033] The first-type electrode conduction structure is electrically connected to the transparent conductive layer through the metal reinforcement structure. The transparent conductive layer is also in contact with a side of the sub-pixel in the same display device layer that is away from the driving wafer.

[0034] Compared with the prior art, the present invention has the following beneficial effects:

[0035] The micro-display device includes a driver wafer and a multi-layer display device layer disposed on the driver wafer. Each display device layer includes sub-pixels, and the sub-pixels are electrically connected to first-type electrode contacts in the driver wafer through a transparent conductive layer on top of the display device layer. At least one display device layer also includes an electrode conductive structure, which is electrically connected to electrode contacts in the driver wafer, including the first-type electrode contacts. The electrode conductive structure includes a first electrode conductive structure and a second electrode conductive structure stacked in a direction away from the driver wafer. The top height of the first electrode conductive structure is no higher than the top height of the sub-pixels in the display device layer, and the top height of the second electrode conductive structure is no lower than the top height of the sub-pixels in the display device layer. The first electrode conductive structure and the second electrode conductive structure belong to different levels of insulating layers in the display device layer. The stacked electrode conductive structures reduce the aspect ratio of the through-hole, thereby reducing the processing difficulty of the through-hole process and eliminating the problem of voids in the through-hole metal filling, thereby avoiding the problem of poor current transmission caused by the voids. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;

[0037] Figure 2 is a schematic structural diagram of another micro-display device provided in an embodiment of the present application;

[0038] Figure 3 is a schematic structural diagram of another micro-display device provided in an embodiment of the present application;

[0039] Figure 4 is a schematic structural diagram of another micro-display device provided in an embodiment of the present application;

[0040] Figure 5 is a schematic structural diagram of another micro-display device provided in an embodiment of the present application;

[0041] Figure 6 is a schematic structural diagram of another micro-display device provided in an embodiment of the present application;

[0042] Figure 7 is a schematic structural diagram of another micro-display device provided in an embodiment of the present application;

[0043] Figure 8 is a schematic structural diagram of another micro-display device provided in an embodiment of the present application;

[0044] Figure 9 is a schematic structural diagram of another micro-display device provided in an embodiment of the present application;

[0045] Figure 10 is a schematic structural diagram of another micro-display device provided in an embodiment of the present application;

[0046] Figure 11 is a schematic structural diagram of another micro-display device provided in an embodiment of the present application;

[0047] Figure 12 is a schematic structural diagram of another micro-display device provided in an embodiment of the present application;

[0048] Figure 13 is a schematic structural diagram of another micro-display device provided in an embodiment of the present application;

[0049] Figure 14 is a flow chart of a method for preparing a micro display device provided in an embodiment of the present application;

[0050] Figure 15 Schematic diagram of a preparation process of an electrode conductive structure provided in an embodiment of the present application;

[0051] Figure 16 is a schematic structural diagram of another micro-display device provided in an embodiment of the present application;

[0052] Figure 17 Schematic diagram of a process for preparing a reflective layer within a fence provided in an embodiment of the present application;

[0053] Figure 18 This is a schematic diagram of a process for preparing a reflective layer within a fence provided in an embodiment of the present application.

[0054] Reference numerals:

[0055] 100-driving wafer, 110-second type electrode contact, 120-first type electrode contact, 210-first display device layer, 220-first sub-pixel, 230-second display device layer, 240-second sub-pixel, 250-third display device layer, 260-third sub-pixel, 310-first electrode conduction structure, 311-first partial structure, 312-second partial structure, 313-bonding metal layer, 314-first ohmic contact layer, 320-second electrode conduction structure, 330-metal reinforcement structure, 340-color compound, 350-reflective layer within the fence, 360-insulating layer within the fence, 370-dielectric insulating layer, 380-metal fence structure, 400-transparent conductive layer. DETAILED DESCRIPTION

[0056] To make the purpose, technical solutions, and advantages of the present invention more clear, the following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0057] In the description of the present invention, it should be understood that the terms "vertical", "upper", "lower", "top", "side", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0058] In the description of this utility model, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections, electrical connections; direct connections, indirect connections through an intermediate medium, and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this utility model based on specific circumstances.

[0059] In the embodiments of the present application, the shortcomings of non-aligned bonding metal and stacked devices in through-hole preparation are mainly optimized. An electrode conduction structure that is interconnected with the drive wafer is prepared through an unconventional through-hole process. In addition to the second electrode conduction structure in the through-hole style, the electrode conduction structure also includes a stacked fence style first electrode conduction structure, thereby greatly reducing the aspect ratio of the through-hole interconnection, reducing the process difficulty of through-hole preparation, and solving the void problem of through-hole interconnection metal filling.

[0060] Next, the device structure proposed in this application is described.

[0061] First, the present invention provides a stacked multi-color micro display device, such as Figure 1 As shown, the micro display device includes:

[0062] A driving wafer 100 and a multi-layer display device layer arranged on the driving wafer 100; any display device layer includes sub-pixels, and the sub-pixels are electrically connected to the first type electrode contacts 120 in the driving wafer 100 through the transparent conductive layer 400 on the top of the display device layer; at least one display device layer also includes an electrode conduction structure, and the electrode conduction structure is conductively connected to the electrode contacts in the driving wafer 100, including the first type electrode contacts 120, and the electrode conduction structure includes: a first electrode conduction structure 310 and a second electrode conduction structure 320 stacked in a direction away from the driving wafer 100, the top height of the first electrode conduction structure 310 is not higher than the top height of the sub-pixels in the current display device layer, and the top height of the second electrode conduction structure 320 is not lower than the top height of the sub-pixels in the current display device layer, and the first electrode conduction structure 310 and the second electrode conduction structure 320 belong to different levels of insulating layers in the current display device layer.

[0063] In an embodiment of the present application, a micro-display device having multiple display device layers is provided, wherein at least one sub-pixel is provided in each display device layer, and the sub-pixels in different display device layers can be designed to emit light of different wavelengths, thereby achieving a colored display, and the sub-pixels in each display device layer are electrically connected to the first type electrode contact 120 of the driving wafer through the transparent conductive layer in the display device layer. Among them, a stacked electrode conduction structure is provided in at least one display device layer, and this electrode conduction structure includes a first electrode conduction structure 310 and a second electrode conduction structure 320 stacked in a direction away from the driver wafer 100. In this stacked electrode conduction structure, the first electrode conduction structure 310 as a whole is not higher than the height of the sub-pixels in the current display device layer, and at least part of the second electrode conduction structure 320 is higher than or equal to the height of the sub-pixels in the current display device layer. Under the design of this electrode conduction structure, the first electrode conduction structure 310 and the second electrode conduction structure 320 belong to different levels of insulating layers in the current display device layer. In two adjacent display device layers, the sub-pixels in the previous display device layer can be separated from the sub-pixels in the previous display device layer by a certain distance in height. This distance is related to the height of the insulating layer to which the second electrode conduction structure 320 belongs protruding from the insulating layer to which the first electrode conduction structure 310 belongs.

[0064] Among them, the electrode contact may include a second type electrode contact 110, and accordingly, the electrode conduction structure is actually a second type electrode conduction structure, and this second type electrode conduction structure is conductive with the second type electrode contact 110; the electrode contact may also include a first type electrode contact 120, and accordingly, the electrode conduction structure is actually a first type electrode conduction structure, and this first type electrode conduction structure is conductive with the first type electrode contact 120.

[0065] For example: Figure 1As shown, the micro display device has three display device layers: a first display device layer 210, a second display device layer 230 and a third display device layer 250. The first display device layer 210 includes a first sub-pixel 220, the second display device layer 230 includes a second sub-pixel 240, and the third display device layer 250 includes a third sub-pixel 260. The driving wafer 100 is provided with a first type electrode contact 120 and a second type electrode contact 110. In both cathode connection and anode connection, a stacked electrode conduction structure is adopted: in the first display device layer 210, a first type of electrode conduction structure is provided for cathode connection with the first sub-pixel 220, and a second type of electrode conduction structure is provided for anode connection with the second sub-pixel 240 and the third sub-pixel 260; in the second display device layer 230, a first type of electrode conduction structure is provided for cathode connection with the second sub-pixel 240, and a second type of electrode conduction structure is provided for anode connection with the third sub-pixel 260; in the third display device layer 250, a second type of electrode conduction structure is provided for cathode connection with the third sub-pixel 260.

[0066] It is understandable that the structure used to conduct electricity with the electrode contacts in the driving wafer 100 in the micro display device can all adopt the above-mentioned stacked electrode conduction structure, or partially adopt the above-mentioned stacked electrode conduction structure and partially adopt other styles of structures, and this application does not impose any restrictions on this.

[0067] The driver wafer 100 may be an active design that combines one or more thin film transistors (TFTs), low temperature polysilicon (LTPS), CMOS integrated circuits, high mobility transistors (HEMTs), etc. Specifically, the driver wafer 100 is provided with a driver circuit, and the driver circuit is provided with at least one second type electrode contact 110 and at least one first type electrode contact 120.

[0068] Each sub-pixel may include: a bonding metal layer, a first ohmic contact layer, an active layer, and a second ohmic contact layer stacked in a direction away from the driving wafer 100 .

[0069] It is understandable that the first ohmic contact layer and the second ohmic contact layer in the present application can be designed to be a P-type ohmic contact layer and an N-type ohmic contact layer, respectively, or can be designed to be an N-type ohmic contact layer and a P-type ohmic contact layer, respectively.

[0070] Specifically, sub-pixels are made of compound wafer materials. The structures of some compound wafers are as follows. In some practical applications, the film layers of compound wafers will be more complex, or there will be cross-use of materials. The material range is not limited. It typically mainly includes P-type material, N-type material, and MQW quantum wells and other functional layers sandwiched between the two:

[0071]

[0072] Each display device layer may be filled with an insulating layer, and the insulating layer material may include a single film layer such as silicon oxide, silicon nitride, aluminum oxide, boron nitride, or a stack of two or more materials thereof.

[0073] In one possible implementation, Figure 1 As shown, the first electrode conduction structure 310 is a fence style structure, and the first electrode conduction structure 310 includes: a first part structure 311 arranged in a horizontal direction, and a second part structure 312 surrounding the first part structure 311; the second electrode conduction structure 320 is a through-hole style structure.

[0074] Among them, such as Figure 2 As shown, the first partial structure 311 may include: a bonding metal layer 313 and a first ohmic contact layer 314 stacked in a direction away from the driver wafer 100. The first partial structure 311 of the first electrode conductive structure 310 is formed by utilizing the inherent bonding structure of the display device layer, thereby facilitating the fabrication of the first electrode conductive structure 310. For example, the first electrode conductive structure 310 may be fabricated by reverse sputtering during the patterning process of the bonding metal layer 313 and the first ohmic contact layer 314 in the display device layer, thereby facilitating the fabrication of the electrode conductive structure.

[0075] The angle of the second portion structure 312 is between 45 degrees and 135 degrees, and the thickness of the second portion structure 312 is between 10 nm and 1500 nm.

[0076] In one possible implementation, Figure 2 As shown, a metal reinforcement structure 330 is provided between the first electrode conduction structure 310 and the second electrode conduction structure 320 .

[0077] In this implementation, a metal reinforcement structure 330 is formed between the first electrode conductive structure 310 and the second electrode conductive structure 320. This metal reinforcement structure 330 enhances current diffusion, reduces the internal resistance of the device, and thus reduces chip power consumption. The metal reinforcement structure 330 can be a single layer or multiple layers of a metal layer such as Cr, Pt, Ti, Au, Al, Cu, TiN, or TaN.

[0078] Further, such as Figures 3 to 5As shown, the metal reinforcement structure 330 contacts the top and part of the sidewalls of the second portion structure 312. To ensure better contact between the contact area of ​​the first electrode conductive structure 310 and the metal reinforcement structure 330, a portion of the sidewalls of the second portion structure 312 is exposed. This increases the contact area between the metal reinforcement structure 330 and the first electrode conductive structure 310, further enhancing current diffusion, reducing the internal resistance of the device, and thus reducing chip power consumption. Exemplarily, the height h of the exposed sidewalls of the second portion structure 312 is ≥ 50 nm.

[0079] In one possible implementation, Figure 6 、 Figure 7 As shown, the second electrode conductive structure 320 contacts the top and a portion of the sidewall of the second portion structure 312 .

[0080] In this implementation, if the first electrode conductive structure 310 is directly connected to the second electrode conductive structure 320, to ensure better contact between the contact area of ​​the first electrode conductive structure 310 and the second electrode conductive structure 320, a portion of the sidewall of the second portion structure 312 is exposed. This increases the contact area between the second electrode conductive structure 320 and the first electrode conductive structure 310, thereby further enhancing the current diffusion capability, reducing the internal resistance of the device, and thus reducing the power consumption of the chip. Exemplarily, the height h of the exposed sidewall of the second portion structure 312 is ≥ 50 nm.

[0081] In one possible implementation, Figure 2 、 Figure 3 、 Figure 6 As shown, a color compound 340 is disposed inside the first electrode conductive structure 310 .

[0082] In this implementation, the first electrode conductive structure 310, which serves as the conductive interconnect, is a fence-like structure. If it is thin and has a low elastic modulus, it is prone to collapse during processing. The color compound 340 is retained within the first electrode conductive structure 310 to support it, allowing it to adhere to the sidewalls of the color compound 340 rather than being suspended in mid-air, thus resolving the collapse issue. Furthermore, the thickness of the subpixels and color compound 340 in each display device layer ranges from 0.2 μm to 5 μm.

[0083] Furthermore, the top height of the color compound 340 is no higher than the top height of the sub-pixel in the same display device layer, and the top height of the second portion 312 of the first electrode conductive structure 310 is lower than the top height of the color compound 340. In other words, to facilitate process implementation, the height of the prepared first electrode conductive structure 310 can be smaller than the heights of the color compound 340 and the sub-pixel.

[0084] Furthermore, in the design that the height of the first electrode conductive structure 310 is smaller than the height of the color compound 340, the second electrode conductive structure 320 is attached to the top and part of the side wall of the color compound 340 and contacts the top and part of the side wall of the second partial structure 312. Alternatively, Figure 8 As shown, the metal reinforcement structure 330 below the second electrode conductive structure 320 is attached to the top and a portion of the sidewall of the color compound 340 , and is in contact with the top and a portion of the sidewall of the second portion structure 312 .

[0085] Under the design that the height of the first electrode conductive structure 310 is smaller than the height of the color compound 340, in order to ensure the contact between the contact area of ​​the first electrode conductive structure 310 and the second electrode conductive structure 320, it is necessary to pattern the dielectric insulating layer and then perform etching to expose the contact area of ​​the first electrode conductive structure 310 and even part of the side wall, so that the metal reinforcement structure 330 or the second electrode conductive structure 320 can contact the first electrode conductive structure 310 to achieve current conduction. This design can also reduce the short circuit and leakage problems caused by the mutual connection between the common cathode and the common anode. For example, Figure 8 As shown, the height difference H between the first electrode conductive structure 310 and the color compound 340 is ≥50 nm.

[0086] In one possible implementation, Figure 9 、 Figure 10 As shown, the first electrode conductive structure 310 and the color compound 340 are separated by a fence inner reflective layer 350 and a fence inner insulating layer 360. The fence inner reflective layer 350 can be as follows: Figure 9 As shown, the top height is lower than the top height of the sub-pixel, or Figure 10 As shown, the top height is higher than the top height of the sub-pixel.

[0087] In this implementation, a high reflective mirror structure is specially provided on the inner wall of the first electrode conductive structure 310 to form a fence inner reflective layer 350, which can solve the problem of low reflectivity and light absorption of the first electrode conductive structure 310, improve the reflection of light from the compound epitaxial sidewall, thereby increasing light extraction and improving the brightness of the device. It can be understood that Figure 9 、 Figure 10 Only one set of inner reflective layer 350 and inner insulating layer 360 of the fence is shown. Multiple sets of inner reflective layer 350 and inner insulating layer 360 of the fence can also be set on the inner wall of the first electrode conductive structure 310. The multiple sets of inner reflective layer 350 and inner insulating layer 360 of the fence can further improve the reflection of light emitted from the side wall and enhance the brightness of the device. This application does not impose any restrictions on this.

[0088] It is understandable that Figures 2 to 3 、 Figure 6 、 Figure 8 As shown, the color compound 340 is provided inside all the first electrode conductive structures 310, and can also be as shown in FIG. Figures 11 to 12 As shown, the color compound 340 is only provided in part of the first electrode conductive structure 310, or as shown in FIG. Figures 4 and 5 、 Figure 7 、 Figure 13 As shown, the color compound 340 is not provided in the first electrode conductive structure 310 , but is directly filled with an insulating material, which is not limited in the present application.

[0089] In one possible implementation, Figure 2 As shown, the surface size of the first electrode conductive structure 310 is smaller than or equal to the surface size of the sub-pixels in the same display device layer.

[0090] In this implementation, by limiting the size of the first electrode conductive structure 310 , it is possible to avoid this part of the structure occupying too much space, affecting the arrangement of sub-pixels, and thus causing the problem of too low pixel density.

[0091] Further, such as Figure 2 As shown, the electrode conduction structure includes a first-type electrode conduction structure that is electrically conductive with the first-type electrode contact 120. A metal reinforcement structure 330 is disposed between the first electrode conduction structure 310 and the second electrode conduction structure 320 in the first-type electrode conduction structure. The first-type electrode conduction structure is electrically connected to the transparent conductive layer 400 via the metal reinforcement structure 330. The transparent conductive layer 400 contacts the surface of the sub-pixels in the same display device layer that is away from the driver wafer 100. A metal reinforcement structure 330 is disposed between the first electrode conduction structure 310 and the second electrode conduction structure 320 for electrically conductive contact with the first-type electrode contact 120. This metal reinforcement structure 330 is also connected to the transparent conductive layer 400, thereby achieving electrical connection through this metal reinforcement structure 330.

[0092] Among them, the transparent conductive layer 400 can be a combination of one or more of an ITO (Indium Tin Oxide) film, an AZO (Antimony doped Zinc Oxide) film, an ATO (Antimony doped Tin Oxide) film, and an FTO (Fluorine doped Tin Oxide) film, or a metal-doped ITO single layer or stacked layer formed by thinly coating Al, Au, or Ag on the ITO surface and then annealing to enhance the current transmission capability of the transparent conductive layer 400.

[0093] In one possible implementation, Figure 2As shown, the outer periphery of the sub-pixel is surrounded by a metal fence structure 380 that is structurally consistent with the first electrode conduction structure 310. The bottom of the metal fence structure 380 is connected to the outer edge of the bonding metal layer 313 and the first ohmic contact layer 314 at the bottom of the sub-pixel to surround the sub-pixel. The top height of the metal fence structure 380 is not higher than the top height of the sub-pixel.

[0094] In this implementation, a metal fence structure 380 similar in style to the first electrode conduction structure 310 in the electrode conduction structure is simultaneously manufactured around the outer periphery of the sub-pixel. This metal fence structure 380 is connected to the outer edge of the bonding metal layer 313 and the first ohmic contact layer 314 at the bottom of the sub-pixel. This metal fence structure can block light leakage from the side walls of the sub-pixel, thereby suppressing or even eliminating light crosstalk between adjacent sub-pixels, thereby improving the display effect of the microdisplay device.

[0095] Further, such as Figure 2 As shown, the side of the sub-pixel away from the driver wafer 100 is covered with a transparent conductive layer 400; a dielectric insulating layer 370 is placed between the top of the metal fence structure 380 and the transparent conductive layer 400. The dielectric insulating layer 370 prevents short circuits and leakage caused by the common cathode and common anode being connected.

[0096] Further, such as Figure 9 、 Figure 10 As shown, the metal fence structure 380 and the sub-pixels are separated by an inner fence reflective layer 350 and an inner fence insulating layer 360. A highly reflective mirror structure is specifically provided on the inner wall of the metal fence structure 380 to form the inner fence reflective layer 350. This solves the problems of low reflectivity and light absorption of the metal fence structure 380, improves the reflection of light from the compound epitaxial sidewalls, thereby increasing light extraction and improving device brightness.

[0097] In summary, an embodiment of the present application provides a stacked integrated micro-display device, which includes a driver wafer and a multi-layer display device layer arranged on the driver wafer; any display device layer includes sub-pixels; at least one display device layer also includes an electrode conduction structure, the electrode conduction structure is conductively connected to the electrode contacts in the driver wafer, and the electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driver wafer, the top height of the first electrode conduction structure is not higher than the top height of the sub-pixel in the current display device layer, and the top height of the second electrode conduction structure is higher than the top height of the sub-pixel in the current display device layer. Through the stacked electrode conduction structure, the aspect ratio of the through-hole is reduced, which on the one hand reduces the processing difficulty of the through-hole process, and on the other hand eliminates the problem of voids in the through-hole metal filling, thereby avoiding the problem of poor current transmission caused by the voids.

[0098] Next, the preparation method of the micro display device corresponding to the structure described in the above embodiment is described. Figure 14 As shown, the method for preparing a micro display device may include the following steps:

[0099] Step S1: Prepare the driving wafer.

[0100] Step S2: bonding and integrating multiple display device layers on the driver wafer, and preparing an electrode conduction structure in at least one display device layer.

[0101] Among them, any display device layer includes sub-pixels; the sub-pixels are electrically connected to the first type of electrode contacts in the driving wafer through the transparent conductive layer on the top of the display device layer; the electrode conduction structure is conductive with the electrode contacts in the driving wafer, including the first type of electrode contacts, and the electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driving wafer, the top height of the first electrode conduction structure is not higher than the top height of the sub-pixels in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixels in the current display device layer, and the first electrode conduction structure and the second electrode conduction structure belong to different levels of insulating layers in the current display device layer.

[0102] Specifically, step S2 may include:

[0103] S21: For the preparation of the i-th display device layer, the i-th color compound layer is bonded and integrated onto a driving wafer or a previous display device layer, and the i-th color compound layer is pixelated to form an i-th sub-pixel.

[0104] For example, taking the i-th display device layer as the first display device layer, the preparation process of the first sub-pixel in the first display device layer can be as follows: Figure 15 As shown:

[0105] Step 1: Select the first layer of color compound and prepare the first ohmic contact layer.

[0106] Specifically, a contact material is prepared on the P-contact surface or N-contact surface of the first color compound layer to form a first ohmic contact layer 314. The contact material can be a transparent conductive film such as ITO, IZO, IGZO, or AZO, or a metal alloy film such as AuBe or AnZn, with a thickness ranging from 1 nm to 300 nm. The thickness of the first ohmic contact layer 314 ranges from 1 nm to 300 nm.

[0107] Step 2: Bond the first layer of color compound to the wafer for integration.

[0108] Specifically, bonding structures are prepared on the first layer of color compound and the driver wafer 100 , respectively. The first layer of color compound and the driver wafer 100 are bonded and integrated by wafer-level bonding to form a bonding metal layer 313 .

[0109] The bonding structure can be a conductive material, and the main bonding material can be one or more of a Ni, Sn combination, an Au, Sn combination, a Cu, Sn combination, an Au, In combination, an Au, Au combination, an Al, Al combination, a Cu, Cu combination, an ITO, ITO combination, etc. The bonding material and the wafer can include an adhesion layer (such as Cr, Ti, Ni, etc.) and a blocking depletion layer (such as Ni, Pt, Cu, etc.). The bonding structure on the compound and the driver wafer can be symmetrical or asymmetrical.

[0110] In one embodiment, symmetrical metal bonding is used, that is, the bonding structure on the compound and the driver wafer is the same, and the bonding structure is Cr (10nm, adhesion layer) / Pt (50nm, blocking depletion layer) / Au (100nm) / Sn (150nm) / Au (50nm). After high-temperature hot pressing bonding, the compound and the driver wafer are bonded and integrated.

[0111] Step 3: Pixelation preparation.

[0112] Specifically, the substrate and related structures of the first color compound layer after bonding and integration are removed to expose the second ohmic contact layer. After the second ohmic contact layer is exposed, the first color compound layer is patterned to form pixels using semiconductor photolithography and etching processes. The first ohmic contact layer 314 serves as the etching stop layer. The etched first sub-pixels 210 or the retained color compound 340 correspond to the anode contacts in the driver wafer 100. This correspondence can be one-to-one or one-to-many.

[0113] S22: preparing a first electrode conduction structure arranged horizontally with the i-th sub-pixel, filling it with an insulating layer and exposing the top of the first electrode conduction structure.

[0114] After the first electrode conduction structure is prepared, an insulating dielectric is filled, and the insulating dielectric includes a single layer or multilayer filling material such as silicon oxide, silicon nitride, SiC, SiCN, PSG, BPSG, polyimide, etc. Subsequently, planarization is performed. The planarization can be performed by CMP (Chemical Mechanical Planarization), etching, or a combination of the two, and the planarization exposes the contact area of ​​the first electrode conduction structure.

[0115] Wherein, a continuous bonding metal layer and a first ohmic contact layer are provided between the i-th sub-pixel and the driver wafer or the previous display device layer; accordingly, S22 may specifically include: patterning and etching the bonding metal layer and the first ohmic contact layer to form a first electrode conductive structure, wherein the first electrode conductive structure includes: a first partial structure arranged in a horizontal direction, and a second partial structure surrounding the first partial structure. That is, patterning and etching are performed according to the anode and cathode positions pre-arranged on the driver wafer to remove unnecessary bonding metal layers and first ohmic contact layers, and simultaneously form the first electrode conductive structure.

[0116] It is understandable that the first electrode conduction structure can be prepared by reverse sputtering during the patterning process of the bonding metal layer and the first ohmic contact layer in the display device layer, thereby facilitating the preparation of the electrode conduction structure.

[0117] In a possible implementation, after the first electrode conduction structure is prepared and before the second electrode conduction structure is prepared, the following step is further included: preparing a transparent conductive layer on the top of the i-th sub-pixel by depositing a transparent conductive film.

[0118] Specifically, such as Figure 16 As shown, after the surface of the second ohmic contact layer of the sub-pixel in each display device layer is exposed, electrical connection is performed, and a transparent conductive film is deposited by sputtering, evaporation, etc. to form a transparent conductive layer 400.

[0119] Furthermore, after preparing the transparent conductive layer, the following step is further included: preparing a metal grid on the top of the transparent conductive layer and the top of the first electrode conductive structure to form a metal reinforcement structure.

[0120] Specifically, such as Figure 16 As shown, a metal reinforcement structure 330 is prepared on the transparent conductive layer 400. The metal reinforcement structure 330 can be realized by patterned evaporation or sputtering, or by etching after coating.

[0121] In a possible implementation, before preparing the first electrode conduction structure, the following steps are also included: retaining an insulating film layer on the side wall of the i-th sub-pixel to form an inner fence insulating layer; and preparing an inner fence reflective layer on the side wall of the inner fence insulating layer.

[0122] Specifically, after pixelation is completed, an insulating layer is retained on the epitaxial surface of the sub-pixel, and then an insulating film layer is prepared by plasma deposition, sputtering, atomic layer deposition, etc. The thickness of the insulating layer ranges from 1nm to 1500nm. The insulating layer material includes a single film layer such as silicon oxide, silicon nitride, aluminum oxide, boron nitride, or a stack of two or more materials. Then, etching methods such as RIE (Reactive Ion Etching) / ICP (Inductive Coupled Plasma) / IBE (Ion Beam Etching) are used to retain the insulating film layer on the side wall to form an insulating layer inside the fence, and then a layer of reflective material with high reflectivity is coated to form a reflective layer inside the fence. Subsequently, the etching method is used to prepare the first electrode conductive structure, and then the insulating layer is filled.

[0123] In one embodiment, when the height of the first electrode conductive structure 310 is consistent with that of the color compound 340 and the insulating layer, the process from pixelization to filling of the insulating layer in the display device layer is as follows: Figure 17 As shown, after the structural process, a dielectric insulating layer 370 and a transparent conductive layer 400 need to be prepared to obtain Figure 10 The structure shown can prevent the metal fence structure 380 around the sub-pixel from being short-circuited with the common cathode.

[0124] In one embodiment, when the first electrode conductive structure 310 is prepared, it is lower than the height of the color compound 340 and the insulating layer, and after the insulating layer is filled, a planarization process is also used. The process from pixelization in the display device layer to filling and planarization of the insulating layer is as follows: Figure 18 As shown, after the structural process, the insulating layer is filled, flattened, and then the transparent conductive layer 400 is prepared to obtain Figure 9 In the structure shown, there is no need to prepare the dielectric insulating layer 370 because the height of the metal fence structure 380 around the sub-pixel is smaller than the height of the sub-pixel itself.

[0125] S23: preparing a second electrode conduction structure on the first electrode conduction structure.

[0126] S23 may specifically include: filling the first electrode conductive structure with an insulating layer; and performing through-hole etching and metal backfilling on a region of the insulating layer corresponding to the first electrode conductive structure to form a second electrode conductive structure.

[0127] Insulating dielectric backfill and planarization are performed on the wafer where cathode connection is completed, and through-hole etching and metal backfill preparation are performed in the insulating layer above the first electrode conduction structure in the anode and cathode areas where lower-layer connection is required. After backfilling, planarization is performed by CMP, etching, or a combination of the two to achieve a non-flat surface with a slightly concave or protruding structure of the through-hole.

[0128] It is understandable that if the display device layer with the second electrode conductive structure prepared is defined as a new driving wafer, the above steps S21 to S23 can be repeated to complete the pixelation preparation of double layers or even more layers.

[0129] In summary, the preparation method of the micro display device provided in the embodiment of the present application integrates multiple display device layers on a driving wafer, wherein at least one display device layer is provided with an anode conduction structure, and the anode conduction structure includes: a first electrode conduction structure arranged in the horizontal direction and a second electrode conduction structure arranged in the vertical direction; the bottom of the second electrode conduction structure is connected to the outer edge of the first electrode conduction structure in the current display device layer to surround the first electrode conduction structure, and the top is connected to the sub-pixel in the upper display device layer, or connected to the bottom of the first electrode conduction structure in the upper display device layer; the bottom of the first electrode conduction structure is connected to the anode contact in the driving wafer, or connected to the top of the second electrode conduction structure in the lower display device layer, thereby realizing anode conduction through this fence-style anode conduction structure, without the need for a process of first through-hole and then metal filling, reducing the process difficulty of graphical overlay alignment.

[0130] All of the above optional technical solutions can be combined in any way to form optional embodiments of the present invention, that is, any multiple embodiments can be combined to meet the needs of different application scenarios. They are all within the scope of protection of this application and will not be described in detail here.

[0131] It should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A stacked integrated micro display device, characterized in that: The micro display device includes a driving wafer and a multi-layer display device layer arranged on the driving wafer; Any of the display device layers includes sub-pixels, and the sub-pixels are electrically connected to the first type of electrode contacts in the driver wafer through the transparent conductive layer on top of the display device layer; At least one layer of the display device layer also includes an electrode conduction structure, which is conductive with the electrode contacts in the driving wafer, including the first type of electrode contacts. The electrode conduction structure includes: a first electrode conduction structure and a second electrode conduction structure stacked in a direction away from the driving wafer. The top height of the first electrode conduction structure is not higher than the top height of the sub-pixel in the current display device layer, and the top height of the second electrode conduction structure is not lower than the top height of the sub-pixel in the current display device layer. The first electrode conduction structure and the second electrode conduction structure belong to different levels of insulating layers in the current display device layer.

2. The micro display device according to claim 1, characterized in that The first electrode conductive structure is a fence-style structure, and the first electrode conductive structure includes: a first portion structure arranged in a horizontal direction, and a second portion structure surrounding the first portion structure; The second electrode conductive structure is a through-hole structure.

3. The micro display device according to claim 2, characterized in that A metal reinforcement structure is provided between the first electrode conduction structure and the second electrode conduction structure.

4. The micro display device according to claim 3, characterized in that The metal reinforcement structure contacts the top and a portion of the sidewall of the second portion structure.

5. The micro display device according to claim 2, characterized in that The second electrode conductive structure contacts the top and a portion of the sidewall of the second partial structure.

6. The micro display device according to claim 2, characterized in that A color compound is disposed inside the first electrode conductive structure.

7. The micro display device according to claim 6, characterized in that: The top height of the color compound is not higher than the top height of the sub-pixel in the same display device layer, and the top height of the second part structure in the first electrode conduction structure is lower than the top height of the color compound.

8. The micro display device according to claim 7, characterized in that: The second electrode conductive structure is attached to the top and part of the side wall of the color compound and is in contact with the top and part of the side wall of the second partial structure; or, The metal reinforcement structure below the second electrode conductive structure is attached to the top and part of the side wall of the color compound and is in contact with the top and part of the side wall of the second partial structure.

9. The micro display device according to claim 6, characterized in that: The first electrode conductive structure and the color compound are separated by a fence inner reflective layer and a fence inner insulating layer.

10. The micro display device according to claim 6, characterized in that: The thickness of the sub-pixel and the color compound is between 0.2um and 5um.

11. The micro display device according to claim 2, characterized in that: The surface size of the first electrode conductive structure is smaller than or equal to the surface size of the sub-pixels in the same display device layer.

12. The micro display device according to claim 2, characterized in that: The first part of the structure includes: A bonding metal layer and a first ohmic contact layer are stacked in a direction away from the driving wafer.

13. The micro display device according to claim 2, characterized in that: The outer periphery of the sub-pixel is surrounded by a metal fence structure that is structurally consistent with the first electrode conduction structure. The bottom of the metal fence structure is connected to the bonding metal layer at the bottom of the sub-pixel and the outer edge of the first ohmic contact layer to surround the sub-pixel. The top height of the metal fence structure is not higher than the top height of the sub-pixel.

14. The micro display device according to claim 13, characterized in that: A transparent conductive layer is provided on a side of the sub-pixel away from the driving wafer; A dielectric insulating layer is provided between the top of the metal fence structure and the transparent conductive layer.

15. The micro display device according to claim 13, characterized in that: Between the metal fence structure and the sub-pixel, there are a fence inner reflective layer and a fence inner insulating layer.

16. The micro display device according to claim 2, characterized in that: The angle of the second portion of the structure is between 45 degrees and 135 degrees.

17. The micro display device according to claim 2, characterized in that: The thickness of the second portion of the structure is between 10 nm and 1500 nm.

18. The micro display device according to claim 1, characterized in that The electrode contacts further include a second type of electrode contacts, and the electrode conductive structure includes a second type of electrode conductive structure conductively connected to the second type of electrode contacts.

19. The micro display device according to claim 1, wherein: The electrode conductive structure includes a first type of electrode conductive structure conductively connected to the first type of electrode contact; A metal reinforcement structure is provided between the first electrode conduction structure and the second electrode conduction structure in the first type electrode conduction structure; The first-type electrode conduction structure is electrically connected to the transparent conductive layer through the metal reinforcement structure. The transparent conductive layer is also in contact with a side of the sub-pixel in the same display device layer that is away from the driving wafer.

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