Multi-channel pressure resolving circuit based on FPGA and DSP
By combining the multi-channel pressure solution circuit of FPGA and DSP, the problem of multiple interfaces and high cost in the prior art is solved, the accuracy and reliability of pressure measurement are improved, and the miniaturization and expansion of pressure sensors are achieved.
Patent Information
- Application Number
- CN202422366711.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-27
- Publication Date
- 2025-08-29
- Estimated Expiration
- 2034-09-27
AI Technical Summary
The existing pressure sensor processing methods occupy a lot of interfaces, have high circuit space and cost, and are limited by the computing capabilities of the frequency signal processing chip, making it difficult to achieve high-precision pressure measurement.
The multi-channel pressure solution circuit based on FPGA and DSP is adopted to achieve frequency and voltage signals processing through the combination of level converter, analog switch, A/D converter, FPGA and DSP, and the high-precision temperature-complemented crystal oscillator and FPGA counting function are used to improve signal processing capabilities.
Effectively reduce circuit space, improve pressure measurement accuracy and reliability, and achieve miniaturization and scalability of pressure measurement.
Smart Images
Figure CN223284602U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of pressure measurement, and in particular relates to a multi-channel pressure solving circuit based on FPGA and DSP. Background Art
[0002] Pressure sensors sense external pressure or convert it into a small voltage signal that varies with pressure. The back-end pressure calculation circuit uses this small voltage signal as the starting point for pressure processing. Alternatively, they can convert external pressure into a frequency and standard voltage signal that varies with pressure. Currently, dedicated frequency signal processing chips are often used to process these signals.
[0003] As the number of pressure paths to be tested increases, this processing method will result in more interfaces being occupied, and a significant increase in circuit space and cost. At the same time, this method will cause the back-end processing circuit to be limited by the computing power of the frequency signal processing core. Utility Model Content
[0004] The purpose of this utility model is to solve the problem of converting pressure into frequency and standard voltage signals, which is limited by the processing scheme of dedicated frequency signal processing chips, and propose a multi-channel pressure solving circuit based on FPGA and DSP.
[0005] The utility model discloses a multi-channel pressure solving circuit based on FPGA and DSP. The pressure solving circuit includes a level converter, an analog switch, an FPGA, an A / D converter, a DSP and an output processing circuit. The level converter has multiple input ports for receiving frequency signals of multiple pressure sensors and sends the converted frequency signals to the FPGA. The analog switch has multiple input ports for receiving standard voltage signals of multiple pressure sensors and sends the selected standard voltage signals to the A / D converter. The output end of the A / D converter is connected to the FPGA. The FPGA sends the waveform count value and voltage digital value of the converted frequency signal to the DSP. The DSP sends the actual pressure value of each channel through the output processing circuit.
[0006] Advantageously, the FPGA is further connected to an external crystal oscillator, and the measured conversion frequency signal is calculated using the difference and variation between the low-frequency count value and the high-frequency count value.
[0007] Advantageously, the crystal oscillator is a high-precision temperature-compensated crystal oscillator.
[0008] Advantageously, the FPGA also determines whether the status of each channel is normal based on the waveform count value and / or the voltage digital value.
[0009] Advantageously, the level converter comprises eight parallel input channels, each channel corresponding to a frequency signal of a pressure sensor.
[0010] Advantageously, the analog switch comprises eight parallel input channels, each channel corresponding to a standard voltage input of the pressure sensor.
[0011] Advantageously, the A / D converter uses a single-channel parallel A / D converter
[0012] Advantageously, the FPGA, the DSP and the A / D converter are all connected via parallel interfaces.
[0013] Beneficial Effects: By combining a single FPGA and DSP to implement the functions of multiple dedicated frequency signal processing circuits, the circuit space occupied is effectively reduced, reducing the size of related pressure calculation products. The FPGA also has strong scalability and can independently set the number of bits in the frequency counter register, further improving pressure measurement accuracy through calculations.
[0014] The overall miniaturization is achieved, which improves the accuracy of pressure measurement and solution and improves reliability. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 This is a schematic diagram of the principle of the multi-channel pressure solution circuit;
[0016] Figure 2 This is a schematic diagram of the FPGA interface. DETAILED DESCRIPTION
[0017] The present invention will be further described below with reference to the accompanying drawings and examples.
[0018] See also Figure 1 In the illustrated embodiment, pressure sensors 1 through 8 output frequency signals F1 through F8 and standard voltage signals V1 through V8. Each frequency signal is converted to a frequency signal that matches the FPGA level via a level converter. Each standard voltage signal is then selected by an analog switch and sent to an A / D converter. The A / D converter converts the standard voltage signal into a digital voltage value and sends it to the FPGA.
[0019] The FPGA receives and processes the converted frequency signal from the level converter and the digital voltage from the A / D converter. It counts the waveforms of the converted frequency signal to obtain waveform counts, packages the data, and sends it to the DSP via the parallel port. The FPGA then sends the digital voltage to the DSP for processing. The FPGA also determines whether each channel is operating normally based on the waveform counts and digital voltage values.
[0020] The A / D converter uses a single parallel channel, enabling time-sharing processing of the selected channel's standard voltage signal, reducing the acquisition and processing cycle. The A / D conversion result can be used as a basis for determining whether the pressure is normal. The processed data is sent to the FPGA via the parallel port, which then connects to the DSP for further data processing.
[0021] The DSP can convert the waveform count value and voltage digital quantity of each channel into the actual pressure value measured by the front-end pressure sensor, and communicate externally through the output processing circuit after completing the data packaging.
[0022] See also Figure 2 After the frequency signals collected by the pressure sensor are converted by the level converter, the first conversion frequency signal F1 is connected to the FPGA's IO_L08P_1, the second conversion frequency signal F2 is connected to the FPGA's IO_L08N_1, the third conversion frequency signal F3 is connected to the FPGA's IO_L09P_1, the fourth conversion frequency signal F4 is connected to the FPGA's IO_L09N_1, the fifth conversion frequency signal F5 is connected to the FPGA's IO_L10P_1, the sixth conversion frequency signal F6 is connected to the FPGA's IO_L10N_1, the seventh conversion frequency signal F7 is connected to the FPGA's IO_L11P_1, and the eighth conversion frequency signal F8 is connected to the FPGA's IO_L11N_1. The frequency output signal CLKsys from the external crystal oscillator Y1 is connected to the FPGA's GCLK4 interface. F1 to F8 are low-frequency signals, and CLKsys is a high-frequency signal. The FPGA collects the falling edges of the conversion frequency signals F1-F8 and the crystal oscillator output signal CLKsys, starting a count. The FPGA sets the acquisition count for the eight conversion frequency signals F1-F8 to 14 bits and the acquisition count for the frequency signal CLKsys to 24 bits. The high- and low-frequency count values are connected to the back-end DSP via the parallel port.
[0023] The frequency calculation described above uses synchronous counting and a fixed sampling time to calculate the measured frequency using the difference and variation between low-frequency and high-frequency counts. This calculation method accounts for errors caused by different hardware and frequency variations. The number of acquisition channels and the number of count bits in the FPGA are adjustable, allowing expansion without adding additional hardware.
Claims
1. A multi-channel pressure calculation circuit based on FPGA and DSP, characterized by: The pressure calculation circuit includes a level converter, an analog switch, an FPGA, an A / D converter, a DSP and an output processing circuit, wherein the level converter has multiple input ports for receiving frequency signals of multiple pressure sensors and sends the converted frequency signals to the FPGA; the analog switch has multiple input ports for receiving standard voltage signals of multiple pressure sensors and sends the selected standard voltage signals to the A / D converter, and the output end of the A / D converter is connected to the FPGA; the FPGA sends the waveform count value and voltage digital value of the converted frequency signal to the DSP, and the DSP sends the actual pressure value of each channel through the output processing circuit.
2. The multi-channel pressure calculation circuit based on FPGA and DSP according to claim 1, characterized in that: The FPGA is also externally connected to a crystal oscillator, and uses the difference and variation between the low-frequency count value and the high-frequency count value to calculate the measured conversion frequency signal.
3. The multi-channel pressure calculation circuit based on FPGA and DSP according to claim 2, characterized in that: The crystal oscillator is a high-precision temperature-compensated crystal oscillator.
4. The multi-channel pressure calculation circuit based on FPGA and DSP according to claim 1, characterized in that: The FPGA also determines whether the status of each channel is normal based on the waveform count value and / or the voltage digital value.
5. The multi-channel pressure calculation circuit based on FPGA and DSP according to claim 1, characterized in that: The level converter includes 8 parallel input channels, each channel corresponds to a frequency signal of a pressure sensor.
6. The multi-channel pressure calculation circuit based on FPGA and DSP according to claim 5, characterized in that: The analog switch includes 8 parallel input channels, each channel corresponds to a standard voltage input of a pressure sensor.
7. The multi-channel pressure calculation circuit based on FPGA and DSP according to claim 1, characterized in that: The A / D converter uses a single-channel parallel A / D converter.
8. The multi-channel pressure calculation circuit based on FPGA and DSP according to claim 1, characterized in that: FPGA is connected to DSP and A / D converter through parallel interface.