Chip protection structure

Abstract

The utility model provides a chip protection structure, which comprises a chip main body, a sealing ring and a buffer structure, and is characterized in that the sealing ring surrounds the chip main body; the buffering structure is located on the outer side of the corner of the sealing ring and spaced from the sealing ring by a preset distance. The buffering structure comprises a plurality of buffering units which are sequentially adjacent in the first direction and arranged at intervals in the second direction. Each buffer unit is composed of two double-groove metal blocks and an arc-shaped metal block, the double-groove metal blocks and the arc-shaped metal blocks are sequentially and alternately arranged at intervals in the first direction, every two adjacent buffer units share one double-groove metal block in the first direction, and at least part of the arc edge of each arc-shaped metal block is located on the side, away from the chip body, of the arc-shaped metal block. The openings of the two grooves of the double-groove metal block face and deviate from the first direction respectively. According to the utility model, the buffer structure is arranged at the outer side of the corner of the sealing ring, so that the damage stress which impacts the sealing ring along the second direction is weakened and slowed down, the damage stress is guided to face the first direction, and the safety of the chip main body is ensured.

Description

Technical Field

[0001] The utility model belongs to the technical field of semiconductor manufacturing and relates to a chip protection structure. Background Art

[0002] A seal ring structure is usually set in the wafer to protect the device area of ​​the chip. It is generally set between the chip device area and the cutting path to prevent the cutting cracks from damaging the chip device area when the wafer is cut. It can also play a role in preventing moisture and electromagnetic damage.

[0003] Seal rings are composed of metal layers stacked from bottom to top, and most often have an octagonal shape. However, when cutting this structure, the top corners of the octagonal seal ring are most susceptible to cutting stress, making the corners of the seal ring more fragile and prone to breakage or damage. To guide cracks and avoid entering the corners of the seal ring as much as possible, existing structures will be equipped with a seal ring with a buffer structure to achieve a better buffering effect. That is, by placing multiple layers of regular metal blocks parallel or perpendicular to the wafer, the purpose is to buffer the destructive stress or guide the stress direction when cutting the wafer.

[0004] Typically, when wafers are cut, shear damage within the cutting path may occur in different directions, and cracks may split in multiple directions, some of which may be directed toward the chip device area in the wafer. Existing seal rings with buffer structures mostly only consider how to best guide the direction of destructive stress, but fail to weaken the destructive stress toward the chip device area, thus still posing a risk of damage to the chip device area.

[0005] Therefore, there is an urgent need to find a chip protection structure that can guide the direction of the destructive stress while weakening the destructive stress. Summary of the Invention

[0006] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a chip protection structure to solve the problem that the chip protection structure in the prior art is difficult to weaken the destructive stress.

[0007] To achieve the above-mentioned and other related purposes, the present invention provides a chip protection structure, comprising:

[0008] Chip body;

[0009] a sealing ring surrounding the chip body;

[0010] a buffer structure located outside a corner of the sealing ring and spaced apart from the sealing ring by a preset distance, the buffer structure comprising a plurality of buffer units sequentially adjacent to each other in a first direction and spaced apart in a second direction;

[0011] In which, the buffer unit is composed of two double-grooved metal blocks whose at least partial structure is two grooves and an arc-shaped metal block whose at least partial structure is an arc edge. The double-grooved metal blocks and the arc-shaped metal blocks are alternately arranged in sequence along the first direction. The two adjacent buffer units in the first direction have a common double-grooved metal block. At least part of the arc edge in the arc-shaped metal block is located on the side of the arc-shaped metal block away from the chip body, and the openings of the two grooves in the double-grooved metal block are respectively facing the first direction and away from the first direction.

[0012] Optionally, the sealing ring includes a single ring or a double ring; the sealing ring includes an open ring or a closed ring.

[0013] Optionally, the arc angle of the arc side of the arc-shaped metal block is smaller than π, and two end points of the arc side of the arc-shaped metal block are arranged along a midline of the double-grooved metal block parallel to the first direction.

[0014] Optionally, the shape of the arc-shaped metal block includes an ellipse or a semi-ellipse.

[0015] Optionally, in a third direction, the buffer units form different buffer metal layers from bottom to top, the projections of the buffer units in two adjacent buffer metal layers in this direction at least partially overlap, the buffer metal layers are connected by metal connecting parts, and the third direction is perpendicular to the plane formed by the first direction and the second direction.

[0016] Optionally, the metal connecting portion includes a first connecting portion and a second connecting portion. In the third direction, the first connecting portion connects two upper and lower adjacent arc-shaped metal blocks, and the second connecting portion connects two upper and lower adjacent double-groove metal blocks.

[0017] Optionally, a cross-sectional dimension of the first connecting portion parallel to a plane formed by the first direction and the second direction is greater than a cross-sectional dimension of the second connecting portion parallel to the plane.

[0018] Optionally, a size of the arc-shaped metal block in the second direction is smaller than a size of an opening of the groove in the double-grooved metal block in the second direction.

[0019] Optionally, in the same buffer unit, a projection of the arc-shaped metal block in the second direction partially overlaps with a projection of the double-grooved metal block in the second direction.

[0020] Optionally, the buffer units are staggered in the second direction.

[0021] As described above, the chip protection structure of the present invention sets a buffer structure on the outside of the corner of the sealing ring, and the buffer units in the buffer structure are arranged adjacent to each other in sequence along the first direction. The arc-shaped metal block in the buffer unit is used to rebound the damage stress generated by cutting the wafer into the buffer unit, and the damage stress is rebounded back and forth randomly between the double-groove metal block and the arc-shaped metal block of the buffer unit, thereby weakening and slowing down the damage stress that impacts the sealing ring along the second direction; in the second direction, by staggering and arranging the buffer units at intervals, the damage stress that rebounds the arc-shaped metal block into the gap between the buffer units is rebounded back and forth randomly in the gap between the buffer units, thereby guiding the damage stress toward the first direction, and then weakening and slowing down the damage stress generated in the process of cutting the wafer as a whole, avoiding damage to the sealing ring, ensuring the safety of the chip body, and having high industrial utilization value. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 Shown is a schematic structural diagram of the chip protection structure of the present invention.

[0023] Figure 2 Display as Figure 1 Schematic diagram of the cross-sectional structure of the chip protection structure along the AA plane.

[0024] Figure 3 Shown is a structural schematic diagram of the buffer unit of the chip protection structure of the present invention.

[0025] Figure 4 Another structural schematic diagram of the buffer unit of the chip protection structure of the present invention is shown.

[0026] Figure 5 It shows a third structural schematic diagram of the buffer unit of the chip protection structure of the present invention.

[0027] Explanation of Figure Numbers

[0028] 1 sealing ring

[0029] 2 Buffer structure

[0030] 21 buffer units

[0031] 22 curved metal blocks

[0032] 23 double slot metal blocks

[0033] 24 metal connection parts

[0034] 25 first connection part

[0035] 26 Second connecting portion

[0036] 27 grooves DETAILED DESCRIPTION

[0037] The following describes the embodiments of the present invention through specific examples. Those skilled in the art will readily understand the other advantages and benefits of the present invention from the disclosure herein. The present invention may also be implemented or applied through various other specific embodiments, and the details in this specification may be modified or altered based on different perspectives and applications without departing from the spirit of the present invention.

[0038] See also Figures 1 to 5 It should be noted that the illustrations provided in this embodiment are merely schematic illustrations of the basic concept of the present invention. Therefore, the illustrations only show components relevant to the present invention and are not drawn according to the number, shape, and size of components in actual implementation. In actual implementation, the type, quantity, and proportion of each component may be arbitrarily changed, and the component layout may also be more complex.

[0039] Example 1

[0040] This embodiment provides a chip protection structure, such as Figure 1 As shown, it is a schematic diagram of the structure of the chip protection, including a chip body, a sealing ring 1 and a buffer structure 2, wherein the sealing ring 1 surrounds the chip body; the buffer structure 2 is located outside the corner of the sealing ring 1 and is spaced a preset distance from the sealing ring 1, and the buffer structure 2 includes a plurality of buffer units 21 that are adjacent to each other in sequence in the first direction and spaced apart in the second direction; wherein the buffer unit 21 is composed of two double-grooved metal blocks 23 whose at least partial structure is two grooves 27 and an arc-shaped metal block 22 whose at least partial structure is an arc edge, the double-grooved metal blocks 23 and the arc-shaped metal blocks 22 are alternately spaced apart in sequence along the first direction, and two adjacent buffer units 21 in the first direction have a common double-grooved metal block 23, at least part of the arc edge in the arc-shaped metal block 22 is located on the side of the arc-shaped metal block 22 away from the chip body, and the openings of the two grooves 27 in the double-grooved metal block 23 are respectively facing the first direction and away from the first direction.

[0041] It should be noted that the chip body is the part of the wafer to be cut into individual chips. The size of the chip body is related to the chip's process, the chip's function and the type of devices in the chip, and is no longer restricted here.

[0042] As an example, the sealing ring 1 includes a single ring or a double ring. In this embodiment, Figure 1 The sealing ring shown in the figure is a single-ring type, but it is not limited to this. The sealing ring 1 can also adopt a double-ring type sealing ring, which can be selected according to actual conditions.

[0043] As an example, the sealing ring 1 includes an open ring or a closed ring, that is, the sealing ring 1 can be an open ring sealing ring with an opening, or a closed ring sealing ring, and the selection here can be made according to actual conditions.

[0044] Specifically, the sealing ring 1 is used to protect the chip body, preventing the chip body from being damaged by the damage stress generated when cutting the wafer, and also has the functions of preventing moisture and electromagnetic damage.

[0045] Specifically, while ensuring the safety of the chip body, the size and shape of the sealing ring 1 can be selected according to actual conditions. Preferably, the shape of the sealing ring 1 is an octagon surrounding the chip body. In this embodiment, the shape of the sealing ring 1 is an octagon surrounding the chip body.

[0046] Specifically, while ensuring the safety of the chip body, the distance between the buffer structure 2 and the sealing ring 1 can be selected based on actual conditions. The thickness and dimensions of the double-grooved metal block 23 in the first and second directions can be selected based on actual machine models. The thickness of the curved metal block 22 can be selected based on actual conditions. The distance between the curved metal block 22 and the double-grooved metal block 23 can also be selected based on actual conditions. The distance between the curved metal block 22 and the double-grooved metal block 23 here refers to the distance in the first direction.

[0047] It should be noted that the angle between the two side walls of the two grooves 27 in the double-groove metal block 23 in the second direction and the bottom surface of the groove 27 can be selected according to actual conditions. Preferably, the angle between the two side walls of the two grooves 27 in the second direction and the bottom surface of the groove 27 is not less than 90°, so as to receive as much damage stress rebounded from the arc-shaped metal block 22 as possible and rebound. In this embodiment, the case where the angle between the two side walls of the two grooves 27 in the second direction and the bottom surface of the groove 27 is 90° is used for illustration.

[0048] Specifically, while ensuring the safety of the chip body, in the first direction, the distance between two adjacent double-groove metal blocks 23 can be selected according to actual conditions; in the first direction, the depth of each groove 27 in the double-groove metal block 23 can be selected according to actual conditions; in the second direction, the opening size of each groove 27 in the double-groove metal block 23 can be selected according to actual conditions.

[0049] Specifically, in the same buffer unit 21, the openings of the grooves 27 in the two double-grooved metal blocks 23 have the same size in the second direction. While ensuring the safety of the chip body, the openings of the grooves 27 in the two double-grooved metal blocks 23 in the same buffer unit 21 may also have different sizes in the second direction. In this embodiment, the openings of the grooves 27 in the double-grooved metal blocks 23 in each buffer unit 21 have the same size in the second direction.

[0050] Specifically, the material of the double-slot metal block 23 can be selected according to actual conditions, for example, the double-slot metal block 23 can be a copper block; the material and size of the arc-shaped metal block 22 can be selected according to actual conditions, for example, the arc-shaped metal block 22 can be an arc-shaped copper block.

[0051] Specifically, in the buffer unit, the double-groove metal block 23 is used to combine with the arc-shaped metal block 22 to rebound the damage stress exerted on the arc-shaped metal block 22 back into the buffer unit 21 as much as possible. The arc-shaped metal block 22 is used to block the damage stress from the outside of the buffer structure 2, and at the same time rebound the damage stress from the outside of the buffer structure 2 back into the buffer unit 21, thereby reducing the direct impact of the damage stress during the wafer cutting process on the sealing ring 1, weakening and slowing down the damage stress, and avoiding the sealing ring from being damaged by a large damage stress, thereby protecting the sealing ring 1.

[0052] As an example, the arc angle of the arc side of the arc-shaped metal block 22 is less than π, and two end points of the arc side of the arc-shaped metal block 22 are arranged along the center line of the double-grooved metal block 23 parallel to the first direction.

[0053] Specifically, by making the curvature of the arc edge of the arc-shaped metal block 22 less than π, the arc-shaped metal block 22 can rebound as much of the damage stress from the outside of the buffer structure 2 back into the buffer unit 21 as possible, so that the damage stress on the outside of the buffer structure 2 rebounds back and forth in the buffer unit 21, forming scattered stress and partially offsetting and consuming it, thereby weakening the effect of the damage stress on the sealing ring.

[0054] It should be noted that at least part of the arc edge of the arc-shaped metal block 22 is located on the side of the arc-shaped metal block 22 away from the chip body, so as to disperse and rebound the damage stress toward the chip body.

[0055] Specifically, a side of the arc-shaped metal block 22 facing away from the chip body may be provided with a plurality of arc edges sequentially connected along the first direction, so that the damage stress rebounded by the arc-shaped metal block 22 is more scattered, thereby enhancing the weakening effect of the damage stress.

[0056] Specifically, the side of the arc-shaped metal block 22 facing away from the chip body can be an arc edge as a whole, that is, the side of the arc-shaped metal block 22 facing away from the chip body is an arc surface, so that the damage stress rebounded by the arc-shaped metal block 22 can rebound more back and forth in the buffer unit 21 and offset and consume each other, thereby weakening the impact of the damage stress on the sealing ring 1.

[0057] As an example, the shape of the arc-shaped metal block 22 includes an ellipse, a semi-ellipse, or other suitable shapes with arc-shaped edges.

[0058] Specifically, such as Figure 3 and Figure 4The figures show a schematic diagram of the structure of the buffer unit 21 in which the arc-shaped metal block 22 is an elliptical shape and a schematic diagram of the structure of the buffer unit 21 in which the arc-shaped metal block 22 is a semi-elliptical shape. When the shape of the arc-shaped metal block 22 is an elliptical shape, the major axis of the ellipse is parallel to the first direction, and the minor axis of the ellipse is parallel to the second direction, so that the curvature of the arc side of the arc-shaped metal block 22 away from the sealing ring 1 is less than π; when the shape of the arc-shaped metal block 22 is a semi-elliptical shape, the arc side of the semi-ellipse is located on the side of the arc-shaped metal block 22 away from the sealing ring 1, and at the same time, its major axis is parallel to the first direction, and the minor axis is parallel to the second direction, so that the curvature of the arc side of the arc-shaped metal block 22 is less than π, thereby enhancing the effect of weakening the damage stress after the arc-shaped metal block 22 is combined with the double-groove metal block 23.

[0059] As an example, Figure 2 As shown, it is a schematic diagram of the cross-sectional structure of the buffer structure 2 on the AA plane. In the third direction, the buffer units 21 constitute different buffer metal layers from bottom to top, and the projections of the buffer units 21 in the two adjacent buffer metal layers in this direction at least partially overlap. The buffer metal layers are connected by metal connecting parts 24, and the third direction is perpendicular to the plane formed by the first direction and the second direction.

[0060] Specifically, when the buffer structure 2 contains multiple buffer metal layers, the projections of the buffer units 21 in the two adjacent buffer metal layers in the third direction can partially overlap, and the metal connection portion 24 connects the overlapping parts of the projections of the buffer units in the two adjacent buffer metal layers in the third direction; the projections of the buffer units 21 in the two adjacent buffer metal layers in the third direction can also completely overlap, and the metal connection portion 24 connects the overlapping parts of the projections of the buffer units in the two adjacent buffer metal layers in the third direction.

[0061] Specifically, by providing a metal connection portion 24 connecting two upper and lower adjacent buffer units 21 between two upper and lower adjacent buffer metal layers, the shear force can be prevented from splitting toward the chip, while guiding the shear force toward the first direction as much as possible.

[0062] Specifically, by setting multiple buffer metal layers in the buffer structure 2, it is possible to avoid the excessively thick double-grooved metal block 23 and the arc-shaped metal block 22 from introducing large internal stress, which affects the morphology of the wafer, the accuracy of subsequent cutting, and the yield of subsequent cutting.

[0063] Specifically, while ensuring the safety of the chip body, the distance between two adjacent buffer metal layers can be selected according to actual conditions.

[0064] As an example, the metal connection portion 24 includes a first connection portion 25 and a second connection portion 26 . In the third direction, the first connection portion 25 connects two adjacent arc-shaped metal blocks 22 , and the second connection portion 26 connects two adjacent double-grooved metal blocks 23 .

[0065] Specifically, the material of the first connecting portion 25 and the second connecting portion 26 can be selected according to actual conditions, for example, copper. In this embodiment, the material of the first connecting portion 25 is the same as that of the arc-shaped metal block 22, and the material of the second connecting portion 26 is the same as that of the double-slotted metal block 23.

[0066] Specifically, the first connection portion 25 at the bottom layer connects the substrate in the wafer and the arc-shaped metal block 22 adjacent to the substrate, and the second connection portion 26 at the bottom layer connects the substrate in the wafer and the double-grooved metal block 23 adjacent to the substrate.

[0067] Specifically, in order to ensure the effect of weakening the destructive force of the buffer structure 2, all the arc-shaped metal blocks 22 in the buffer structure 2 are usually connected to the upper and lower adjacent arc-shaped metal blocks 22, that is, a first connection part 25 is provided between the two upper and lower adjacent arc-shaped metal blocks 22, but the number of the first connection part 25 and the second connection part 26 will affect the internal stress borne by the wafer. By reasonably selecting the number and distribution of the second connection parts 26 connecting the two upper and lower adjacent double-groove metal blocks 23, the internal stress borne by the wafer can be appropriately reduced. For example, a second connection part 26 is provided between all the upper and lower adjacent double-groove metal blocks 23 in the buffer structure 2, or a second connection part 26 is provided between some of the upper and lower adjacent double-groove metal blocks 23, wherein multiple second connection parts can be provided between the two upper and lower adjacent double-groove metal blocks 23, and one second connection part 26 can be provided.

[0068] Specifically, while ensuring the safety of the chip body, the location where each first connecting portion 26 connects to two upper and lower adjacent curved metal blocks 22 can be selected based on actual conditions; the location where each second connecting portion 26 connects to two upper and lower adjacent double-grooved metal blocks 23 can be selected based on actual conditions. In this embodiment, the connection point between the first connecting portion 25 and the curved metal block 22 is located at the center of the curved metal block 22, that is, the center of the top surface of the first connecting portion 25 coincides with the center of the bottom surface of the curved metal block 22.

[0069] As an example, a cross-sectional dimension of the first connection portion 25 parallel to a plane formed by the first direction and the second direction is greater than a cross-sectional dimension of the second connection portion 26 parallel to the plane.

[0070] Specifically, the first connection part 25 is usually mainly used to guide the shear stress in the first direction, and the second connection part 26 is used to assist the first connection part 25 in guiding the shear stress in the first direction. By making the cross-sectional size of the second connection part 26 smaller than the cross-sectional size of the first connection part 25, the internal stress borne by the wafer can be reduced.

[0071] Specifically, while ensuring the safety of the chip body, the cross-sectional shape and dimensions of the first connecting portion 25 can be selected based on actual conditions; the cross-sectional shape and dimensions of the second connecting portion 26 can also be selected based on actual conditions. The cross-sectional shape here refers to the cross-sectional shape of a plane formed by a plane in the first and second directions. Preferably, the cross-sectional shape of the first connecting portion 25 is rectangular, and the cross-sectional shape of the second connecting portion 26 is circular.

[0072] As an example, the dimension of the arc-shaped metal block 22 in the second direction is smaller than the dimension of the opening of the groove 27 in the double-grooved metal block 23 in the second direction.

[0073] Specifically, by making the size of the arc-shaped metal block 22 in the second direction smaller than the size of the opening of the groove 27 in the double-groove metal block 23 in the second direction, the damage stress of the damaged sealing ring generated during the wafer cutting process of the arc-shaped metal block 22 can be rebounded into the buffer unit 21 as much as possible, so that the damage stress can be weakened as much as possible in the buffer unit 21.

[0074] Specifically, while ensuring that the size of the arc-shaped metal block 22 in the second direction is smaller than the size of the opening of the groove 27 in the double-groove metal block 23, the size of the opening of the groove 27 in the double-groove metal block 23 in the second direction can be selected according to actual conditions; the size of the arc-shaped metal block 22 in the second direction can be selected according to actual conditions.

[0075] As an example, in the same buffer unit 21, the projection of the arc-shaped metal block 22 in the second direction partially overlaps with the projection of the double-grooved metal block 23 in the second direction, that is, both ends of the arc-shaped metal block 22 in the first direction extend into the grooves 27 of the two double-grooved metal blocks 23 on both sides of the arc-shaped metal block 22 in the first direction. Figure 5 shown.

[0076] Specifically, by extending the two ends of the arc-shaped metal block 22 in the first direction into the grooves 27 of the two double-grooved metal blocks 23 on both sides of the arc-shaped metal block 22 in the direction, during the wafer cutting process, the damage stress of the damaged sealing ring can be rebounded more into the buffer unit 21 under the rebound of the arc-shaped metal block 22, and rebound back and forth between the double-grooved metal block 23 and the arc-shaped metal block 22 in the buffer unit 21, so that the component force of the damage stress in the second direction can be more offset and consumed, thereby weakening the damage stress to a greater extent.

[0077] Specifically, while ensuring the safety of the chip body, the distance from the two ends of the arc-shaped metal block 22 in the first direction to the groove 27 of the double-groove metal block 23 (that is, the distance from the two ends of the arc-shaped metal block 22 in the first direction to the opening of the groove 27 adjacent to the end point) can be selected according to actual conditions.

[0078] As an example, the buffer units 21 are staggered in the second direction.

[0079] Specifically, by staggering and spacing the buffer units 21 in the second direction, the damage stress generated during wafer cutting is weakened by the buffer units 21, and the remaining damage stress rebounds back and forth between the two adjacent buffer units 21 in the second direction, and the stresses in the second direction offset and consume each other, thereby reducing the stress on the sealing ring.

[0080] Specifically, while ensuring the safety of the chip body, the distance and staggered distance between two adjacent buffer units 21 in the second direction can be selected according to actual conditions; the position of the arc-shaped metal block 22 in the buffer unit 21 in the area between the two double-groove metal blocks 23 can be selected according to actual conditions. Preferably, the center of the arc-shaped metal block 22 coincides with the center of the area between the two double-groove metal blocks 23.

[0081] Specifically, a buffer structure 2 is set on the outside of the corner of the sealing ring 1, and the buffer structure 2 includes a plurality of buffer units 21 that are adjacent to each other in the first direction and spaced apart in the second direction. The buffer unit 21 includes an arc-shaped metal block 22 and a double-groove metal block 23 located on both sides of the arc-shaped metal block 22 in the first direction. The arc-shaped metal block 22 rebounds the damage stress generated during the wafer cutting process into the buffer unit 21, and rebounds back and forth between the double-groove metal block 23 and the arc-shaped metal block 22, thereby weakening and slowing down the damage stress in the second direction, reducing the impact of the damage stress on the sealing ring 1, and then achieving protection for the chip body.

[0082] Specifically, in the second direction, by staggering and spacing the buffer units 21, the damage stress of the arc-shaped metal block 22 rebounding into the gap between the buffer units 21 can rebound back and forth in the gap, thereby guiding the damage stress toward the first direction.

[0083] In summary, the chip protection structure of the present invention is provided with a buffer structure on the outside of the corner of the sealing ring. The buffer units in the buffer structure are adjacent to each other in the first direction and spaced apart in the second direction. The buffer unit includes an arc-shaped metal block and double-grooved metal blocks located on both sides of the arc-shaped metal block in the first direction. The arc-shaped metal block rebounds the damage stress generated by cutting the wafer into the buffer unit, and rebounds back and forth randomly between the double-grooved metal block and the arc-shaped metal block in the buffer unit, thereby weakening and slowing down the damage stress that impacts the sealing ring along the second direction. In the second direction, by staggering and spacing the buffer units, the damage stress that rebounds from the arc-shaped metal block into the gap between the buffer units rebounds back and forth randomly in the gap between the buffer units, thereby guiding the damage stress toward the first direction, thereby weakening and slowing down the damage stress generated during the wafer cutting process as a whole, and protecting the sealing ring and the chip body. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has a high industrial utilization value.

[0084] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical principles disclosed in the present invention are intended to be covered by the claims of the present invention.

Claims

1. A chip protection structure, characterized in that: include: Chip body; a sealing ring surrounding the chip body; a buffer structure located outside a corner of the sealing ring and spaced apart from the sealing ring by a preset distance, the buffer structure comprising a plurality of buffer units sequentially adjacent to each other in a first direction and spaced apart in a second direction; In which, the buffer unit is composed of two double-grooved metal blocks whose at least partial structure is two grooves and an arc-shaped metal block whose at least partial structure is an arc edge. The double-grooved metal blocks and the arc-shaped metal blocks are alternately arranged in sequence along the first direction. The two adjacent buffer units in the first direction have a common double-grooved metal block. At least part of the arc edge in the arc-shaped metal block is located on the side of the arc-shaped metal block away from the chip body, and the openings of the two grooves in the double-grooved metal block are respectively facing the first direction and away from the first direction.

2. The chip protection structure according to claim 1, wherein: The sealing ring includes a single ring or a double ring; the sealing ring includes an open ring or a closed ring.

3. The chip protection structure according to claim 1, wherein: The arc angle of the arc side of the arc-shaped metal block is less than π, and two end points of the arc side of the arc-shaped metal block are arranged along the center line of the double-grooved metal block parallel to the first direction.

4. The chip protection structure according to claim 1, wherein: The shape of the arc-shaped metal block includes an ellipse and a semi-ellipse.

5. The chip protection structure according to claim 1, wherein: In the third direction, the buffer units form different buffer metal layers from bottom to top, the projections of the buffer units in two adjacent buffer metal layers in this direction at least partially overlap, the buffer metal layers are connected by metal connecting parts, and the third direction is perpendicular to the plane formed by the first direction and the second direction.

6. The chip protection structure according to claim 5, wherein: The metal connecting portion includes a first connecting portion and a second connecting portion. In the third direction, the first connecting portion connects two vertically adjacent arc-shaped metal blocks, and the second connecting portion connects two vertically adjacent double-groove metal blocks.

7. The chip protection structure according to claim 6, wherein: A cross-sectional dimension of the first connecting portion parallel to a plane formed by the first direction and the second direction is larger than a cross-sectional dimension of the second connecting portion parallel to the plane.

8. The chip protection structure according to claim 1, wherein: The size of the arc-shaped metal block in the second direction is smaller than the size of the opening of the groove in the double-grooved metal block in the second direction.

9. The chip protection structure according to claim 1, wherein: In the same buffer unit, a projection of the arc-shaped metal block in the second direction partially overlaps with a projection of the double-grooved metal block in the second direction.

10. The chip protection structure according to claim 1, wherein: The buffer units are staggered in the second direction.

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