Optical transmission bit error rate testing device for digital component

Abstract

The utility model provides an optical transmission error rate testing device suitable for a digital assembly, aiming at the working mode of the digital assembly, an optical signal can be output after a control signal is received, an output signal has a specific output form after being decoded, and the output optical signal and an input control signal are inconsistent but have correlation. Hardware of the device comprises a photoelectric conversion device, an electro-optical conversion device, a programmable function logic device and a reference clock, and the optical transmission error rate of the digital component is tested by applying a test method based on an error code mask.

Description

Technical Field

[0001] The utility model belongs to the field of optical communications, and in particular relates to a digital component optical transmission bit error rate test device. Background Art

[0002] Digital components are essential components of radar. During normal operation, after receiving control signals, they transmit data via optical communication with other hardware. Optical transmission systems are subject to various interferences during operation, such as signal attenuation and noise interference, which can cause transmission errors. Testing the bit error rate (BER) of optical transmission during both test and normal operation is crucial for ensuring proper operation. Currently available optical transmission test equipment requires the DUT to output specific data and is unsuitable for BER testing of digital components. Therefore, it is necessary to design an optical transmission anomaly test device suitable for digital component operation scenarios. Summary of the Invention

[0003] To this end, this utility model addresses the operating mode of digital components, which output optical signals upon receiving control signals. This output signal, after decoding, has a specific output form. The output optical signal is inconsistent with the input control signal, but is correlated with it. This device, suitable for optical transmission bit error rate testing of digital components, is proposed. The hardware of this device includes an optoelectronic converter, an electro-optical converter, a programmable function logic device, and a reference clock. This device utilizes a test method based on error masks to implement optical transmission bit error rate testing of digital components.

[0004] The utility model discloses a digital component optical transmission bit error rate test device, which is composed of a first photoelectric conversion device, a second photoelectric conversion device, an electro-optical conversion device, a programmable logic device and a reference clock source.

[0005] The first photoelectric conversion device, the second photoelectric conversion device, the electro-optical conversion device, and the programmable logic device can be installed on the same PCB circuit board and electrically connected through the PCB circuit board. The first photoelectric conversion device, the second photoelectric conversion device, and the electro-optical conversion device can also be connected to the PCB circuit board on which the programmable logic device is installed through a cable to achieve electrical connection.

[0006] The first photoelectric conversion device receives the input control optical signal received by the digital component to be tested, converts the input control optical signal into a control electrical signal, and the control electrical signal enters the programmable logic device through an electrical connection.

[0007] The second photoelectric conversion device receives the data optical signal output by the digital component to be tested, converts the data optical signal into a data electrical signal, and the data electrical signal enters the programmable logic device through an electrical connection.

[0008] The programmable logic device can generate a control electrical signal to control the digital component under test. The control electrical signal is input into the electro-optical conversion device through an electrical connection. The electro-optical conversion device converts the control electrical signal into an output control optical signal to the digital component under test. The bit error rate test program runs on the programmable logic device. The bit error rate test program performs a bit error rate test based on the configuration data input by the host computer. The bit error rate test program uploads the test results to the host computer.

[0009] The bit error rate tester provides two working modes: passive mode and active mode.

[0010] In passive mode, the first photoelectric conversion device, the second photoelectric conversion device, and the programmable logic device are in working state. The programmable logic device compares the received control electrical signal with the configuration data input by the host computer, obtains the periodic repetitive signal in the received data electrical signal as a mask sequence, and performs mask data comparison on the data electrical signal each time the received control electrical signal is consistent with the configuration data, and calculates the bit error rate based on the comparison results.

[0011] In the active mode, the second optoelectronic conversion device, the electro-optical conversion device, and the programmable logic device are in working condition. The programmable logic device generates a periodic control electrical signal according to the configuration data input by the host computer, and uses the periodic repetitive signal in the received data electrical signal as a mask sequence. Each subsequent time a control electrical signal is generated, the mask data is compared with the data electrical signal, and the bit error rate is calculated based on the comparison result.

[0012] Furthermore, the function of the optoelectronic conversion device is to convert optical signals into electrical signals, and is not limited to the SFP optoelectronic conversion module. The function of the electro-optical conversion device is to convert electrical signals into optical signals, and is not limited to the SFP electro-optical conversion module.

[0013] Furthermore, the reference clock source outputs a clock signal to the programmable logic device as a reference clock signal for data analysis. The reference clock source can be installed on a PCB circuit board on which the programmable logic device is installed, or can be electrically connected to the PCB circuit board on which the programmable logic device is installed through a cable.

[0014] Furthermore, the reference clock of the programmable logic device is not limited to the reference clock source within the device, and a clock directly input from the outside can also be used.

[0015] The beneficial effects of the present utility model are:

[0016] 1. The utility model can test the optical transmission bit error rate of digital components whose output data is inconsistent with the input data but is correlated.

[0017] 2. The present invention can test the optical transmission bit error rate of a digital component in its normal working mode.

[0018] 3. The utility model has the characteristics of simple structure and easy implementation, and can be used for optical transmission bit error rate testing in the production process of digital components and optical transmission bit error rate testing during use. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a module schematic diagram of a utility model bit error rate test device.

[0020] Figure 2 This is a test principle diagram of the utility model bit error rate test device in passive mode.

[0021] Figure 3 This is a test principle diagram of the utility model bit error rate test device in active mode. DETAILED DESCRIPTION

[0022] The following is a clear and complete description of the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only a part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0023] The purpose of the utility model is to solve the problem that the existing bit error rate test device cannot meet the needs of digital component optical transmission bit error rate testing, and proposes a device that can receive or generate control optical signals and receive data optical signals output by digital components for bit error rate testing.

[0024] like Figure 1 The bit error rate tester shown in the figure consists of a first photoelectric conversion device, a second photoelectric conversion device, an electro-optical conversion device, a programmable logic device, and a reference clock source. The first photoelectric conversion device receives an input control optical signal from the digital component under test and converts the input control optical signal into a control electrical signal. The control electrical signal then enters the programmable logic device via an electrical connection.

[0025] The second photoelectric conversion device receives the data optical signal output by the digital component to be tested, converts the data optical signal into a data electrical signal, and the data electrical signal enters the programmable logic device through an electrical connection.

[0026] Programmable logic devices (PLDs) generate electrical control signals to control the digital component under test. These signals are then input via electrical connections to an electro-optical converter, which converts them into optical control signals and outputs them to the digital component under test. Configurable logic devices (CLDs) use a reference clock source or an external input clock as their reference clock. These devices require a reference clock to function properly.

[0027] The bit error rate tester provides two working modes: passive mode and active mode:

[0028] like Figure 2 As shown, in passive mode, the host computer transmits configuration data to the bit error rate test device, inputs the control optical signal received by the digital component under test into the first optoelectronic conversion device, and inputs the data optical signal output by the digital component under test into the second optoelectronic conversion device. The programmable logic device receives the control electrical signal input from the first optoelectronic conversion device and the data electrical signal input from the second optoelectronic conversion device, and compares the received control electrical signal with the configuration data input by the host computer. First, it confirms that the control electrical signal in the received control electrical signal sequence that is consistent with the configuration data is a periodic signal. The data electrical signal received between the first two times that the control electrical signal is consistent with the configuration data is used as the mask sequence. Each subsequent time a control electrical signal is received that is consistent with the configuration data, the mask data is compared with the received data electrical signal. The bit error rate is calculated according to the following formula: BER = n / (N*M), where BER is the bit error rate, n is the number of data electrical signal bits that are inconsistent with the comparison, N is the number of mask data bits, and M is the number of times the control electrical signal is received that is consistent with the configuration data.

[0029] like Figure 3 As shown, in active mode, the host computer transmits configuration data to the bit error rate test device. The bit error rate test device periodically replicates the configuration data to generate a control electrical signal. The control electrical signal is converted into an output control optical signal by the electro-optical conversion device. The output control optical signal is output to the digital component under test, and the data optical signal output by the digital component under test is input to the second optoelectronic conversion device. The programmable logic device receives the data electrical signal input by the second optoelectronic conversion device, takes the data electrical signal received between the first two transmissions of the control electrical signal generated by the configuration data as the mask sequence, and performs a mask data comparison on the received data electrical signal each time the control electrical signal generated by the configuration data is subsequently transmitted. The bit error rate is calculated according to the following formula: BER = n / (N*M), where BER is the bit error rate, n is the number of data electrical signal bits that are inconsistent in the comparison, N is the number of mask data bits, and M is the number of control electrical signals received that are consistent with the configuration data.

[0030] The present invention is not limited to the above specific embodiments, and various modifications and variations are possible. Any modification, equivalent replacement, improvement, etc. made to the above embodiments based on the technical essence of the present invention shall be included in the scope of protection of the present invention.

Claims

1. A digital component optical transmission bit error rate test device, characterized by: including a first photoelectric conversion device, a second photoelectric conversion device, an electro-optical conversion device, a programmable logic device and a reference clock source; The first photoelectric conversion device, the second photoelectric conversion device, the electro-optical conversion device, and the programmable logic device are mounted on the same PCB circuit board and electrically connected via the PCB circuit board, or the first photoelectric conversion device, the second photoelectric conversion device, and the electro-optical conversion device are connected to the PCB circuit board on which the programmable logic device is mounted via a cable to achieve electrical connection; The first photoelectric conversion device receives the input control optical signal received by the digital component to be tested, converts the input control optical signal into a control electrical signal, and the control electrical signal enters the programmable logic device through an electrical connection; The second photoelectric conversion device receives the data optical signal output by the digital component to be tested, converts the data optical signal into a data electrical signal, and the data electrical signal enters the programmable logic device through an electrical connection; The programmable logic device can generate a control electrical signal to control the digital component under test. The control electrical signal is input into the electro-optical conversion device through the electrical connection. The electro-optical conversion device converts the control electrical signal into an output control optical signal to the digital component under test. The bit error rate test program runs on the programmable logic device, performs bit error rate test according to the configuration data input by the host computer, and uploads the test results to the host computer.

2. The digital component optical transmission bit error rate test device according to claim 1, characterized in that: The photoelectric conversion device is not limited to the SFP photoelectric conversion module, and the electro-optical conversion device is not limited to the SFP electro-optical conversion module.

3. The digital component optical transmission bit error rate test device according to claim 1, characterized in that: The reference clock source is mounted on a PCB circuit board on which the programmable logic device is mounted, or is electrically connected to the PCB circuit board on which the programmable logic device is mounted through a cable.

4. The digital component optical transmission bit error rate test device according to claim 3, characterized in that: The reference clock of a programmable logic device is not limited to the reference clock source within the device, but can also use a clock directly input from the outside.

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