Power supply board card with multiple power supply channels and semiconductor test system

By adopting a multi-power channel structure and feedback regulation loop in the power supply card, uniform output of voltage or current of each power channel is achieved, solving the problem of low accuracy caused by uneven output of a single power channel and improving output accuracy and voltage capability.

CN223320469UActive Publication Date: 2025-09-09HANGZHOU CHANGCHUAN TECH CO LTD
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Patent Information

Application Number
CN202422181138.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-09-05
Publication Date
2025-09-09
Estimated Expiration
2034-09-05

AI Technical Summary

Technical Problem

In high-voltage application scenarios, the uneven output voltage of a single power supply channel leads to low output accuracy.

Method used

A multi-power channel structure is adopted, through the series connection of the main power channel and the slave power channel, and the feedback regulation loop is used to adjust the voltage signals of each power channel to make them equal, so as to achieve stable output of voltage or current.

Benefits of technology

The output accuracy and overall voltage output capability of the power supply card with multiple power supply channels are improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to the field of chip testing, in particular to a multi-power-channel power board card and a semiconductor testing system, and a main power channel comprises a first feedback regulation loop which is used for regulating a first voltage signal of an output end of a main power supply according to a reference voltage signal so as to enable the main power channel to stably output the first voltage signal; wherein the first feedback regulation loop comprises a first voltage detection unit which is used for detecting a first voltage signal of an output end of a main power supply, feeding back the first voltage signal to an input end to form feedback and outputting the first voltage signal to each slave power supply channel; and each slave power supply channel comprises a second feedback regulation loop which is connected with the first voltage detection unit and is used for regulating the second voltage signal according to the first voltage signal and the second voltage signal detected at the output end of the slave power supply channel, so that the second voltage signal is equal to the first voltage signal. According to the invention, the output voltage of each power channel is consistent, and the output precision of the power board card with multiple power channels is improved.
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Description

Technical Field

[0001] The present application relates to the field of chip testing, and in particular to a power supply card with multiple power supply channels and a semiconductor testing system. Background Art

[0002] Power supply boards using digital control loops typically feature voltage output (FV), voltage measurement (MV), current output (FI), current measurement (MI), or a combination thereof. In some high-voltage applications, the output voltage of a single power supply channel may not meet actual requirements. Connecting channels in series to increase overall voltage output capability is a very practical technique.

[0003] In actual applications, due to differences in hardware parameters of various power supply channels, the voltages output by various power supply channels may not be completely equal, which in turn leads to low output accuracy. Summary of the Invention

[0004] Based on this, it is necessary to provide a power supply board with multiple power supply channels and a semiconductor testing system to address the above technical problems.

[0005] In a first aspect, an embodiment of the present application provides a power supply card with multiple power supply channels, connected to a device under test, including a master power supply channel and a plurality of slave power supply channels connected in series;

[0006] The main power supply channel includes:

[0007] a first feedback regulation loop, configured to regulate the first voltage signal based on a reference voltage signal and a first voltage signal detected at an output end of the master power channel, so that the master power channel stably outputs the first voltage signal; wherein the first feedback regulation loop includes a first voltage detection unit, configured to detect the first voltage signal at the output end of the master power channel and feed it back to the input end to form feedback, while outputting it to each of the slave power channels;

[0008] Each of the slave power supply channels includes:

[0009] The second feedback regulation loop is connected to the first voltage detection unit and is used to regulate the second voltage signal according to the first voltage signal and the second voltage signal detected from the output end of the power supply channel so that the second voltage signal is equal to the first voltage signal.

[0010] In some embodiments, the master power channel and the slave power channel each include a first end, a second end, a third end, and a fourth end, for connecting to the first feedback regulation loop and the second feedback regulation loop; the fourth end of the front-stage power channel is connected to the first end of the rear-stage power channel; the first and second ends of the master power channel are connected to one end of the device under test; the third and fourth ends of the final-stage slave power channel are connected to the other end of the device under test, so that the master power channel and each slave power channel are connected in series; the master power channel is also connected to the control end of each slave power channel, so that each power channel outputs the same voltage.

[0011] In some embodiments, the first feedback regulation loop includes a first loop control unit, a first output unit, and a first voltage detection unit. The first loop control unit is connected to the first output unit. The first output unit is connected to the device under test via the first end of the main power supply channel. The first end of the first voltage detection unit is connected to the device under test via the second end of the main power supply channel. The second end of the first voltage detection unit is connected to the first end and the second end of the next-stage slave power supply channel via the third end of the main power supply channel. The third end of the first voltage detection unit is connected to the first loop control unit and each of the slave power supply channels. The fourth end of the main power supply channel is connected to its own ground end and the third end of the main power supply channel, and the first end and the second end of the next-stage slave power supply channel.

[0012] In some embodiments, each second feedback regulation loop includes a second loop control unit, a second output unit, and a second voltage detection unit. The second loop control unit and the second output unit are connected in sequence. The second output unit is connected to the third and fourth ends of the previous power channel via the first end of the slave power channel. The first end of the second voltage detection unit is connected to the first end of the slave power channel via the second end of the slave power channel. The second end of the second voltage detection unit is connected to the first and second ends of the next slave power channel, or the device under test, via the third end of the slave power channel. The third end of the second voltage detection unit is connected to the second loop control unit. The fourth end of the slave power channel is connected to its own ground end and the third end of the slave power channel. The fourth end of the slave power channel is connected to the first and second ends of the next slave power channel, or the device under test.

[0013] In some embodiments, the master power channel and each of the slave power channels receive a same clock signal and synchronously output voltage signals based on the same clock signal.

[0014] In a second aspect, an embodiment of the present application provides a power supply card with multiple power supply channels, connected to a device under test, including a master power supply channel and a plurality of slave power supply channels connected in series in sequence;

[0015] The main power supply channel includes:

[0016] a first feedback regulation loop, configured to regulate the first current signal according to a reference current signal and a first current signal at an output end of the main power supply channel, so that the main power supply channel stably outputs the first current signal;

[0017] a first voltage detection unit, configured to detect the first voltage signal output by the first feedback regulation loop and output the first voltage signal to each of the slave power supply channels;

[0018] Each of the slave power supply channels includes:

[0019] The second feedback regulation loop is connected to the first voltage detection unit and is used to regulate the second voltage signal according to the first voltage signal and the second voltage signal detected from the output end of the power supply channel so that the second voltage signal is equal to the first voltage signal.

[0020] In some embodiments, the main power supply channel includes a first end, a second end, a third end, and a fourth end, which are used to connect to the first feedback regulation loop and the first voltage detection unit. The slave power supply channel includes a first end, a second end, a third end, and a fourth end, which are used to connect to the second feedback regulation loop. The fourth end of the front-stage power supply channel is connected to the first end of the rear-stage power supply channel. The first and second ends of the main power supply channel are connected to one end of the device under test. The third and fourth ends of the final-stage slave power supply channel are connected to the other end of the device under test, so that the main power supply channel and each slave power supply channel are connected in series; the first voltage detection unit of the main power supply channel is also connected to the control end of each slave power supply channel, so that each power supply channel outputs the same voltage.

[0021] In some embodiments, the first feedback regulation loop includes a first loop control unit, a first output unit, and a current detection unit. The first loop control unit is connected to the first output unit. The first output unit is connected to the device under test via the first end of the main power supply channel. The input end of the current detection unit is connected to the first end of the main power supply channel, and the second end of the current detection unit is connected to the first loop control unit.

[0022] In some embodiments, the first end of the first voltage detection unit is connected to the device under test via the second end of the main power channel, the second end of the first voltage detection unit is connected to the first end and the second end of the next-level slave power channel via the third end of the main power channel, the third end of the first voltage detection unit is connected to each of the slave power channels, and the fourth end of the main power channel is connected to its own ground end and the third end of the main power channel, and the first end and the second end of the slave power channel.

[0023] In some embodiments, each second feedback regulation loop includes a second loop control unit, a second output unit, and a second voltage detection unit. The second loop control unit and the second output unit are connected in sequence. The second output unit is connected to the third and fourth ends of the previous power channel via the first end of the slave power channel. The first end of the second voltage detection unit is connected to the first end of the slave power channel via the second end of the slave power channel. The second end of the second voltage detection unit is connected to the first and second ends of the next slave power channel, or the device under test, via the third end of the slave power channel. The third end of the second voltage detection unit is connected to the second loop control unit. The fourth end of the slave power channel is connected to its own ground end and the third end of the slave power channel. The fourth end of the slave power channel is connected to the first and second ends of the next slave power channel, or the device under test.

[0024] In a third aspect, an embodiment of the present application proposes a semiconductor testing system, comprising a host computer and a test head communicatively connected to the host computer, wherein the test head comprises a power supply board with multiple power supply channels as described in the first aspect or the second aspect.

[0025] Compared with the prior art, the second feedback regulation loop in the present application adjusts the second voltage signal based on the first voltage signal and detects the second voltage signal output from the power channel so that the second voltage signal is equal to the first voltage signal, thereby achieving consistency in the voltage output by each power channel and improving the output accuracy of the power supply card with multiple power channels. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 This is a structural diagram of a power supply card with multiple power channels in a voltage source mode according to an embodiment of the present application;

[0027] Figure 2 This is a structural diagram of a power supply card with multiple power supply channels in voltage and current source mode in one embodiment of the present application. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0029] Obviously, the drawings described below are merely examples or embodiments of the present application. Those skilled in the art can, without inventive effort, apply the present application to other similar scenarios based on these drawings. Furthermore, it is also understood that, although the effort involved in such a development process may be complex and lengthy, for those skilled in the art related to the content disclosed in this application, changes in design, manufacturing, or production based on the technical content disclosed in this application are merely conventional technical means and should not be construed as an insufficiency of the content disclosed in this application.

[0030] References to "embodiments" in this application mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in multiple embodiments of this application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it necessarily refer to independent or alternative embodiments that are mutually exclusive with other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described in this application may be combined with other embodiments unless there is a conflict.

[0031] Unless otherwise defined, the technical or scientific terms used in this application should have the ordinary meaning understood by a person of ordinary skill in the technical field to which this application belongs. The words "one", "a", "the" and the like used in this application do not indicate a limit on quantity and may indicate the singular or plural. The terms "include", "comprise", "have" and any variations thereof used in this application are intended to cover non-exclusive inclusions; for example, a process, method, system, product or device that includes a series of steps or modules (units) is not limited to the listed steps or units, but may also include steps or units that are not listed, or may also include other steps or units that are inherent to these processes, methods, products or devices. The words "connect", "connected", "coupled" and the like used in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The word "multiple" used in this application refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships can exist. For example, "A and / or B" can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects before and after are in an "or" relationship. The terms "first", "second", "third", etc. involved in this application are only used to distinguish similar objects and do not represent a specific order for the objects.

[0032] An embodiment of the present application provides a power supply card with multiple power supply channels, which is connected to a device under test (DUT), and includes a main power supply channel and a plurality of slave power supply channels connected in series.

[0033] The power supply card with multiple power supply channels has a voltage source mode and a current source mode. In the voltage source mode, the main power supply channel outputs a voltage signal to the device under test (DUT). In the current source mode, the main power supply channel outputs a current signal to the device under test (DUT).

[0034] Figure 1 This is a schematic diagram of the structure of a power supply card with multiple power supply channels in voltage source mode in one embodiment of the present application. Figure 1 As shown, the multi-power channel power supply card is connected to the device under test (DUT) and includes a master power channel and several slave power channels connected in series. The master power channel includes a first feedback regulation loop for regulating the first voltage signal based on a reference voltage signal and a first voltage signal detected at the output of the master power channel, so that the master power channel stably outputs the first voltage signal. The first feedback regulation loop includes a first voltage detection unit for detecting the first voltage signal at the output of the master power channel and feeding it back to the input terminal to form feedback, while also outputting it to each slave power channel. Specifically, the first feedback regulation loop is used to regulate the first voltage signal based on a reference voltage signal Vref and the first voltage signal detected at the output of the master power channel, so that the first voltage signal is equal to the reference voltage signal.

[0035] Each slave power channel includes: a second feedback regulation loop connected to the first voltage detection unit, for regulating the second voltage signal according to the first voltage signal and the second voltage signal detected at the output end of the slave power channel so that the second voltage signal is equal to the first voltage signal.

[0036] In this embodiment, the power channel connected to the frontmost stage serves as the master power channel, and the power channels connected to the rear stage serve as slave power channels. The master power channel and each slave power channel have independent ground terminals GND. Each of the master power channel and the slave power channels includes a first terminal HF, a second terminal HS, a third terminal LS, and a fourth terminal LF, which are used to connect to the first and second feedback regulation loops. The first terminal HF is a high potential application terminal, the second terminal HS is a high potential detection terminal, the third terminal LS is a low potential detection terminal, and the fourth terminal LF is a low potential application terminal. The fourth terminal LF of the front-stage power channel is connected to the first terminal HF of the rear-stage power channel, thereby achieving a series connection of multiple power channels. The first terminal HF and the second terminal HS of the main power channel are connected to one end of the device under test, and the third terminal LS and the fourth terminal LF of the final-stage slave power channel are connected to the other end of the device under test. The series connection of multiple power channels allows voltage addition, improving the overall voltage output capability.

[0037] At the same time, the master power channel is also connected to the control end of each slave power channel. Each slave power channel receives a first voltage signal transmitted by the master power channel. Each slave power channel performs feedback adjustment based on the first voltage signal, thereby achieving equal voltage output between the master power channel and each slave power channel.

[0038] The control end of each slave power channel described herein is a second loop control unit of each slave power channel.

[0039] Specifically, the first feedback regulation loop generates a first control signal based on the reference voltage signal and detects the difference between the first voltage signal at its output end, and adjusts the first voltage signal. After multiple feedback adjustments, the first voltage signal is equal to the reference voltage signal, and the main power supply channel outputs a stable first voltage signal.

[0040] The second feedback regulation loop uses the first voltage signal as a reference voltage signal, generates a second control signal based on the difference between the first voltage signal and the second voltage signal, and adjusts the second voltage signal. After multiple feedback adjustments, the second voltage signal is equal to the first voltage signal, that is, the second voltage signal is equal to the reference voltage signal, and each power supply channel outputs a stable second voltage signal.

[0041] In the above embodiment, the first feedback regulation loop adjusts the first voltage signal based on the reference voltage signal and the first voltage signal detected at its output end, so that the first voltage signal is equal to the reference voltage signal to achieve constant voltage output. Each second feedback regulation loop adjusts the second voltage signal based on the first voltage signal and the second voltage signal detected at its output end, so that the second voltage signal is equal to the first voltage signal, thereby achieving consistency in the voltage output by each power supply channel and improving the output accuracy of the power supply card with multiple power supply channels.

[0042] like Figure 1 As shown, a power supply card with multiple power channels includes power channels CH1-CHn, where power channel CH1 is a master power channel and power channels CH2-CHn are slave power channels. A first feedback regulation loop includes a first loop control unit, a first output unit, and a first voltage detection unit. The first loop control unit is connected to the first output unit, which is connected to the device under test (DUT) via the first terminal HF1 of the master power channel CH1. The first terminal of the first voltage detection unit is connected to the device under test (DUT) via the second terminal HS1 of the master power channel CH1. The second terminal of the first voltage detection unit is connected to the first terminal HF2 and the second terminal HS2 of the next-stage slave power channel CH2 via the third terminal LS1 of the master power channel CH1. The third terminal of the first voltage detection unit is connected to the first loop control unit and each of the slave power channels CH2-CHn. The fourth terminal LF1 of the master power channel CH1 is connected to its own ground terminal GND1 and the third terminal LS1 of the master power channel CH1. The fourth terminal LF1 of the master power channel CH1 is also connected to the first and second terminals of the next-stage slave power channel.

[0043] The first terminal HF1 of the main power supply channel CH1 outputs a first voltage signal to the device under test (DUT). The second terminal HS1 of the main power supply channel CH1 is connected to the device under test (DUT). Furthermore, the first terminal HF1 of the main power supply channel CH1 is connected to the second terminal HS1 of the main power supply channel CH1. The third terminal LS1 of the main power supply channel CH1 is connected to the fourth terminal LF1, and the fourth terminal LF1 is connected to the ground terminal GND1. The second terminal HS1 and the third terminal LS1 serve as input terminals of a first voltage detection unit, which detects the voltage between the first terminal HF1 and the fourth terminal LF1. The voltage value is a first voltage signal. The first voltage detection unit feeds the first voltage signal back to a first loop control unit. The first loop control unit generates a first control signal based on a reference voltage signal Vref and the first voltage signal output by the first voltage detection unit, and adjusts the first digital-to-analog converter DAC1. The voltage signal is output by a first differential signal amplifier A1, and feedback adjustment is performed multiple times to ensure that the first voltage signal detected by the first voltage detection unit is equal to the reference voltage signal, i.e., the difference is zero.

[0044] The first output unit includes a first digital-to-analog converter DAC1 and a first differential signal amplifier A1 connected in sequence, and an output end of the first differential signal amplifier A1 is connected to the device under test DUT via the port HF1.

[0045] Each second feedback regulation loop includes a second loop control unit, a second output unit, and a second voltage detection unit. The second loop control unit and the second output unit are connected in sequence. The first voltage detection unit of the master power channel is connected to the second loop control unit of each slave power channel to output the detected first voltage signal to the second loop control unit. Taking slave power channel CH2 as an example, the second output unit is connected to the third terminal LS1 and the fourth terminal LF1 of the previous power channel (master power channel) via the first terminal HF2 of slave power channel CH2. The first terminal of the second voltage detection unit is connected to the first terminal HF2 of slave power channel CH2 via the second terminal HS2 of slave power channel CH2. The second terminal of the second voltage detection unit is connected to the first terminal HF3 and the second terminal HS3 of the next slave power channel via the third terminal LS2 of slave power channel CH2. The third terminal of the second voltage detection unit is connected to the second loop control unit. The fourth terminal LF2 of slave power channel CH2 is connected to its own ground terminal GND2 and the third terminal LS2 of slave power channel CH2. The fourth terminal LF2 of slave power channel CH2 is connected to the first and second terminals of the next slave power channel.

[0046] Similarly, a second voltage signal is output from the first end HF2 of the power supply channel CH2, and the second end HS2 of the power supply channel CH2 is connected to the first end HF2, so that the second end HS2 detects the voltage signal of the first end HF2; the third end LS2 is connected to the fourth end LF2, and the fourth end LF2 is connected to the ground end GND2, so the third end LS2 detects the voltage signal of the ground end. Therefore, the second end HS2 and the third end LS2 of the power supply channel CH2 serve as input ends of the second voltage detection unit, detecting the voltage value between the first end HF2 and the ground end GND2, and the voltage value is the second voltage signal. The second voltage detection unit feeds the second voltage signal back to the second loop control unit. The second loop control unit generates a second control signal based on the second voltage signal and the first voltage signal output by the first voltage detection unit, adjusts the second digital-to-analog converter DAC2, and outputs a voltage signal through the second differential signal amplifier A2, which is fed back and adjusted multiple times in sequence so that the second voltage signal detected by the second voltage detection unit is equal to the first voltage signal, that is, the difference is 0.

[0047] The connection between the final slave power channel CHn and the preceding slave power channel CH2 is slightly different. Specifically, the second terminal of the second voltage detection unit is connected to the device under test (DUT) via the third terminal LSn of the slave power channel CHn, and the fourth terminal LFn of the slave power channel CHn is connected to its own ground terminal GNDn and the device under test (DUT).

[0048] The second output unit includes a second digital-to-analog converter DAC2 and a second differential signal amplifier A2 which are connected in sequence.

[0049] Each second loop control unit uses the first voltage signal as a reference signal, and based on the difference between the first voltage signal and the second voltage signal output by the second voltage detection unit, generates a second control signal to adjust the output of the second digital-to-analog converter DAC2. The second differential signal amplifier A2 outputs the adjusted second voltage signal, which undergoes multiple feedback adjustments to make the second voltage signal equal to the first voltage signal, that is, the difference is 0.

[0050] A master power channel and multiple slave power channels are connected in series, and the control end of each slave power channel is connected to the master power channel. Each slave power channel is regulated by its own second feedback regulation loop based on the reference value sent by the master power channel, thereby achieving consistency in the output voltage of each power channel and improving the output accuracy of the power supply card with multiple power channels.

[0051] Figure 2 This is a schematic diagram of the structure of a power supply card with multiple power supply channels in current source mode in one embodiment of the present application. Figure 2As shown, the multi-power channel power supply card is connected to the device under test (DUT) and includes a master power channel and a plurality of slave power channels connected in series. The master power channel includes a first feedback regulation loop for regulating the first current signal based on a reference current signal and a first current signal at the output of the master power channel, so that the master power channel stably outputs the first current signal. Specifically, the first feedback regulation loop regulates the first current signal based on the reference current signal and the first current signal detected at the output of the master power channel, so that the first current signal at the output of the master power channel is equal to the reference current signal. A first voltage detection unit is used to detect the first voltage signal output by the first feedback regulation loop and output it to each slave power channel.

[0052] Each slave power channel includes: a second feedback regulation loop connected to the first voltage detection unit, for regulating the second voltage signal based on the first voltage signal and the second voltage signal detected at the output end of the slave power channel so that the second voltage signal is equal to the first voltage signal.

[0053] In the above embodiment, the first feedback regulation loop regulates the first current signal based on the reference current signal and the first current signal detected at its output end, so that the first current signal is equal to the reference current signal to achieve constant current output. The first voltage detection unit detects the first voltage signal output by the first feedback regulation loop and outputs it to each slave power supply channel.

[0054] Each second feedback regulation loop adjusts the second voltage signal according to the first voltage signal and detects the second voltage signal at its output end so that the second voltage signal is equal to the first voltage signal, thereby achieving consistency in the voltage output by each power supply channel and improving the output accuracy of the power supply card with multiple power supply channels.

[0055] The main power supply channel includes a first end HF, a second end HS, a third end LS, and a fourth end LF, which are used to connect to the first feedback regulation loop and the first voltage detection unit. The slave power supply channel includes a first end HF, a second end HS, a third end LS, and a fourth end LF, which are used to connect to the second feedback regulation loop. The fourth end of the front-stage power supply channel is connected to the first end of the rear-stage power supply channel. The first and second ends of the main power supply channel are connected to one end of the device under test. Finally, the third and fourth ends of the slave power supply channel are connected to the other end of the device under test, so that the main power supply channel and each slave power supply channel are connected in series; the first voltage detection unit of the main power supply channel is also connected to the control end of each slave power supply channel, so that each power supply channel outputs the same voltage.

[0056] like Figure 2As shown, a power supply card with multiple power channels includes power channels CH1-CHn, where power channel CH1 is the master power channel and power channels CH2-CHn are slave power channels. The structure of the master power channel CH1 in constant current source mode is different from that in constant voltage source mode. Specifically, the first feedback regulation loop includes a first loop control unit, a first output unit, and a current detection unit. The first loop control unit is connected to the first output unit. The first output unit is connected to the device under test (DUT) via the first terminal HF1 of the main power channel CH1. The input terminal of the current detection unit is connected to the first terminal HF1 of the main power channel CH1, and the second terminal of the current detection unit is connected to the first loop control unit.

[0057] The first end of the first voltage detection unit is connected to the device under test DUT via the second end HS1 of the main power channel CH1, the second end of the first voltage detection unit is connected to the first end HF2 and the second end HS2 of the next-level slave power channel CH2 via the third end LS1 of the main power channel CH1, the third end of the first voltage detection unit is connected to each slave power channel CH2-CHn, the fourth end LF1 of the main power channel CH1 is connected to its own ground end GND1 and the third end LS1 of the main power channel CH1, and the first end and the second end of the next-level slave power channel.

[0058] The first output unit includes a first digital-to-analog converter DAC1 and a first differential signal amplifier A1 connected in sequence. The output end of the first differential signal amplifier A1 is connected to the device under test DUT via the first end HF1 of the main power channel CH1.

[0059] The first loop control unit adjusts the output of the first digital-to-analog converter DAC1 according to the difference between the reference current signal Iref and the first current signal output by the current detection unit to adjust the first current signal so that the first current signal is equal to the reference current signal, that is, the difference is 0.

[0060] The principle of the first voltage detection unit detecting the voltage between the first terminal HF1 and the fourth terminal LF1 of the main power channel CH1 is the same as that of the power board in the voltage source mode, which will not be repeated here.

[0061] Each second feedback regulation loop includes a second loop control unit, a second output unit, and a second voltage detection unit. The second loop control unit and the second output unit are connected in sequence. The first voltage detection unit of the master power channel is connected to the second loop control unit of each slave power channel to output the detected first voltage signal to the second loop control unit. The second output unit is connected to the third and fourth ends of the previous power channel via the first end of the slave power channel. The first end of the second voltage detection unit is connected to the first end of the slave power channel via the second end of the slave power channel. The second end of the second voltage detection unit is connected to the first and second ends of the next slave power channel, or the device under test, via the third end of the slave power channel. The third end of the second voltage detection unit is connected to the second loop control unit. The fourth end of the slave power channel is connected to its own ground end and the third end of the slave power channel. The fourth end of the slave power channel is connected to the first and second ends of the next slave power channel, or the device under test.

[0062] The second output unit includes a second digital-to-analog converter DAC2 and a second differential signal amplifier A2 which are connected in sequence.

[0063] Each second loop control unit uses the first voltage signal as a reference signal and adjusts the output of the second digital-to-analog converter DAC2 according to the difference between the first voltage signal and the second voltage signal output by the second voltage detection unit to adjust the second voltage signal so that the second voltage signal is equal to the first voltage signal, that is, the difference is 0.

[0064] In current source mode, the first feedback regulation loop forms feedback regulation through the current detection unit to achieve stable current output. The first voltage detection unit detects the voltage signal output by the first feedback regulation unit in real time and then outputs it to each slave power channel. Each slave power channel performs feedback regulation based on the power signal to achieve the same power output. In addition, the master power channel and the slave power channel are connected in series, thereby improving the output accuracy and output capacity of the power supply card with multiple power channels.

[0065] An embodiment of the present application provides a semiconductor testing system, including a host computer and a test head communicatively connected to the host computer, wherein the test head includes a power supply card with multiple power supply channels as described in the above embodiment.

[0066] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0067] The above embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art could make various modifications and improvements without departing from the spirit of the present application, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. A power supply card with multiple power supply channels, connected to a device under test, characterized in that: It includes a main power supply channel and a plurality of slave power supply channels connected in series in sequence; The main power supply channel includes: a first feedback regulation loop, configured to regulate the first voltage signal based on a reference voltage signal and a first voltage signal detected at an output end of the master power channel, so that the master power channel stably outputs the first voltage signal; wherein the first feedback regulation loop includes a first voltage detection unit, configured to detect the first voltage signal at the output end of the master power channel and feed it back to the input end to form feedback, while outputting it to each of the slave power channels; Each of the slave power supply channels includes: The second feedback regulation loop is connected to the first voltage detection unit and is used to regulate the second voltage signal according to the first voltage signal and the second voltage signal detected from the output end of the power supply channel so that the second voltage signal is equal to the first voltage signal.

2. The power supply card with multiple power channels according to claim 1, characterized in that: The master power channel and the slave power channel each include a first end, a second end, a third end, and a fourth end, which are used to connect to the first feedback regulation loop and the second feedback regulation loop. The fourth end of the front-stage power channel is connected to the first end of the rear-stage power channel. The first and second ends of the master power channel are connected to one end of the device under test. The third and fourth ends of the final-stage slave power channel are connected to the other end of the device under test, so that the master power channel and each slave power channel are connected in series. The master power channel is also connected to the control end of each slave power channel, so that each power channel outputs the same voltage.

3. The power supply card with multiple power channels according to claim 2, wherein: The first feedback regulation loop includes a first loop control unit, a first output unit, and a first voltage detection unit. The first loop control unit is connected to the first output unit. The first output unit is connected to the device under test via the first end of the main power supply channel. The first end of the first voltage detection unit is connected to the device under test via the second end of the main power supply channel. The second end of the first voltage detection unit is connected to the first and second ends of the next-stage slave power supply channel via the third end of the main power supply channel. The third end of the first voltage detection unit is connected to the first loop control unit and each of the slave power supply channels. The fourth end of the main power supply channel is connected to its own ground end and the third end of the main power supply channel, and the first and second ends of the next-stage slave power supply channel.

4. The power supply card with multiple power supply channels according to claim 3, characterized in that: Each second feedback regulation loop includes a second loop control unit, a second output unit, and a second voltage detection unit. The second loop control unit and the second output unit are connected in sequence. The second output unit is connected to the third and fourth ends of the previous power channel via the first end of the slave power channel. The first end of the second voltage detection unit is connected to the first end of the slave power channel via the second end of the slave power channel. The second end of the second voltage detection unit is connected to the first and second ends of the next slave power channel, or the device under test, via the third end of the slave power channel. The third end of the second voltage detection unit is connected to the second loop control unit. The fourth end of the slave power channel is connected to its own ground end and the third end of the slave power channel. The fourth end of the slave power channel is connected to the first and second ends of the next slave power channel, or the device under test.

5. The power supply card with multiple power supply channels according to any one of claims 1 to 4, characterized in that: The master power channel and each slave power channel receive the same clock signal and synchronously output voltage signals based on the same clock signal.

6. A power supply card with multiple power supply channels, connected to a device under test, characterized in that: It includes a main power supply channel and a plurality of slave power supply channels connected in series in sequence; The main power supply channel includes: a first feedback regulation loop, configured to regulate the first current signal according to a reference current signal and a first current signal at an output end of the main power supply channel, so that the main power supply channel stably outputs the first current signal; a first voltage detection unit, configured to detect a first voltage signal output by the first feedback regulation loop and output the first voltage signal to each of the slave power supply channels; Each of the slave power supply channels includes: The second feedback regulation loop is connected to the first voltage detection unit and is used to regulate the second voltage signal according to the first voltage signal and the second voltage signal detected from the output end of the power supply channel so that the second voltage signal is equal to the first voltage signal.

7. The power supply card with multiple power channels according to claim 6, characterized in that: The master power channel includes a first end, a second end, a third end, and a fourth end, which are used to connect to the first feedback regulation loop and the first voltage detection unit. The slave power channel includes a first end, a second end, a third end, and a fourth end, which are used to connect to the second feedback regulation loop. The fourth end of the front-stage power channel is connected to the first end of the rear-stage power channel. The first and second ends of the master power channel are connected to one end of the device under test. The third and fourth ends of the final-stage slave power channel are connected to the other end of the device under test, so that the master power channel and each slave power channel are connected in series. The first voltage detection unit of the master power channel is also connected to the control end of each slave power channel, so that each power channel outputs the same voltage.

8. The power supply card with multiple power channels according to claim 7, characterized in that: The first feedback regulation loop includes a first loop control unit, a first output unit, and a current detection unit. The first loop control unit is connected to the first output unit. The first output unit is connected to the device under test via the first end of the main power supply channel. The input end of the current detection unit is connected to the first end of the main power supply channel, and the second end of the current detection unit is connected to the first loop control unit.

9. The power supply card with multiple power channels according to claim 8, characterized in that: The first end of the first voltage detection unit is connected to the device under test via the second end of the main power supply channel, the second end of the first voltage detection unit is connected to the first end and the second end of the next-level slave power supply channel via the third end of the main power supply channel, the third end of the first voltage detection unit is connected to each of the slave power supply channels, and the fourth end of the main power supply channel is connected to its own ground end and the third end of the main power supply channel, and the first end and the second end of the slave power supply channel.

10. The power supply card with multiple power supply channels according to claim 9, characterized in that: Each second feedback regulation loop includes a second loop control unit, a second output unit, and a second voltage detection unit. The second loop control unit and the second output unit are connected in sequence. The second output unit is connected to the third and fourth ends of the previous power channel via the first end of the slave power channel. The first end of the second voltage detection unit is connected to the first end of the slave power channel via the second end of the slave power channel. The second end of the second voltage detection unit is connected to the first and second ends of the next slave power channel, or the device under test, via the third end of the slave power channel. The third end of the second voltage detection unit is connected to the second loop control unit. The fourth end of the slave power channel is connected to its own ground end and the third end of the slave power channel. The fourth end of the slave power channel is connected to the first and second ends of the next slave power channel, or the device under test.

11. A semiconductor test system comprising a host computer and a test head communicatively connected to the host computer, characterized in that: The test head includes a power supply board with multiple power supply channels as described in any one of claims 1-10.