Concentrator timing error calibration device

The concentrator timing error calibration device, which integrates components such as a power module and an error calculation module, solves the problem of the concentrator's internal clock relying on external standard time and communication delay, and achieves high-precision time synchronization and stable system operation.

CN223320764UActive Publication Date: 2025-09-09JIANGSU HOMELITE TECH CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202422121099.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-30
Publication Date
2025-09-09
Estimated Expiration
2034-08-30

AI Technical Summary

Technical Problem

The clock calibration inside the concentrator depends on the external standard time and the clock deviation caused by communication delay affects the normal operation of the entire system.

Method used

It uses a power supply module, error calculation module, standard clock receiving module, clock comparison module, clock calibration control module and communication interface module, and realizes automatic calibration through high-precision timing chip and communication protocol to reduce errors caused by clock drift and communication delay.

Benefits of technology

Significantly improve the time synchronization accuracy of devices within the system, enhance system stability and reliability, reduce manual intervention and maintenance costs, and reduce system failures.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN223320764U_ABST
    Figure CN223320764U_ABST
Patent Text Reader

Abstract

The utility model relates to a concentrator timing error calibration device, which comprises a power supply module, an error calculation module, a standard clock receiving module, a clock comparison module, a clock calibration control module and a communication interface module, the above modules are arranged on the timing error calibration device body and connected with the timing error calibration device body, a mainboard is arranged in the timing error calibration device body, the standard clock receiving module is arranged on the left side of the timing error calibration device body and connected with the clock comparison module on the right side of the timing error calibration device body, and the clock comparison module is connected with the error calculation module. The error calculation module is arranged above the clock comparison module and connected with the clock calibration control module on the right side, the clock calibration control module is connected with the communication interface module on the right side, and the power module is arranged above the standard clock receiving module. The internal clock of the concentrator is calibrated periodically or automatically, so that the time deviation caused by clock drift can be reduced remarkably, and the time synchronization precision among devices in the system is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The utility model belongs to the technical field of time synchronization, and in particular relates to a concentrator timing error calibration device. Background Art

[0002] With the development of technologies such as smart grids and the Internet of Things (IoT), the optimization of power resource allocation through zoned and time-of-use market pricing is posing new challenges to the clock accuracy of various on-site data collection and metering devices. Concentrators, as core nodes for data collection and management, face a significant challenge in terms of the accuracy of their internal clocks, which directly impacts the overall system's operational efficiency and reliability. Currently, calibration of concentrator clocks often relies on external standard time sources. However, due to various factors, such as signal interference and clock drift, the internal clocks of concentrators can still deviate, impacting the normal operation of the entire system. Furthermore, existing clock calibration mechanisms fail to fully account for communication delays in both remote and local communications, leading to potential deviations between various devices and the standard clock source even after calibration. Therefore, addressing the clock accuracy requirements of real-time power status monitoring and metering equipment in smart grids and the IoT, we have developed a novel device that effectively calibrates concentrator timing errors. This device integrates detection, communication, and time calibration to improve the accuracy of on-site concentrator clocks.

[0003] In summary, the existing technology has the problem that the internal clock calibration of the concentrator depends on the external standard time and the internal clock deviation caused by communication delay affects the normal operation of the entire system. Utility Model Content

[0004] The purpose of this section is to summarize some aspects of the embodiments of the present invention and briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section and in the abstract and title of the present invention to avoid obscuring the purpose of this section, the abstract and the title of the utility model, and such simplifications or omissions shall not be used to limit the scope of the present invention.

[0005] Therefore, the purpose of the present invention is to provide a concentrator timing error calibration device that can solve the problem in the prior art that the internal clock calibration of the concentrator depends on the external standard time and the internal clock deviation caused by communication delay, which affects the normal operation of the entire system. The present invention provides a concentrator timing error calibration device, which includes a power supply module, an error calculation module, a standard clock receiving module, a clock comparison module, a clock calibration control module and a communication interface module; the above modules are all connected to the timing error calibration device body on the timing error calibration device body, and the timing error calibration device body is provided with a main board, the standard clock receiving module is connected to the clock comparison module on the left side of the timing error calibration device body, the clock comparison module is connected to the error calculation module, the error calculation module is connected to the clock calibration control module on the right side above the clock comparison module, the clock calibration control module is connected to the communication interface module on the right side, and the power supply module is located above the standard clock receiving module.

[0006] Optionally, the standard clock receiving module adopts an ATGM332D module with a built-in clock pulse signal line, and interacts with the clock comparison module through the built-in TXD and RXD interfaces on the right side.

[0007] Optionally, the clock comparison module adopts a high-precision timing chip BL8025T, and the error calculation module adopts a high-performance processor, which is connected to the clock calibration control module through a built-in TXD interface.

[0008] Optionally, the clock calibration control module uses an MCU to obtain the time error output by the error calculation module, adopts a 698 communication protocol, and is connected to the communication interface module via an RS485 interface.

[0009] Optionally, the power module has a power interface on the left side connected to the voltage on the left side.

[0010] Optionally, the standard clock receiving module has an interface on the left side connected to the external GPS standard clock on the left side.

[0011] Optionally, the communication interface module has an interface on the right side connected to the concentrator on the right side.

[0012] In summary, the present invention has at least one of the following beneficial effects:

[0013] The utility model can significantly reduce the time deviation caused by clock drift and improve the time synchronization accuracy between various devices in the system by regularly or automatically calibrating the internal clock of the concentrator.

[0014] Many automated systems require accurate timestamps for event recording, data processing, and decision making. Reducing clock errors can avoid problems caused by time inconsistencies, thereby enhancing the stability and reliability of the overall system. Calibrating the clock helps improve the quality and consistency of the collected data.

[0015] The utility model reduces the need for manual intervention through automatic calibration, thus reducing maintenance costs and operational complexity. At the same time, it reduces system failures caused by time errors, further saving maintenance costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0017] Figure 1 This is a schematic diagram of the working principle of a concentrator timing error calibration device of the present invention;

[0018] List of accompanying drawings: 1. Voltage; 2. Power supply module; 3. Error calculation module; 4. Clock calibration control module; 5. Communication interface module; 6. Concentrator; 7. GPS standard clock; 8. Standard clock receiving module; 9. Clock comparison module; 10. Timing error calibration device body. Implementation Method

[0019] The following is combined with Figure 1 The utility model is further described in detail.

[0020] Example 1, refer to Figure 1 In order to solve the problem in the prior art that the internal clock calibration of the concentrator depends on the external standard time and the internal clock deviation caused by communication delay, which affects the normal operation of the entire system, this embodiment discloses a concentrator timing error calibration device, including a power supply module 2, an error calculation module 3, a standard clock receiving module 8, a clock comparison module 9, a clock calibration control module 4 and a communication interface module 5; the above modules are all on the timing error calibration device body 10, and the timing error calibration device body 10 is provided with a main board, and each module is connected to the main board. The standard clock receiving module 8 is connected to the clock comparison module 9 on the left side of the timing error calibration device body 10, and the clock comparison module 9 is connected to the error calculation module 3. The error calculation module 3 is connected to the clock calibration control module 4 on the right side above the clock comparison module 9, and the clock calibration control module 4 is connected to the communication interface module 5 on the right side. Above the standard clock receiving module 8 is the power supply module 2.

[0021] Standard clock receiver module 8 uses the ATGM332D module and has a built-in clock pulse signal line for receiving standard GPS time information and outputting an adjustable clock pulse signal with a default frequency of 1 Hz. It also has built-in TXD (serial data transmit signal line) and RXD (serial data receive signal line) interfaces for interacting with clock comparison module 9 and transmitting the acquired standard GPS time information to it.

[0022] The clock comparison module 9 adopts the high-precision timing chip BL8025T, and the error calculation module 3 adopts a high-performance processor with clock and automatic leap year correction calendar functions. It has a built-in high-stability digital temperature compensated crystal oscillator and supports high-frequency output, which can ensure the accuracy of the clock of the error calibration device and eliminate the time calibration error caused by the error of the clock of the device.

[0023] Error calculation module 3 uses a high-performance processor to compare and measure the time difference between clock signals A and B using the pulse filling method, store the time difference, and transmit it to clock calibration control module 4 via the TXD interface. Clock signal A is the GPS clock signal obtained by the standard clock receiving module 8, and clock signal B is the clock signal of the concentrator 6 obtained through the communication interface module 5.

[0024] The clock calibration control module 4 uses the MCU to obtain the time error output by the error calculation module 3. Using the 698 communication protocol, it frames a time difference calibration message and sends it to the communication interface of the concentrator 6 via the RS485 interface of the communication interface module 5. After receiving the calibration command, the concentrator 6 adjusts its internal clock to achieve time synchronization. The clock comparison module 9 continuously monitors the clock deviation using the 698 protocol to determine whether the clock calibration is successful. If unsuccessful, it attempts again.

[0025] The power module 2 has a power interface on the left side connected to the voltage 1 on the left. The standard clock receiving module 8 has an interface on the left side connected to the external GPS standard clock 7 on the left. The communication interface module 5 has an interface on the right side connected to the concentrator 6 on the right.

[0026] Specific implementation principle: When using the utility model, it is only necessary to connect the power module 2, the communication interface module 5, and the standard clock receiving module 8 to the voltage 1, the concentrator 6 and the GPS standard clock 7 respectively. When the power is connected to the voltage 1, the mainboard operates, and the various modules on the mainboard also start to operate. The standard clock receiving module 8 can continuously monitor the clock deviation through the connection of the GPS standard clock 7 to determine whether the clock calibration is successful. If unsuccessful, it will try again. The communication interface module 5 transmits the message generated by the clock calibration control module 4 to the concentrator 6 to adjust the internal clock for real-time calibration. The stability of the power module 2 ensures that the clock chip can work stably and normally when the external power supply is interrupted, and there will be no clock confusion or clock stop problems.

[0027] The above are all preferred embodiments of the present invention, and are not intended to limit the scope of protection of the present invention. Therefore, any equivalent changes made based on the structure, shape, and principle of the present invention should be included in the scope of protection of the present invention.

Claims

1. A concentrator timing error calibration device, characterized in that: The invention comprises a power supply module (2), an error calculation module (3), a standard clock receiving module (8), a clock comparison module (9), a clock calibration control module (4) and a communication interface module (5); the above modules are all connected to the timing error calibration device body (10) and the timing error calibration device body (10); a main board is provided in the timing error calibration device body (10); the standard clock receiving module (8) is connected to the clock comparison module (9) on the right side of the timing error calibration device body (10); the clock comparison module (9) is connected to the error calculation module (3); the error calculation module (3) is connected to the clock calibration control module (4) on the right side above the clock comparison module (9); the clock calibration control module (4) is connected to the communication interface module (5) on the right side; and the power supply module (2) is located above the standard clock receiving module (8).

2. The concentrator timing error calibration device according to claim 1, characterized in that: The standard clock receiving module (8) adopts an ATGM332D module with a built-in clock pulse signal line, and interacts with the clock comparison module (9) via built-in TXD and RXD interfaces on the right side.

3. The concentrator timing error calibration device according to claim 1, characterized in that: The clock comparison module (9) uses a high-precision timing chip BL8025T, and the error calculation module (3) uses a high-performance processor, which is connected to the clock calibration control module (4) via a built-in TXD interface.

4. The concentrator timing error calibration device according to claim 1, characterized in that: The clock calibration control module (4) uses an MCU to obtain the time error output by the error calculation module (3), adopts a 698 communication protocol, and is connected to the communication interface module (5) via an RS485 interface.

5. The concentrator timing error calibration device according to claim 1, characterized in that: The power module (2) has a power interface on the left side connected to the voltage (1) on the left side.

6. The concentrator timing error calibration device according to claim 1, characterized in that: The standard clock receiving module (8) has an interface on the left side connected to the external GPS standard clock (7) on the left side.

7. The concentrator timing error calibration device according to claim 1, characterized in that: The right side of the communication interface module (5) has an interface connected to the concentrator (6) on the right side.