Image sensor

Abstract

The utility model provides an image sensor. The image sensor comprises a plurality of photosensitive areas located in a first array in a semiconductor substrate. The microlenses are disposed in the second array over the semiconductor substrate. A plurality of metal half-shields are disposed between a subset of the microlenses and the corresponding photosensitive areas. The size and position of the metal semi-shielding member provide semi-shielding so that semi-shielding phase detection auto-focusing can be achieved. The anti-reflection coating is arranged on the metal semi-shielding piece. The metal half-shield and the anti-reflective coating may be located in a composite grid that provides lateral separation between the plurality of color filters. Alternatively, a metal half-shield and an anti-reflective coating may be located below a layer including a color filter. The anti-reflection coating comprises a quarter-wave layer.

Description

Technical Field

[0001] The utility model relates to an image sensor. Background Art

[0002] Many modern electronic devices (e.g., digital cameras, optical imaging devices, etc.) include image sensors. Image sensors consist of an array of pixel sensors, which are transducers used to convert light into digital data. Some types of pixel sensors include charge-coupled device (CCD) image sensors and complementary metal-oxide-semiconductor (CMOS) image sensors. Compared to CCD pixel sensors, CMOS pixel sensors are favored due to their low power consumption, small size, fast data processing, direct data output, and low manufacturing cost. Some CMOS image sensors provide autofocus. One type of autofocus is contrast detection autofocus. Contrast detection autofocus works by analyzing the contrast in the image and adjusting the focus until the highest contrast is achieved. While this method can be accurate, it is relatively slow. Phase detection autofocus (PDAF) is faster. PDAF uses dedicated pixels to detect and measure the phase difference between light rays from different parts of the scene. The camera can use this phase difference to quickly determine the distance to the subject and adjust the focus accordingly. Utility Model Content

[0003] The utility model provides an image sensor, comprising a semiconductor substrate, a metal interconnect structure, a plurality of photodetectors, a plurality of microlenses, a plurality of metal semi-shields, and a plurality of anti-reflection coatings. The semiconductor substrate has a first side and a second side, the second side being different from the first side. The metal interconnect structure comprises a plurality of metallization layers above the first side. The plurality of photodetectors comprises a plurality of photosensitive regions in a first array within the semiconductor substrate. A plurality of microlenses are located in a second array above the second side, wherein the plurality of microlenses are positioned to focus incident radiation on corresponding photosensitive regions among the plurality of photosensitive regions in the first array. A plurality of metal semi-shields are located between a subset of the plurality of microlenses and the plurality of photosensitive regions corresponding thereto, wherein the plurality of metal semi-shields are of a type capable of achieving semi-shielded phase detection autofocusing. A plurality of anti-reflection coatings are located above the plurality of metal semi-shields.

[0004] The present invention provides an image sensor comprising a semiconductor substrate, an array comprising a plurality of photodetectors, an array comprising a plurality of color filters, and a composite grid. The array comprising the plurality of photodetectors includes a plurality of photosensitive regions within the semiconductor substrate. The array comprising the plurality of color filters is positioned above the plurality of photosensitive regions. The composite grid includes a plurality of segments laterally separating the plurality of color filters, wherein the composite grid includes an antireflection coating positioned above a metal layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Various aspects of the present invention are best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of various features may be arbitrarily increased or decreased for clarity of discussion.

[0006] Figure 1 A cross-sectional view of an image sensor according to some aspects of the present disclosure is shown.

[0007] Figure 2 Show Figure 1 A plan view of the image sensor shown.

[0008] Figure 3 A cross-sectional view of an image sensor according to another embodiment is shown.

[0009] Figure 4 A cross-sectional view of an image sensor according to another embodiment is shown.

[0010] Figure 5 A cross-sectional view of an image sensor according to another embodiment is shown.

[0011] Figures 6 to 21 A method of manufacturing an image sensor according to some embodiments is shown.

[0012] Figures 22 to 24 According to some other embodiments Figures 6 to 21 A variation of the method shown.

[0013] Figure 25 is a flow chart of a process according to some embodiments.

[0014] [Explanation of Figure Numbers]

[0015] 100, 300, 400, 500: image sensor;

[0016] 101, 101A, 101B: color filters;

[0017] 102: Edge;

[0018] 103: Center;

[0019] 104, 107: paragraph;

[0020] 105: Metal semi-shielding part;

[0021] 105A: Left half shield;

[0022] 105B: right half shield;

[0023] 109: microlens;

[0024] 113: dielectric;

[0025] 115: encapsulation layer;

[0026] 117: dielectric layer;

[0027] 119: anti-reflective coating;

[0028] 121: metal layer;

[0029] 127: First chip;

[0030] 131: Wiring;

[0031] 133: inter-level dielectric;

[0032] 137: through hole;

[0033] 141: second chip;

[0034] 143: the third chip;

[0035] 155: a third semiconductor substrate;

[0036] 157: Third metal interconnect structure;

[0037] 159: second semiconductor substrate;

[0038] 163: Second metal interconnect structure;

[0039] 165: front side;

[0040] 167: Metal interconnect structure;

[0041] 171: Shallow Trench Isolation (STI) structure;

[0042] 173: floating diffusion area;

[0043] 175: transfer gate;

[0044] 181: photodiode;

[0045] 183: Deep Trench Isolation (DTI) structure;

[0046] 185: semiconductor body;

[0047] 191: dorsal;

[0048] 193: Composite grid;

[0049] 200: Floor plan;

[0050] 301: gap layer;

[0051] 401: first quarter wave layer / upper quarter wave layer;

[0052] 403: second quarter wave layer / lower quarter wave layer;

[0053] 600, 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600, 1700, 1800, 1900, 2000, 2100, 2200, 2300, 2400: cross-sectional views;

[0054] 601, 1201: dopant;

[0055] 801, 1001, 1601, 1901: mask;

[0056] 803, 1603: groove;

[0057] 901: Gate stack;

[0058] 1101: spacer;

[0059] 1301: bonding pad;

[0060] 1303: contact plug;

[0061] 1605: medial wall / side wall;

[0062] 1801: Composite grid stacking;

[0063] 1903: Opening;

[0064] 2500: Craftsmanship;

[0065] 2501, 2503, 2505, 2507, 2509, 2511, 2513, 2515, 2517, 2519, 2521, 2523, 2525, 2527: action;

[0066] A-A': line;

[0067] W1, W2: width. DETAILED DESCRIPTION

[0068] The present disclosure provides many different embodiments or examples for implementing the different features of the present disclosure. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are merely examples and are not intended to be limiting. For example, the following description of forming a first feature on or on a second feature may include embodiments in which the first feature and the second feature are formed to be in direct contact, and may also include embodiments in which an additional feature may be formed between the first feature and the second feature so that the first feature and the second feature are not in direct contact. In addition, the present disclosure may reuse reference numbers and / or letters in various examples. Such repetition is for the purpose of brevity and clarity and does not itself represent the relationship between the various embodiments and / or configurations discussed.

[0069] Furthermore, for ease of description, spatially relative terms such as "beneath," "below," "lower," "above," "upper," and the like may be used herein to describe the relationship of one component or feature shown in the figures to another component or feature. These spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may have other orientations (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein should be interpreted accordingly. The terms "first," "second," "third," "fourth," etc. are merely general identifiers and, as such, are interchangeable in various embodiments. For example, while a device (e.g., an opening) may be referred to as a "first" device in some embodiments, it may be referred to as a "second" device in other embodiments.

[0070] One form of PDAF utilizes a quad pixel arrangement. In a quad pixel arrangement, four photodetector pixels are arranged in a 2×2 grid under each microlens. Two diagonally opposite pixels in the grid can be used for phase detection. The other two pixels can be actively used for image capture. The quad pixel arrangement provides good phase detection autofocus in low light conditions. Another form of PDAF is half-shield PDAF. Half-shield PDAF uses a metal half-shield to mask half of the area under a set of selected microlenses. Some of the microlenses are masked on one side (left side) while others are masked on the opposite side (right side). Data from under the shielded microlenses on the left is compared with data from under the shielded microlenses on the right to provide phase detection. Half-shield PDAF performs better at higher light levels.

[0071] While it's possible to combine four-pixel PDAF with semi-shielded PDAF, it's been found that reflections from the metal semi-shield can cause crosstalk, affecting the pixels effectively used for image sensing. According to the present disclosure, an anti-reflective coating is provided over the metal semi-shield. This anti-reflective coating reduces or eliminates this source of crosstalk and is particularly suitable for image sensing devices that combine four-pixel PDAF with semi-shielded PDAF.

[0072] Some aspects of the present disclosure relate to an image sensor comprising a plurality of photodetectors, the photodetectors comprising a plurality of photosensitive regions in a first array within a semiconductor substrate. A plurality of microlenses are disposed in a second array above the semiconductor substrate. A plurality of metal semi-shields are disposed between subsets of the microlenses and the photosensitive regions corresponding to the microlenses. The metal semi-shields are sized and positioned to achieve semi-shielded photodiode-assisted focal plane (PDAF). An anti-reflective coating is disposed on the metal semi-shields.

[0073] In some embodiments, the metal half-shield is incorporated into a backside metal grid that includes segments corresponding to boundaries between adjacent photodetector pixels. In some embodiments, the backside metal grid and antireflective coating are part of a composite grid that provides lateral separation between multiple color filters. In some embodiments, the backside metal grid and antireflective coating are located below a layer that includes the color filters. Placing the metal grid and antireflective coating near the photodetector pixels reduces crosstalk. In these embodiments, the footprint of the antireflective coating is limited to the footprint of the backside metal grid. Limiting the area of ​​the antireflective coating to the area of ​​the backside metal grid improves quantum efficiency.

[0074] In some embodiments, the antireflective coating prevents reflection by destructive interference of incident light. Destructive interference is maximized when the thickness of the material layer is one-quarter the wavelength of the incident light. In some embodiments, the antireflective coating includes a layer having a quarter-wavelength thickness for the wavelength of visible light. In some embodiments, the antireflective coating includes a layer having a quarter-wavelength thickness for the wavelength of green light. Green light is located at the center of the visible light spectrum. A layer having a quarter-wavelength thickness is referred to as a quarter-wavelength layer.

[0075] In some embodiments, the antireflection coating includes a first layer having a thickness of one-quarter wavelength for a first wavelength of visible light and a second layer having a thickness of one-quarter wavelength for a second wavelength of visible light. In some embodiments, the shorter-wavelength quarter-wave layer is positioned above the longer-wavelength quarter-wave layer. Stacking the two quarter-wave layers in this manner can improve the effectiveness of suppressing reflections. In some embodiments, the quarter-wave layer directly contacts the half-shield. Placing the quarter-wave layer closer to the half-shield can improve the suppression of reflections.

[0076] In some embodiments, the quarter wave layer is, for example, silicon oxynitride (SiO x N y ), silicon nitride (SiN), and other dielectrics. Silicon oxynitride has excellent optical properties and a refractive index that can be tuned by varying its composition. In some embodiments, the quarter-wave layer is a metal compound. Metal compounds provide particularly good adhesion to the metal providing the semi-shielding. In some embodiments, the metal compound is an oxide. Metal oxides such as tantalum oxide (TaO) have good optical properties and process compatibility. Metal nitrides such as titanium nitride (TiN) are particularly compatible with the type of metal used for the semi-shielding.

[0077] In some embodiments, some of the photodetectors are active pixels and others are PDAF pixels. The active pixels are coupled to imaging circuitry, which constructs an image based on data provided by the active pixels. The PDAF pixels are coupled to PDAF circuitry, which determines a phase difference based on the PDAF pixel data. The phase difference can be the difference between an "A" pixel (the pixel on the right) and a "B" pixel (the pixel on the left) in a region of interest (ROI).

[0078] In some embodiments, the image sensor utilizes backside illumination. An image sensor configured for backside illumination may have metal interconnects on the front side to avoid the metal interconnects blocking any incident light.

[0079] Figure 1 A cross-sectional view of an image sensor 100 according to some embodiments is shown. Image sensor 100 is an integrated circuit (IC) device, which may be a three-dimensional IC (3D-IC), and includes a first chip 127, a second chip 141, and a third chip 143 that are stacked, bonded, and interconnected. First chip 127 includes a semiconductor body 185 and a metal interconnect structure 167. Second chip 141 includes a second semiconductor substrate 159 and a second metal interconnect structure 163. Third chip 143 includes a third semiconductor substrate 155 and a third metal interconnect structure 157.

[0080] An array of multiple photodiodes 181 is disposed within a semiconductor body 185. A deep trench isolation (DTI) structure 183 provides isolation between adjacent photodiodes 181 within the array. The isolation structure may be in the form of a grid having multiple segments between adjacent photodiodes. The photodiodes 181 are the light-sensing devices of the photodetector pixels. The photodetector pixels may include a transfer gate 175 and a floating diffusion region 173 located on the front side 165 of the semiconductor body 185. Additional intra-pixel circuitry may include, for example, a reset gate transistor, a source follower transistor, a select gate transistor, and the like. Such additional intra-pixel circuitry may be disposed on the second semiconductor substrate 159. Additional circuitry, which may be application-specific, may be disposed on the third semiconductor substrate 155.

[0081] An array of a plurality of microlenses 109 is disposed over backside 191 of semiconductor body 185. In image sensor 100, each of microlenses 109 has a footprint corresponding to four of photodiodes 181 arranged in a 2×2 grid and is configured to focus incident radiation onto the four photodiodes 181. In alternative embodiments, each of microlenses 109 corresponds to only one photodiode 181. An array of a plurality of color filters 101 is disposed between the array of microlenses 109 and photodiodes 181. For each microlens 109, there is one color filter 101. In some embodiments, color filters 101 are arranged in a Bayer pattern.

[0082] Composite grid 193, located on backside 191, includes metal layer 121, antireflective coating 119, and dielectric layer 117. Composite grid 193 includes a plurality of segments 104 and a plurality of segments 107, which are positioned between and separate adjacent color filters 101. Metal layer 121 provides the backside metal grid. Segments 107 constitute the majority of composite grid 193. Segments 107 are relatively narrow and symmetrically arranged below the juncture of microlenses 109. Composite grid 193 also includes segments 104, which are similar to segments 107 but wider on one side, such that metal layer 121 in segments 107 provides a plurality of metal half-shields 105.

[0083] Color filter 101A, located on one side of segment 104, has a width W1. Color filter 101B, located on the opposite side of segment 104, has a larger width W2. Color filter 101B is centered below microlens 109 corresponding to color filter 101B. Color filter 101A is offset to one side of microlens 109 corresponding to color filter 101A. In some embodiments, width W1 is approximately 25% to approximately 75% of width W2. Width W1 can be approximately half of width W2, so that edge 102 of metal half-shield 105 is approximately aligned with center 103 of half-shielded microlens 109.

[0084] Figure 2 Provide corresponding Figure 1 As shown in the plan view 200, the metal half shield 105 only exists under a portion of the micro lens 109 (see FIG. Figure 1In some embodiments, approximately 2% to approximately 10% of the microlenses 109 include a metal half-shield 105. The metal half-shield 105 can be divided into a left half-shield 105A and a right half-shield 105B. A first angular response curve can be generated for PDAF pixels located below the left half-shield 105A in the ROI. A second angular response curve can be generated for PDAF pixels located below the right half-shield 105B in the ROI. PDAF can adjust the lens position until the peak of the first angular response curve coincides with the peak of the second angular response curve.

[0085] An encapsulation layer 115 may be disposed on and along the sidewalls of the composite grid 193. The dielectric 113 may separate the composite grid 193 from the backside 191. The metal layer 121 may be grounded to the semiconductor body 185. Such grounding may be provided by a ground bar (not shown) disposed in a peripheral region (not shown) of the semiconductor body 185, which is outside the image sensing region.

[0086] Including photodiode 181 (see Figure 1 Some of the photodetector pixels in the metal half-shield 105 are image sensing pixels, while others are PDAF photodetector pixels. For each metal half-shield 105, there is at least one PDAF photodetector pixel. In some embodiments where four photodetector pixels are present in a 2×2 array beneath each microlens 109, two diagonally opposite photodetector pixels are PDAF pixels. The difference between image sensing pixels and PDAF pixels can be seen in the circuitry connected to the corresponding photodiodes 181. Specifically, the amplification circuitry connected to these different types of photodetector pixels may differ.

[0087] Back to Figure 1 , the metal layer 121 can have any suitable composition and thickness. In some embodiments, the metal layer 121 comprises aluminum (Al), copper (Cu), tungsten (W), or a similar material. In some embodiments, the metal layer 121 comprises tungsten (W) or a similar material. These materials have good process compatibility and photoresist blocking capabilities. In some embodiments, the metal layer 121 has a thickness in the range of about 50 nanometers to about 500 nanometers. In some embodiments, the metal layer 121 has a thickness in the range of about 100 nanometers to about 300 nanometers. These thicknesses provide an effective photoresist block.

[0088] The total thickness of composite grid 193 is related to the thickness of color filter 101 and can be varied to provide a targeted focusing distance between microlens 109 and photodiode 181. In some embodiments, the total thickness is in a range of about 100 nanometers to about 1000 nanometers. In some embodiments, the total thickness is in a range of about 200 nanometers to about 600 nanometers. The thickness of metal layer 121 can be determined to provide sufficient thickness for a photoresist stop. The thickness of antireflective coating 119 is a thickness that transmits a selected wavelength to provide destructive interference. The remaining thickness can be provided by dielectric layer 117.

[0089] In some embodiments, the microlenses 109 are made of a polymer and have a refractive index in the range of approximately 1.4 to 1.7. The refractive index varies slightly with wavelength. For the purposes of this disclosure, the refractive index is that at a wavelength of 520 nanometers. The dielectric layer 117 between the microlenses 109 and the antireflective coating 119 can be silicon dioxide (SiO2) or a similar material. Silicon dioxide has a refractive index of approximately 1.45. The encapsulation layer 115 is optional. The inclusion of the encapsulation layer 115 can also be silicon dioxide (SiO2) or a similar material. These choices avoid refractive index contrast that can cause reflection of incident radiation before it reaches the antireflective coating 119.

[0090] In some embodiments, the antireflective coating 119 includes a quarter-wave layer. In some embodiments, the quarter-wave layer has a quarter-wave thickness for wavelengths in the visible spectrum, which is about 400 nanometers to about 700 nanometers. In some embodiments, the quarter-wave layer has a quarter-wave thickness for wavelengths in the green portion of the spectrum, which is about 495 nanometers to about 570 nanometers.

[0091] To provide destructive interference, the quarter-wave layer has a refractive index contrast with the interface media located above and below the quarter-wave layer. This constraint is easily achieved when the quarter-wave layer directly contacts the metal layer 121: the refractive index of the metal layer 121 is substantially higher. If silicon dioxide is located immediately above the quarter-wave layer, it is desirable that the quarter-wave layer have a refractive index of at least about 1.7. In some embodiments, the quarter-wave layer has a refractive index of at least about 1.9.

[0092] In some embodiments, the anti-reflective coating 119 comprises silicon oxynitride (SiO x N y) or the like. The refractive index of silicon oxynitride can vary between the refractive index of silicon dioxide (SiO2), which is approximately 1.45, and the refractive index of silicon nitride (SiN), which is approximately 2.0. The refractive index depends on the ratio of oxygen to nitrogen in the silicon oxynitride. In some embodiments, a composition is selected that provides a refractive index of at least approximately 1.7. In some embodiments, a composition is selected that provides a refractive index of at least approximately 1.9. In some embodiments, the anti-reflective coating 119 includes a silicon oxynitride layer having a thickness in a range of approximately 50 nanometers to approximately 103 nanometers. In some embodiments, the anti-reflective coating 119 includes a silicon oxynitride layer having a thickness in a range of approximately 73 nanometers to approximately 84 nanometers.

[0093] In some embodiments, the anti-reflective coating 119 includes a layer composed of tantalum pentoxide (Ta2O5) or the like. Tantalum pentoxide has a refractive index of approximately 2.1. In some embodiments, the anti-reflective coating 119 includes a tantalum pentoxide layer having a thickness in a range of approximately 47 nanometers to approximately 83 nanometers. In some embodiments, the anti-reflective coating 119 includes a tantalum pentoxide layer having a thickness in a range of approximately 59 nanometers to approximately 68 nanometers. Tantalum pentoxide has good optical properties and good process compatibility.

[0094] In some embodiments, the anti-reflective coating 119 includes a layer composed of titanium nitride (TiN) or the like. The refractive index of titanium nitride can vary, but is typically about 2.1 to about 2.4. In some embodiments, the anti-reflective coating 119 includes a titanium nitride layer having a thickness in a range of about 41 nanometers to about 83 nanometers. In some embodiments, the anti-reflective coating 119 includes a titanium nitride layer having a thickness in a range of about 52 nanometers to about 68 nanometers. The titanium nitride layer can exhibit a plasmonic effect that helps suppress reflections.

[0095] In some embodiments, the anti-reflective coating 119 includes a layer composed of titanium dioxide (TiO2) or the like. The refractive index of titanium dioxide can vary, but is typically about 2.4 to about 2.9. In some embodiments, the anti-reflective coating 119 includes a titanium dioxide layer having a thickness in the range of about 34 nanometers to about 73 nanometers. In some embodiments, the anti-reflective coating 119 includes a titanium dioxide layer having a thickness in the range of about 43 nanometers to about 61 nanometers. Titanium dioxide combines a high refractive index with good optical properties, making it particularly suitable for forming an anti-reflective coating over the metal layer 121; titanium dioxide can have a very high effective reflectivity. Titanium dioxide's high refractive index also facilitates its use as the lower layer in a stack of multiple quarter-wave layers suitable for eliminating reflections within a range of wavelengths.

[0096] Figure 3 A cross-sectional view of an image sensor 300 is shown according to some other embodiments. Figure 3 The image sensor 300 is similar to Figure 1 Image sensor 100 is shown, except that image sensor 300 includes a gap layer 301 between antireflective coating 119 and metal layer 121. Gap layer 301 can include one or more layers made of any suitable composition and having any thickness, including, as desired, conductive layers or dielectric layers. Gap layer 301 can be, for example, a layer that provides adhesion between antireflective coating 119 and metal layer 121. At least an upper portion of gap layer 301 has a refractive index contrast with antireflective coating 119. In some embodiments, gap layer 301 is silicon dioxide. In some embodiments, gap layer 301 has the same composition as dielectric layer 117.

[0097] Figure 4 FIG. 4 shows a cross-sectional view of an image sensor 400 according to some other embodiments. The image sensor 400 is similar to Figure 1 The image sensor 100 shown, in addition to the image sensor 400, the anti-reflection coating 119 includes at least a first quarter-wave layer 401 (also referred to as an upper quarter-wave layer) and a second quarter-wave layer 403 (also referred to as a lower quarter-wave layer). In some embodiments, the second quarter-wave layer 403 has a higher refractive index than the first quarter-wave layer 401. The two quarter-wave layers can be adapted to eliminate reflections at different wavelengths and can together provide better anti-reflection performance than a single quarter-wave layer can provide, particularly when the lower quarter-wave layer 403 has a higher refractive index than the upper quarter-wave layer 401.

[0098] Figure 5 FIG. 5 shows a cross-sectional view of an image sensor 500 according to some other embodiments. The image sensor 500 is similar to Figure 1 The image sensor 100 shown in FIG. 5 is different from the image sensor 500 in that the metal layer 121 and the anti-reflective coating 119 are located below the color filter 101. In addition, the metal layer 121 and the anti-reflective coating 119 may have the same Figure 1 The composition and geometry of the image sensor 100 are the same as those of the image sensor 100 shown. For some applications, Figure 5 The image sensor 500 shown may have a relatively Figure 1 The image sensor 100 shown has a high quantum efficiency.

[0099] Figures 6 to 21 A series of cross-sectional views 600 to 2100 are provided, illustrating an image sensing integrated circuit device according to the present disclosure at various stages of fabrication according to the process of the present disclosure. Figures 6 to 21The description is given with respect to a series of actions, but it should be understood that in some cases, the order of the actions may be changed, and that the series of actions also applies to structures other than the ones shown. In some embodiments, some of the actions may be omitted in whole or in part. In addition, although Figures 6 to 21 It is described in terms of a series of actions, but it should be understood that Figures 6 to 21 The structure shown in is not limited to the manufacturing method but can exist independently as a structure separate from the method.

[0100] like Figure 6 As shown in cross-sectional view 600 of FIG, the method may first implant dopants 601 into the front side of semiconductor body 185 to form a plurality of photodiodes 181. The dopants may be implanted in a series of steps including, for example, deep n-well implants, shallow p-well implants, and the like. Some of these dopant implants may be performed using a mask, while others may be performed without a mask. Semiconductor body 185 may be cut from a single crystal and may be any type of semiconductor. The semiconductor may be, for example, silicon (Si), a III-V semiconductor, or some other binary semiconductor, a ternary semiconductor (e.g., AlGaAs), a higher order semiconductor, or the like. In some embodiments, semiconductor body 185 is or includes silicon (Si) or a similar material.

[0101] like Figure 7 As shown in cross-sectional view 700 of FIG, the method may continue to form a plurality of shallow trench isolation (STI) structures 171 as needed. Forming the STI structures 171 may include forming a mask and etching a plurality of trenches in the front side 165, stripping the mask, depositing a dielectric to fill the trenches, and planarizing. The dielectric may be silicon dioxide (SiO2), a similar material, or any other suitable dielectric.

[0102] like Figure 8 As shown in the cross-sectional view 800 of FIG, a mask 801 for etching a plurality of trenches 803 can be formed. Mask 801 and other masks used throughout the process can be patterned by photolithography, electron beam lithography, similar methods, or any other suitable method. The mask can include a photoresist mask and / or a hard mask. The hard mask can be patterned from the photoresist mask. After etching, mask 801 can be stripped.

[0103] like Figure 9As shown in the cross-sectional view 900 of , a gate stack 901 can then be formed. The gate stack 901 fills the trench 803. The gate stack 901 may include a gate dielectric layer and a gate electrode layer. The gate dielectric layer may be an oxide, a similar material, or some other material suitable for a gate dielectric layer. The gate electrode layer may be polycrystalline silicon, a similar material, or some other suitable material. These layers may be deposited by physical vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD), a similar process, or any other suitable process. Alternatively, the gate dielectric layer may be formed by oxidation. Optionally, the gate electrode layer is planarized. The planarization process may be chemical mechanical polishing (CMP) or a similar process.

[0104] like Figure 10 As shown in cross-sectional view 1000 of , a mask 1001 may be formed for patterning a plurality of transfer gates 175 and / or other gates from gate stack 901. After patterning, mask 1001 may be stripped.

[0105] like Figure 11 As shown in cross-sectional view 1100 of FIG, a plurality of spacers 1101 may be formed around transfer gate 175. Spacers 1101 may be formed by depositing a spacer material and then performing an anisotropic etch. The spacer material may include one or more layers of any suitable dielectric. The spacer material may be or include, for example, silicon nitride (SiN), silicon oxynitride (SiON), silicon dioxide (SiO2), a high-k dielectric, or the like. The spacer material may be deposited by ALD, CVD, PVD, a similar process, or any other suitable process.

[0106] like Figure 12 As shown in the cross-sectional view 1200 of FIG, dopants 1201 may be implanted to form a plurality of floating diffusion regions 173. A mask (not shown) may be formed as needed prior to dopant implantation. This dopant implantation process may also form other structures, such as source / drain regions for other transistors (not shown). The floating diffusion regions 173 may be aligned with the spacers 1101.

[0107] like Figure 13As shown in cross-sectional view 1300 of FIG, the process can continue by forming a metal interconnect structure 167 over the front side 165. In some embodiments, the metal interconnect structure 167 includes multiple metallization layers, each of which can be formed using a damascene process or a dual damascene process. The metal interconnect structure 167 includes a plurality of wires 131 and a plurality of vias 137 disposed in a matrix of an interlevel dielectric 133. The wires 131 and vias 137 can be or include copper (Cu), tungsten (W), ruthenium (Ru), palladium (Pd), platinum (Pt), cobalt (Co), nickel (Ni), zirconium (Zi), titanium (Ti), tantalum (Ta), aluminum (Al), conductive carbides, oxides, alloys of these metals, similar materials, or any other suitable conductive material. Wiring 131 and via 137 may also include a diffusion barrier layer, such as titanium (Ti), tantalum (Ta), titanium nitride (TiN), tantalum nitride (TaN), or similar materials. Metal interconnect structure 167 may further include a plurality of bonding pads 1301 and a plurality of contact plugs 1303. These structures may have one of the aforementioned compositions or different compositions. The conductive material may be deposited by electroplating, electroless plating, ALD, CVD, PVD, similar processes, or any other suitable process.

[0108] The inter-level dielectric 133 may include one or more layers of silicon dioxide (SiO2), a low-k dielectric, or an extremely low-k dielectric. A low-k dielectric has a dielectric constant smaller than that of silicon dioxide (SiO2). Silicon dioxide has a dielectric constant of approximately 3.9. Examples of low-k dielectrics include organosilicate glasses (OSG), such as carbon-doped silicon dioxide, fluorine-doped silicon dioxide (also known as fluorinated silica glass (FSG)), organic polymer low-k dielectrics, and porous silicate glasses. An extremely low-k dielectric is a material having a dielectric constant of approximately 2.1 or less. Extremely low-k dielectric materials are generally low-k dielectric materials with a porous structure. Porosity reduces the effective dielectric constant. The ILD 133 may be deposited by ALD, CVD, PVD, similar processes, or any other suitable process. The semiconductor body 185 and the metal interconnect structure 167 constitute the first chip 127 .

[0109] like Figure 14 As shown in cross-sectional view 1400 of FIG, first chip 127 can be flipped over and bonded to second chip 141, which can then be bonded to third chip 143. Second chip 141 includes a second semiconductor substrate 159 and a second metal interconnect structure 163. Third chip 143 includes a third semiconductor substrate 155 and a third metal interconnect structure 157. Second chip 141 can be bonded to third chip 143 before or after being bonded to first chip 127. Third chip 143 is optional. The bonding process can be oxide-on-oxide bonding, metallic bonding, a combination thereof, a similar bonding process, or any other suitable bonding process.

[0110] like Figure 15 As shown in cross-sectional view 1500 of FIG, after bonding, semiconductor body 185 may be thinned from back side 191. Thinning semiconductor body 185 allows light to more easily pass to photodiode 181. Thinning semiconductor body 185 may be performed by etching, mechanical milling, CMP, a similar process, or any other suitable process. In some embodiments, semiconductor body 185 is thinned to approximately 5 microns or less. In some embodiments, semiconductor body 185 is thinned to approximately 3 microns or less.

[0111] like Figure 16 As shown in cross-sectional view 1600 of FIG, a mask 1601 may be formed for etching a plurality of trenches 1603 in semiconductor body 185. Trenches 1603 form a grid having a plurality of segments between adjacent photodiodes 181. Trenches 1603 have inner sidewalls 1605 that define isolation structures. Trenches 1603 have a high aspect ratio. In some embodiments, trenches 1603 have an aspect ratio of 15:1 or greater. In some embodiments, trenches 1603 have an aspect ratio of 20:1 or greater. In some embodiments, trenches 1603 have an aspect ratio of 25:1 or greater.

[0112] Trench 1603 is formed by etching. In some embodiments, the etching is a multi-step etching process in which the trench is formed incrementally. Forming the increments may include etching to a first depth and then depositing a protective layer on the sidewalls 1605 of the trench. The protective layer may be, for example, an oxide or carbide. The next incremental etching will break through the protective layer at the bottom of the trench. The protective layer reduces lateral etching, widening the trench in the upper increment as the lower increment is formed.

[0113] In some embodiments, etching stops on the STI structure 171, which may have the same grid pattern as the trench 1603. In some other embodiments, etching stops on a contact etch stop layer (not shown) on the front side 165. In some other embodiments, etching stops on the wiring 131 or pads in the metal interconnect structure 167. These structures provide complete isolation between adjacent photodiodes 181. Alternatively, the trench 1603 stops before reaching the front side 165 and only provides partial isolation between adjacent photodiodes 181. In the process of this example, a backside DTI structure is formed. Alternatively, a frontside DTI structure can be formed.

[0114] Continuing with this example, you can Figure 17 As shown in cross-sectional view 1700 of FIG. 1 , trench 1603 is filled to provide DTI structure 183. In some embodiments, trench 1603 is filled with a dielectric. In other embodiments, trench 1603 is lined with a dielectric and then filled with a conductive material to provide a conductive core. The conductive core can be grounded or coupled to a bias voltage source.

[0115] DTI structure 183 may include one or more dielectric layers. When these layers are deposited in trenches 1603, they are also deposited on backside 191, where they form dielectric 113. Thus, the dielectric layers forming DTI structure 183 within trenches 1603 are continuous with the layers forming dielectric 113 on backside 191. Depending on the conditions of the deposition process used to form these layers, some of these layers may be thicker on backside 191.

[0116] In some embodiments, trench 1603 is lined with a high-k dielectric layer. The high-k dielectric passivates defects by forming an electric field that accumulates holes along sidewalls 1605, thereby passivating charge carriers (e.g., electrons). For example, the high-k dielectric layer can be or include materials such as hafnium oxide (HfO2), hafnium silicon oxide (HfSiO), hafnium silicon oxynitride (HfSiON), hafnium tantalum oxide (HfTaO), hafnium titanium oxide (HfTiO), hafnium zirconium oxide (HfZrO), hafnium oxide-aluminum oxide (HfO2-Al2O3), zirconium oxide (ZrO2), tantalum oxide (Ta2O5), aluminum oxide (Al2O3), yttrium oxide (Y2O3), lanthanum oxide (La2O3), strontium titanium oxide (SrTiO3), or the like, and can have a thickness in the range of 5 angstroms to 50 angstroms. The high-k dielectric layer may be deposited by ALD, CVD, PVD, similar processes, or any suitable process.

[0117] After lining, trench 1603 can be filled with an oxide such as silicon dioxide (SiO2) or tantalum pentoxide (Ta2O5). The filler can be deposited by ALD, CVD, PVD, a similar process, or any other suitable process. In some embodiments, dielectric 113 includes at least a layer composed of tantalum pentoxide or the like. Tantalum pentoxide has a refractive index between that of silicon (Si) and that of silicon dioxide. Thus, the tantalum pentoxide layer can reduce reflections. Optionally, dielectric 113 is planarized. Planarization can be performed by CMP, a similar process, or any other suitable process. Planarization provides a flush surface on which subsequent structures can be constructed.

[0118] like Figure 18 As shown in cross-sectional view 1800 of FIG, a composite grid stack 1801 is formed over dielectric 113. Composite grid stack 1801 includes at least metal layer 121 and anti-reflective coating 119. In some embodiments, composite grid stack 1801 includes dielectric layer 117. In some embodiments, composite grid stack 1801 includes a hard mask layer (not shown). The hard mask layer can be silicon nitride (SiN), a similar material, or any other suitable material. When a hard mask layer is included in composite grid stack 1801, it can be removed at a later processing stage.

[0119] The metal layer 121 can be formed by electroplating, electroless plating, ALD, CVD, PVD, a similar process, or any other suitable process. The anti-reflective coating 119 can be formed by ALD, CVD, PVD, a similar process, or any other suitable process. In some embodiments, the anti-reflective coating 119 is formed by ALD. ALD enables precise control of layer thickness, which can affect the effectiveness of the anti-reflective coating 119. The dielectric layer 117 can be formed by ALD, CVD, PVD, a similar process, or any other suitable process.

[0120] like Figure 19 As shown in cross-sectional view 1900 of FIG, a mask 1901 is formed for patterning composite grid stack 1801 to form composite grid 193 including a plurality of segments 104, a plurality of segments 107, and a plurality of metal half-shields 105. Mask 1901 can be a photoresist patterned by photolithography or electron beam lithography. Patterning using mask 1901 can include dry etching, such as plasma etching or similar etching methods. Etching process conditions can be varied as etching progresses through the various layers of composite grid stack 1801.

[0121] like Figure 20As shown in cross-sectional view 2000 of FIG, an encapsulation layer 115 may be formed on the composite grid 193. The encapsulation layer 115 may be a dielectric material such as silicon dioxide (SiO2) or a similar material. The encapsulation layer 115 may be formed by ALD, CVD, a similar process, or any other suitable process.

[0122] like Figure 21 As shown in cross-sectional view 2100 of FIG, a plurality of color filters 101 can be formed in the plurality of openings 1903 of the composite grid 193. The color filters 101 can include a red filter, a green filter, and a blue filter. Other color combinations, such as cyan, yellow, and magenta, can also be used. The color filters 101 can be in a Bayer pattern or some other pattern. The color filters 101 can include any suitable number of colors and can be in any suitable pattern.

[0123] The color filter 101 may include a polymer formed from a polymer resin containing a pigment or dye. The polymer may be, for example, polymethylmethacrylate (PMMA), poly(glycidyl methacrylate) (PGMS), or a similar material. In some embodiments, a polymer having a first color (e.g., red) is formed in the openings 1903 using a process such as spin coating. The first color polymer is then removed from some of the openings 1903 using a photolithographic mask and etching. Next, a polymer having a second color (e.g., blue) is applied using a similar process and used to fill the etched openings 1903. Another masking and etching process is performed, followed by the application / application of a third color (e.g., green). After forming the color filter 101, a planarization process may be performed to remove excess material. The planarization process may be CMP or a similar planarization process. If the composite grid 193 includes a hard mask, the hard mask may be removed using this CMP process.

[0124] A plurality of microlenses 109 may be formed on the color filter 101. The resulting structure may correspond to Figure 1The image sensor 100 is shown. The microlenses 109 can be any suitable material. For example, the microlenses 109 can be a highly transmissive acrylic polymer or similar material. The microlenses 109 can be formed by depositing and then shaping the microlens layer. In some embodiments, the microlens layer is applied in a fluid state by spin coating or a similar process. Spin coating can produce a highly uniform microlens layer. Alternatively, the microlens layer can be formed by a deposition technique such as CVD, PVD, or some other suitable process. The microlens layer can be patterned using photolithography. After patterning, the microlens layer can be reflowed to form the curved surface of the microlens 109. After reflowing, the microlens layer can be hardened. Hardening can be accomplished by ultraviolet (UV) treatment, the like, or some other suitable method.

[0125] Figures 22 to 24 A series of cross-sectional views 2200 to 2400 are provided which illustrate a variation of the process described above. This variation can be used to produce Figure 5 The image sensor 500 shown or the like is shown. The variation begins after patterning the composite grid 193, as shown in FIG. Figure 19 As shown in the cross-sectional view 1900.

[0126] like Figure 22 As shown in the cross-sectional view 2200 of FIG. 2 , instead of using color filters 101 to fill the openings 1903 in the composite grid ( Figure 21 Instead of filling opening 1903 with an additional dielectric 113, the additional dielectric 113 may be deposited by PVD, CVD, a similar process, or any other suitable process. The additional dielectric 113 may be the same as or different from the underlying dielectric 113. In some embodiments, the additional dielectric 113 is or includes silicon dioxide or a similar material.

[0127] The term "composite grid" is generally applied to the multiple material layers that form the grid around the color filter 101 (see Figure 21 In the present disclosure, the term “composite grid” is used because the metal layer 121 has a grid structure and the anti-reflective coating 119 has the same grid structure as the metal layer 121 and is formed on the same mask 1901 as the metal layer 121 (see Figure 19 Patterning the antireflective coating 119 under the same mask 1901 as the metal layer 121 confines the antireflective coating 119 to the same footprint, so the antireflective coating 119 does not extend into areas where the antireflective coating 119 would absorb radiation in a manner that could reduce quantum efficiency.

[0128] like Figure 23As shown in the cross-sectional view 2300 of FIG. 2 , the dielectric 113 may be planarized. The planarization process may include CMP or a similar planarization process. Planarization provides a flat surface on which the color filter 101 (see FIG. 2 ) may be formed. Figure 24 ).

[0129] like Figure 24 As shown in the cross-sectional view 2400, Figure 23 A plurality of color filters 101 are formed on the structure shown in the cross-sectional view 2300 of FIG. Figure 21 A plurality of micro lenses 109 may be formed to provide Figure 5 The image sensor 500 shown or the like.

[0130] Figure 25 A flow chart is provided for a process 2500 of forming an image sensing device according to some embodiments. Although process 2500 is illustrated and described below as a series of actions or events, it should be understood that the order in which such actions or events are illustrated should not be construed as limiting. For example, some actions may occur in a different order and / or concurrently with other actions or events than those illustrated and / or described herein. In addition, not all illustrated actions may be required to implement one or more aspects or embodiments described herein. Furthermore, one or more of the actions illustrated herein may be performed in one or more separate actions and / or stages.

[0131] The process 2500 may begin with act 2501 where dopants are implanted to form a plurality of photodiodes. Figure 6 An example is provided in cross-sectional view 600 of FIG. Forming the photodiode may include multiple dopant implants, some of which may be performed later in process 2500. Forming the photodiode may begin with a deep n-well implant, which uses high-energy dopant ions without a mask. Alternatively, process 2500 may begin by etching multiple trenches for the front-side DTI structure.

[0132] The process 2500 may continue with act 2503 where a plurality of STI structures are formed. Figure 7 An example is provided in cross-sectional view 700 of FIG. These STI structures can be used to position multiple trenches for a backside DTI structure. As previously described, the trenches for the backside DTI structure can alternatively be located on a contact etch stop layer or on wiring lines in a metallization layer. Furthermore, the trenches can simply stop short of reaching the front side, or a frontside DTI structure can be formed in place of a backside DTI structure. Therefore, action 2503 is optional.

[0133] At act 2505, a plurality of gate structures are formed on the front side. These gate structures may include transfer gates or similar structures. Figures 8 to 11 The cross-sectional views 800 to 1100 of FIG. 25 provide examples. Action 2507 is doping the source / drain regions. This doping can form multiple floating diffusion regions. Figure 12 An example is provided in the cross-sectional view 1200 .

[0134] Action 2509 is back-end-of-line (BEOL) processing, which forms metal interconnect structures on the front side. Figure 13 An example is provided in the cross-sectional view 1300 of FIG. Act 2511 is bonding to one or more second substrates. Figure 14 An example is provided by the cross-sectional view 1400 of FIG. 25. Action 2513 thins the semiconductor body from the back side. Figure 15 The cross-sectional view 1500 provides an example.

[0135] Act 2515 is etching a plurality of deep trenches in the backside. Figure 16 An example is provided in the cross-sectional view 1600 of FIG. Act 2517 is filling the trench to provide a DTI structure. Figure 17 An example is provided in cross-sectional view 1700 of FIG. The trench may be first lined with one or more layers of a high-k dielectric and then filled with another dielectric. Alternatively, the trench may be filled with a conductive material after being lined with a dielectric.

[0136] Act 2519 is forming a composite grid stack including an antireflective coating over the metal layer. Figure 18 An example is provided in cross-sectional view 1800 of FIG. In some embodiments, the anti-reflective coating directly contacts the metal layer. In some embodiments, the anti-reflective coating comprises a quarter-wave layer. In some embodiments, the anti-reflective coating comprises a plurality of quarter-wave layers.

[0137] Action 2521 is patterning the composite grid stack. Patterning the composite grid stack forms a grid consisting of multiple segments surrounding an opening. Some of the multiple segments are wider than others to provide a half-shield. The half-shield has approximately the width of the affected opening. Figure 19 An example is provided by cross-sectional view 1900 of . Act 2523 is an optional step of forming an encapsulation layer over the composite grid stack. Figure 20 The cross-sectional view 2000 provides an example.

[0138] Act 2525 is forming a plurality of color filters. In some embodiments, the color filters are formed within the openings in the composite grid such that the color filters flank the backside metal grid, the half-shield, and the layer comprising the anti-reflective coating. Figure 21An example is provided by the cross-sectional view 2100 of FIG. In some embodiments, the openings in the composite grid are filled with a dielectric before forming the color filter so that the color filter is located above the backside metal grid, the semi-shield, and the anti-reflective coating. Figures 22 to 24 Cross-sectional views 2200 to 2400 provide examples.

[0139] Action 2527 is to form a plurality of micro lenses on the color filter. Figure 1 、 Figure 3 、 Figure 4 and Figure 5 The illustrated image sensors 100, 300, 400, and 500 provide examples of resulting structures.

[0140] In one embodiment, an image sensor includes: a semiconductor substrate, a metal interconnect structure, a plurality of photodetectors, a plurality of microlenses, a plurality of metal half-shields, and a plurality of anti-reflective coatings. The semiconductor substrate has a first side and a second side, the second side being different from the first side. The metal interconnect structure includes a plurality of metallization layers above the first side. The plurality of photodetectors includes a plurality of photosensitive regions located in a first array within the semiconductor substrate. A plurality of microlenses are located in a second array above the second side, wherein the plurality of microlenses are positioned to focus incident radiation on corresponding photosensitive regions of the plurality of photosensitive regions located in the first array. A plurality of metal half-shields are located between a subset of the plurality of microlenses and the plurality of photosensitive regions corresponding thereto, wherein the plurality of metal half-shields are of a type capable of achieving semi-shielded phase detection autofocus. A plurality of anti-reflective coatings are located above the plurality of metal half-shields.

[0141] In one embodiment, the image sensor comprises the plurality of antireflective coatings and the plurality of metal half-shields having aligned sidewalls. In one embodiment, the image sensor further comprises a plurality of color filters, wherein the plurality of metal half-shields are provided by a composite grid separating the plurality of color filters. In one embodiment, the image sensor further comprises a plurality of color filters, wherein the plurality of metal half-shields and the plurality of antireflective coatings are located between the plurality of color filters and the semiconductor substrate. In one embodiment, the image sensor comprises four of the plurality of photosensitive regions corresponding to one of the plurality of microlenses. In one embodiment, the image sensor comprises two of the four photosensitive regions located in a plurality of image sensing pixels, and the other two of the four photosensitive regions located in a plurality of phase detection autofocus pixels. In one embodiment, the image sensor comprises the plurality of antireflective coatings directly contacting the plurality of metal half-shields. In one embodiment, the image sensor comprises the plurality of antireflective coatings having a thickness of one-quarter wavelength for wavelengths of visible light. In one embodiment, the image sensor comprises the plurality of antireflective coatings having a thickness of one-quarter wavelength for wavelengths of green light. In one embodiment, in the image sensor, the plurality of antireflective coatings comprises silicon oxynitride. In one embodiment, in the image sensor, the plurality of antireflective coatings comprises a metal compound. In one embodiment, in the image sensor, the plurality of antireflective coatings comprises a metal nitride. In one embodiment, in the image sensor, the plurality of antireflective coatings comprises a first layer having a thickness of one-quarter wavelength for a first wavelength of visible light and a second layer having a thickness of one-quarter wavelength for a second wavelength of visible light.

[0142] In one embodiment, an image sensor includes a semiconductor substrate, an array of a plurality of photodetectors, an array of a plurality of color filters, and a composite grid. The array of the plurality of photodetectors includes a plurality of photosensitive regions within the semiconductor substrate. The array of the plurality of color filters is positioned above the plurality of photosensitive regions. The composite grid includes a plurality of segments laterally separating the plurality of color filters, wherein the composite grid includes an antireflective coating positioned above a metal layer.

[0143] In one embodiment, in the image sensor, the antireflection coating has a thickness that enables the antireflection coating to effectively suppress reflections by destructive interference. In one embodiment, the image sensor further includes an array having a plurality of microlenses, wherein the array having the plurality of color filters is located between the plurality of microlenses and the plurality of photosensitive regions, and the composite grid provides semi-shielding for some of the plurality of microlenses. In one embodiment, the image sensor further includes an array having a plurality of microlenses, wherein the array having the plurality of color filters is located between the plurality of microlenses and the plurality of photosensitive regions, and there are four photodetectors for each microlens in the plurality of microlenses.

[0144] In one embodiment, a method of fabricating an image sensor includes providing a semiconductor substrate including a first side and a second side; forming an array having a plurality of photodiodes in the semiconductor substrate; forming a metal interconnect structure on the first side; bonding the semiconductor substrate to a second substrate; thinning the semiconductor substrate from the second side; forming a stack on the second side, wherein the stack includes a metal layer and an antireflective coating located above the metal layer; and patterning the stack to form a grid having a plurality of openings.

[0145] In one embodiment, in the method, some of the plurality of openings are smaller than other openings to provide a plurality of metal half-shields for phase detection autofocus. In one embodiment, in the method, the antireflection coating has a quarter wavelength thickness for wavelengths of light in the visible range.

[0146] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An image sensor, characterized in that: include: a semiconductor substrate having a first side and a second side, the second side being different from the first side; a metal interconnect structure comprising a plurality of metallization layers over the first side; a plurality of photodetectors comprising a plurality of photosensitive regions in a first array within the semiconductor substrate; a plurality of microlenses positioned in a second array over the second side, wherein the plurality of microlenses are positioned to focus incident radiation onto corresponding photosensitive regions of the plurality of photosensitive regions in the first array; a plurality of metal half-shields located between the subsets of the plurality of microlenses and the plurality of photosensitive regions corresponding thereto, wherein the plurality of metal half-shields are of a type capable of achieving semi-shielded phase detection autofocus; as well as A plurality of anti-reflection coatings are located on the plurality of metal half-shielding elements.

2. The image sensor according to claim 1, wherein The plurality of anti-reflective coatings and the plurality of metal half-shields have aligned sidewalls.

3. The image sensor according to claim 1, wherein Further included are a plurality of color filters, wherein the plurality of metal semi-shields are provided by a composite grid separating the plurality of color filters.

4. The image sensor according to claim 1, wherein The invention further comprises a plurality of color filters, wherein the plurality of metal semi-shielding elements and the plurality of anti-reflection coatings are located between the plurality of color filters and the semiconductor substrate.

5. The image sensor according to claim 1, wherein Four of the plurality of photosensitive areas correspond to one microlens among the plurality of microlenses.

6. The image sensor according to claim 5, wherein: Two of the four photosensitive regions are located in a plurality of image sensing pixels, and the other two of the four photosensitive regions are located in a plurality of phase detection autofocus pixels.

7. The image sensor according to claim 1, wherein The plurality of anti-reflection coatings are in direct contact with the plurality of metal half-shields.

8. The image sensor according to claim 1, wherein The plurality of antireflection coatings include a first layer having a thickness of a quarter wavelength for a first wavelength of visible light and a second layer having a thickness of a quarter wavelength for a second wavelength of visible light.

9. An image sensor, characterized in that: include: semiconductor substrates; an array having a plurality of photodetectors, including a plurality of photosensitive regions within the semiconductor substrate; an array of a plurality of color filters disposed over the plurality of photosensitive regions; and A composite grid includes a plurality of segments laterally separating the plurality of color filters, wherein the composite grid includes an antireflective coating located above the metal layer.

10. The image sensor according to claim 9, wherein: The anti-reflective coating has a thickness that enables the anti-reflective coating to effectively suppress reflection by destructive interference.

Images