Power supply circuit, control system, electronic device and vehicle

Abstract

The utility model provides a power supply circuit, a control system, an electronic device and a vehicle, and relates to the technical field of power supply safety. The development cost of the power supply design under the sensing processing ASIL decomposition architecture of an intelligent driving domain controller system or a vehicle-mounted sensor can be reduced. Comprising a power supply module, an analog input monitoring circuit, a digital input monitoring circuit and a first chip. The power supply module comprises a voltage signal output end and a fault indication signal output end; the input end of the analog input monitoring circuit is connected to the voltage signal output end of the power supply module, and the output end of the analog input monitoring circuit is connected to the first input pin of the first chip; the input end of the digital input monitoring circuit is connected to the fault indication signal output end of the power supply module, and the output end of the digital input monitoring circuit is connected to the second input pin of the first chip; the function security level of the first chip is higher than that of the power supply module. The utility model is suitable for power supply design scenes.

Description

Technical Field

[0001] The utility model relates to the technical field of power supply safety, and in particular to a power supply circuit, a control system, an electronic device and a vehicle. Background Art

[0002] With the development of science and technology, intelligent driving technology is becoming increasingly mature, bringing great convenience to users' safe driving. In the design of intelligent driving domain controller systems or on-board sensors for L3 and above autonomous driving levels, functional safety must achieve the safety integrity level of ASIL D (Automotive Safety Integration Level).

[0003] At present, in the design of SOC power supply architecture under the ASIL decomposition architecture of L3 intelligent driving domain controller perception processing, one approach is as follows Figure 1 As shown in the figure, ASIL B power supply modules are used to meet the diverse SOC power supply designs. However, due to the need to consider the diversity of power chip modules, the power supply architecture needs to be composed of power chips of different types, specifications, and suppliers. This way, the power supply architecture has a wide variety of materials and the cost is increased accordingly. Another method, such as Figure 2 As shown in the figure, the SOC power supply design is implemented using an ASIL D power supply module to ensure the ASIL D level of the power supply module. All power chips with an ASIL D integrity level are used to implement the SOC power supply design. However, the use of high ASIL level power chips will also result in excessively high device costs. Utility Model Content

[0004] In view of this, the present invention provides a power supply circuit, a control system, an electronic device, and a vehicle, which can improve the functional safety level of the power supply module in the power supply design under the ASIL decomposition architecture of the intelligent driving domain controller system or the on-board sensor perception processing, while reducing the development cost of the power supply design.

[0005] In the first aspect, the utility model provides a power supply circuit, comprising: a power supply module, an analog input monitoring circuit, a digital input monitoring circuit and a first chip; the power supply module comprises a voltage signal output end and a fault indication signal output end; the input end of the analog input monitoring circuit is connected to the voltage signal output end of the power supply module, and the output end of the analog input monitoring circuit is connected to the first input pin of the first chip; the input end of the digital input monitoring circuit is connected to the fault indication signal output end of the power supply module, and the output end of the digital input monitoring circuit is connected to the second input pin of the first chip; the functional safety level of the first chip is higher than the functional safety level of the power supply module.

[0006] Optionally, the analog input monitoring circuit includes: a first resistor, a second resistor, a third resistor and a first capacitor; the input end of the first resistor is connected to the voltage signal output end of the power supply module, the output end of the first resistor is respectively connected to the input end of the second resistor and the input end of the third resistor, the output end of the third resistor is connected to the input end of the first capacitor, the output end of the first capacitor is grounded, and the output end of the second resistor is grounded; the analog input monitoring circuit also includes an analog-to-digital converter module placed in the first chip; the output end of the third resistor is also connected to the input end of the analog-to-digital converter module.

[0007] Optionally, the digital input monitoring circuit includes: a pull-up resistor and a second capacitor, the input end of the pull-up resistor is connected to the power supply end of the first chip, the output end is connected to the fault indication signal output end of the power supply module and the second capacitor, and the output end of the second capacitor is grounded.

[0008] Optionally, the power supply module includes: a primary power supply module and a secondary power supply module, and the primary power supply module and the secondary power supply module include ASIL B level power supply chips.

[0009] Optionally, it also includes: a second chip, the second chip is connected to the voltage signal output end of the power supply module, the first chip and the second chip include: at least one of: an SOC chip, an MCU chip and an ASIC chip, and the functional safety level of the first chip is higher than that of the second chip.

[0010] Optionally, the functional safety level of the analog input monitoring circuit and the digital input monitoring circuit is ASILB level.

[0011] In a second aspect, the present invention further provides a control system, comprising: any power supply circuit described in the first aspect.

[0012] In a third aspect, the present invention further provides an electronic device comprising a power supply circuit as described in any one of the first aspects.

[0013] In a fourth aspect, the present invention further provides a vehicle, comprising the control system described in the second aspect.

[0014] The utility model provides a power supply circuit, a control system, an electronic device and a vehicle. The power supply module is monitored for fault redundancy by respectively deploying an analog input monitoring circuit and a digital input monitoring circuit at the voltage signal output end and the fault indication signal output end of the power supply module. At the same time, the monitoring results of the analog input monitoring circuit and the digital input monitoring circuit are processed by a first chip having a higher functional safety level than the power supply module. This can improve the functional safety level of the power supply module in the power supply design under the ASIL decomposition architecture of the intelligent driving domain controller system or the on-board sensor perception processing, while reducing the development cost of the power supply design. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0016] Figure 1 This is a design diagram for SOC power supply that uses ASIL B power supply modules in existing technologies and meets diverse requirements.

[0017] Figure 2 Design of SOC power supply using ASIL D power supply module in existing technology;

[0018] Figure 3 A schematic diagram of the power supply circuit structure provided in one embodiment of the present utility model;

[0019] Figure 4 A circuit design diagram of a power supply circuit provided in one embodiment of the present utility model applied to a single sensor;

[0020] Figure 5 This is a circuit design diagram of a power supply circuit provided in one embodiment of the present invention applied to a domain controller system. DETAILED DESCRIPTION

[0021] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0022] It should be understood that the embodiments described are only a portion of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative work are within the scope of protection of the present invention.

[0023] ASIL (Automotive Safety Integration Level) stands for Automotive Safety Integrity Level. It is a risk classification system for the functional safety of road vehicles defined by ISO 26262 (ISO 26262 is the international standard for functional safety in the automotive industry).

[0024] In the design of intelligent driving domain controller systems or on-board sensors for L3 and above autonomous driving levels, functional safety needs to achieve the safety integrity level of ASIL D. In order to achieve the ASIL D level in perception function, based on the current state of industry technology, an ASIL decomposition strategy is usually required and the independence after decomposition is guaranteed. Ideally, a variety of perception function links should be adopted, such as decomposition into ASIL B(D) visual links and ASIL B(D) radar links. In terms of perception computing processing in different links, a variety of ASIL B-level SOC (System on Chip) and its peripheral power supply designs should be adopted, such as Figure 1 As shown, this approach needs to take into account the diversity of power chip modules. The power supply architecture needs to be composed of power chips of different types, specifications, and suppliers. This way, the power supply architecture has a wide variety of materials, and the system complexity and SOC chip development investment are relatively high.

[0025] Another approach is to use two homogeneous ASIL B-level SOCs to implement redundant sensing function links. In this case, the peripheral power supply design of the two SOCs usually uses the same power architecture and power chip solution. To ensure ASIL D independence of power supply, both SOCs need to use power chips with ASIL D integrity level to design the SOC peripheral power supply, such as Figure 2 As shown in the figure, the advantages of this power supply design are high reusability, low complexity, and high reliability, but the use of high-ASIL-level power supply chips will also result in excessively high device costs. In summary, in existing intelligent driving domain controller systems or on-board sensor designs for L3 and above autonomous driving levels, the physical and development costs of the SOC power supply design under the ASIL decomposition architecture of the L3 intelligent driving domain controller system or on-board sensor perception processing are too high. Moreover, in power supply designs that need to meet the functional safety integrity and independence requirements of ASIL D, only using ASIL B-level power supply chips / modules cannot achieve the functional safety integrity and independence requirements of ASIL D.

[0026] Therefore, the present invention provides a power supply circuit that can improve the functional safety level of the power supply module while reducing the development cost of power supply design within the ASIL decomposition architecture of intelligent driving domain controllers or on-board sensor perception processing, and can meet ASIL D functional safety integrity and independence. The present invention can be applied to intelligent driving domain controller systems or individual on-board sensors, such as a single radar sensor or camera sensor. Radars can include lidar or millimeter-wave radars.

[0027] See Figure 3 As shown, the power supply circuit provided by the present invention includes: a power supply module 1, an analog input monitoring circuit 2, a digital input monitoring circuit 3 and a first chip 4; the power supply module 1 includes a voltage signal output end and a fault indication signal output end; the input end of the analog input monitoring circuit 2 is connected to the voltage signal output end of the power supply module 1, and the output end of the analog input monitoring circuit 2 is connected to the first input pin of the first chip 4; the input end of the digital input monitoring circuit 3 is connected to the fault indication signal output end of the power supply module 1, and the output end of the digital input monitoring circuit 3 is connected to the second input pin of the first chip 4; the functional safety level of the first chip 4 is higher than the functional safety level of the power supply module 1.

[0028] Figure 4 The power supply circuit provided in one embodiment of the present invention is applied to a circuit design diagram of a single sensor, see Figure 4 As shown, taking the radar sensor as an example, the power supply circuit provided in this embodiment adopts a power supply chip with ASIL B functional safety level as the power supply module 1. Fault redundant monitoring is achieved by deploying two completely independent monitoring circuits that meet ASIL B functional safety level (monitoring path 1: analog input monitoring circuit 2 and monitoring path 2: digital input monitoring circuit 3) on the power supply chip with ASIL B functional safety level. At the same time, an MCU microcontroller with ASIL D functional safety level (an MCU microcontroller that meets this requirement is usually deployed in the ASIL D intelligent driving domain controller) is used as the first chip 4 to process the output results of the two monitoring circuits. When one of the monitoring circuits fails, the other monitoring circuit can still continue to perform monitoring activities, so that the ASIL level of the SOC power supply is improved from ASIL B to ASIL D, reducing the development cost of the SOC power supply design under the ASIL decomposition architecture of the intelligent driving domain controller system or the on-board sensor perception processing, and applying it to the ASIL D safety scenario.

[0029] In some embodiments, see Figure 4As shown, the analog input monitoring circuit 2 includes: a first resistor R1, a second resistor R2, a third resistor R3 and a first capacitor C1; the input end of the first resistor R1 is connected to the voltage signal output end of the power supply module 1, the output end of the first resistor R1 is connected to the input end of the second resistor R2 and the input end of the third resistor R3 respectively, the output end of the third resistor R3 is connected to the input end of the first capacitor C1, the output end of the first capacitor C1 is grounded, and the output end of the second resistor R2 is grounded; the analog input monitoring circuit also includes an analog-to-digital converter module (ADC) disposed in the first chip; the output end of the third resistor R3 is also connected to the input end of the analog-to-digital converter module.

[0030] In this embodiment, the output voltage signal of the power supply module 1 is collected through the first monitoring path, namely the analog input monitoring circuit 2. The output voltage first passes through a voltage divider bridge composed of a first resistor R1 and a second resistor R2 to obtain a divided output voltage signal; then, the output voltage is filtered through an RC filter circuit composed of a third resistor R3 and a first capacitor C1. The output voltage signal after filtering becomes smoother and more stable, reducing the influence of high-frequency noise and interference. Subsequently, the filtered output voltage signal is transmitted to the interface (ADC interface, Analog-to-Digital Converter) of the analog-to-digital converter module of the first chip 4 with an ASIL D functional safety level. The analog output voltage signal is converted into binary form, and the AD value of the output voltage signal is compared with the range of an expected reasonable signal to monitor whether the output voltage signal of the power supply module 1 exceeds a preset voltage threshold, and output a monitoring result. If it exceeds the range of an expected reasonable signal, it is determined that the output voltage of the power supply module 1 has failed.

[0031] In some embodiments, see Figure 4 As shown, the digital input monitoring circuit 3 includes a pull-up resistor R4 and a second capacitor C2. The input end of the pull-up resistor R4 is connected to the power supply terminal of the first chip, and the output end is connected to the fault indication signal output terminal of the power supply module 1 and the second capacitor C2. The output end of the second capacitor C2 is grounded. In some embodiments, the functional safety level of the analog input monitoring circuit and the digital input monitoring circuit is ASIL B.

[0032] The power supply chip with ASIL B functional safety level has an independent safety domain inside, an internally implemented safety monitoring mechanism, an internal operation monitoring state machine, and real-time monitoring of the chip's operating status to monitor its output voltage failure. If such a failure occurs, the chip will output its fault pin (for example Figure 3The ErrorPin in the chip is pulled down from a high level state to a low level state, indicating that a fault has occurred inside the chip, thereby ensuring the safe and stable operation of the chip.

[0033] This embodiment utilizes the characteristics of the above-mentioned safety monitoring mechanism and adopts a digital input monitoring circuit 3 that meets the requirements of the ASIL B functional safety level as the second monitoring path to collect the "fault indication logic level signal" output by the fault indication signal output terminal (ErrorPin) of the power supply module. The signal is first pulled up by the pull-up resistor R4 to ensure that it is a high level in the normal state. At the same time, the filter capacitor C2 improves the signal's anti-interference ability. Finally, the collected signal is transmitted to the GPIO (General Purpose Input Output) input interface of the first chip (MCU chip) 4. The MCU (Micro Controller Unit) internally recognizes the collected signal and outputs the monitoring result. When the collected signal is at a low level, it is determined that the power supply chip has failed.

[0034] In some embodiments, the first chip 4 is specifically configured to receive the output voltage signal transmitted by the analog input monitoring circuit 2 and the fault indication logic level signal transmitted by the digital input monitoring circuit 3, and compare and process the output voltage signal and the fault indication logic level signal to determine whether the power supply module is faulty.

[0035] In this embodiment, after the first chip (MCU chip) 4 with an ASIL D functional safety level receives the monitoring results of the two monitoring paths, the internal software comparison logic of the first chip (MCU chip) 4 further integrates the results of the two monitoring paths, and forms a comprehensive judgment fault information according to Table 1 below, and sends it to the software fault handling task for subsequent processing.

[0036] Table 1 Decision logic of comprehensive fault information

[0037]

[0038] Among them, 0 represents no fault; 1 represents fault.

[0039] Specifically, after the output voltage signal output by the analog input monitoring circuit 2 with an ASIL B functional safety level is transmitted to the ADC interface of the first chip (MCU chip) 4 with an ASIL D functional safety level, the first chip 4 converts the output voltage signal output by the analog input monitoring circuit 2 into binary form through the ADC module, and compares the AD value of the voltage signal with the range of expected reasonable signals to monitor whether the output voltage signal exceeds a preset voltage threshold. At the same time, the monitoring result of the analog input monitoring circuit 2, such as result A, is output. After the fault indication logic level signal output by the digital input monitoring circuit 3 with an ASIL B functional safety level is output to the GPIO input interface of the first chip 4 with an ASIL D functional safety level, the first chip 4 internally identifies the input fault indication logic level signal and outputs the monitoring result of the digital input monitoring circuit 2, such as result B, based on the fault indication logic level signal. Subsequently, the software comparison logic within the first chip (MCU chip) 4 further integrates the monitoring results of the two monitoring circuits, generates fault information according to the judgment logic in Table 1, and sends the fault information to the software fault handling task for subsequent processing. Among them, for the analog input monitoring circuit 2, if the output voltage signal exceeds the range of the expected reasonable signal, the output voltage of the power supply chip / module is determined to be faulty; for the fault indication logic level signal output by the digital input monitoring circuit 3, when the fault indication logic level signal is identified as low by the first chip 4, the power supply chip is determined to be faulty. In this way, if one of the monitoring circuits fails, the other monitoring circuit can still continue to perform monitoring activities, thereby raising the ASIL level of the SOC power supply under the ASIL decomposition architecture in the L3 intelligent driving domain controller system or on-board sensor from ASIL B to ASIL D. In addition, through the above-mentioned monitoring redundancy solution, the diagnostic coverage of latent faults in the internal safety mechanism circuit of the ASIL B power supply chip can be improved, effectively improving the reliability of the system.

[0040] It should be noted that in order to ensure that the overall monitoring redundancy can reach the ASIL D level, both monitoring circuits must meet the functional safety integrity level requirements of ASIL B, and use analog and digital acquisition methods respectively to ensure mutual independence.

[0041] In some embodiments, the power supply module 1 includes: a primary power supply module and a secondary power supply module, and the primary power supply module and the secondary power supply module include ASIL B level power supply chips.

[0042] Under the usual architecture, the power supply voltage of the external power supply module of the intelligent driving domain control system or the vehicle-mounted sensor is too high. Therefore, this embodiment constructs a multi-level power supply module, such as a primary power supply module, a secondary power supply module, etc. to perform step-by-step voltage reduction. In this embodiment, see Figure 4As shown, the power supply module includes a primary power supply module and a secondary power supply module, which are stepped down step by step through multi-stage power supply modules. All power supply modules are power supply chips with an ASIL B functional safety level and an internal safety mechanism. In this embodiment, two monitoring circuits with an ASIL B functional safety level are deployed on the power supply chip to achieve fault redundancy monitoring, thereby upgrading the power supply chip originally with an ASIL B functional safety level to an ASIL D functional safety level. That is, in the ASIL-aware decomposition architecture, the use of diversified power supply chips / modules is eliminated, and the direct use of ASIL D power supply chips / modules is eliminated, thereby reducing the types of chip materials in the SOC power supply design and reducing the cost per chip. It should be noted that this embodiment only provides a detailed description of one power supply module in the multi-stage power supply module, and the remaining power supply modules are also connected to the two monitoring circuits in this embodiment, which will not be repeated here.

[0043] In some embodiments, it also includes: a second chip 5, the second chip 5 is connected to the voltage signal output end of the power supply module 1, the first chip 4 and the second chip 5 include: at least one of a SOC chip, an MCU chip and an ASIC chip, and the functional safety level of the first chip 4 is higher than that of the second chip 5.

[0044] In this embodiment, the first chip 4 is an MCU chip with an ASIL D functional safety level, and the second chip 5 is an SOC chip with an ASIL B functional safety level. The second chip 5 is connected to the voltage signal output end of the power supply module 1 and serves as the power supply object of the power supply module 1. The second chip 5 is used to process the data required for intelligent driving. Therefore, the second chip 5 in this embodiment adopts an SOC chip with high computing power.

[0045] The Automotive Safety Integrity Level (ASIL) measures the risk of specific system components. The more complex the system, the greater the risk of systematic and random hardware failures. The ASIL scale has four values, A to D, with ASIL A being the lowest risk level and ASIL D being the highest. In addition, a fifth option, QM (Quality Management), is included when determining the ASIL. This indicates that there are no safety requirements for a component, but compliance is generally recommended to improve product quality.

[0046] Example 2

[0047] The present invention also provides a control system that can be applied to an intelligent driving domain controller, a single vehicle-mounted sensor, or other devices. Figure 5As shown, a control system is applied to an intelligent driving domain controller, including: a visual perception processing subsystem and a lidar perception processing subsystem. The visual perception processing subsystem and the lidar perception processing subsystem include the power supply circuit described in Example 1, which will not be repeated here.

[0048] Specifically, an MCU (Micro Controller Unit) is a microcontroller, a small chip that can implement specific control functions but does not have high computing power or high compatibility; whereas an SoC (System on Chip) is a computing platform that integrates multiple system components. It can handle complex computing tasks and has the characteristics of high computing power, high compatibility, and openness. Therefore, the intelligent driving domain controller system provided by the embodiment of the present invention is completed in the form of a combination of two SOC chips and an MCU chip. Figure 5 As shown in the figure, the SOC chip of the visual perception processing subsystem and the SOC chip of the lidar perception processing subsystem and the MCU chip. Taking the lidar perception processing subsystem as an example, the SOC chip of the lidar perception processing subsystem has perception algorithms, such as lidar sensing algorithms and intelligent driving perception algorithms. The SOC chip generates target data or obstacle target data based on these algorithms and transmits this target data to the MCU. The MCU performs planning and control based on the target data. Similarly, the visual perception processing subsystem is the same as the lidar perception processing subsystem and will not be repeated here.

[0049] Example 3

[0050] The present invention further provides an electronic device according to an embodiment, comprising the power supply circuit described in embodiment 1. The specific implementation is the same as that of embodiment 1 and will not be described again here.

[0051] Example 4

[0052] The present invention further provides a vehicle in accordance with an embodiment, including the control system described in embodiment 2. The specific implementation is the same as that of embodiment 2 and will not be described in detail here.

[0053] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply the existence of any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element.

[0054] Each embodiment in this specification is described in a related manner. The same or similar parts between the embodiments can be referred to each other. Each embodiment focuses on the differences from other embodiments.

[0055] For the convenience of description, when referring to a system, server, etc., it may be described separately by function as various units / modules. Of course, when implementing the present invention, the functions of each unit / module can be implemented in the same or multiple software and / or hardware.

[0056] Those skilled in the art will appreciate that all or part of the processes in the above-described method embodiments can be implemented by instructing the relevant hardware through a computer program. The program can be stored in a computer-readable storage medium, and when executed, the program can include the processes in the above-described method embodiments. The storage medium can be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (RAM).

[0057] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A power supply circuit, characterized in that: include: A power supply module, an analog input monitoring circuit, a digital input monitoring circuit and a first chip; The power supply module includes a voltage signal output terminal and a fault indication signal output terminal; The input end of the analog input monitoring circuit is connected to the voltage signal output end of the power supply module, and the output end of the analog input monitoring circuit is connected to the first input pin of the first chip; The input end of the digital input monitoring circuit is connected to the fault indication signal output end of the power supply module, and the output end of the digital input monitoring circuit is connected to the second input pin of the first chip; The functional safety level of the first chip is higher than the functional safety level of the power supply module.

2. The power supply circuit according to claim 1, wherein: The analog input monitoring circuit includes: a first resistor, a second resistor, a third resistor and a first capacitor; the input end of the first resistor is connected to the voltage signal output end of the power supply module, the output end of the first resistor is connected to the input end of the second resistor and the input end of the third resistor respectively, the output end of the third resistor is connected to the input end of the first capacitor, the output end of the first capacitor is grounded, and the output end of the second resistor is grounded; The analog input monitoring circuit further includes an analog-to-digital converter module disposed on the first chip; the output end of the third resistor is also connected to the input end of the analog-to-digital converter module.

3. The power supply circuit according to claim 1, wherein: The digital input monitoring circuit includes: a pull-up resistor and a second capacitor, the input end of the pull-up resistor is connected to the power supply end of the first chip, the output end is connected to the fault indication signal output end of the power supply module and the second capacitor, and the output end of the second capacitor is grounded.

4. The power supply circuit according to claim 1, wherein: The power supply module includes: a primary power supply module and a secondary power supply module, and the primary power supply module and the secondary power supply module include ASIL B level power supply chips.

5. The power supply circuit according to claim 1, wherein: Also includes: The second chip is connected to the voltage signal output end of the power supply module, the first chip and the second chip include: at least one of a SOC chip, an MCU chip and an ASIC chip, and the functional safety level of the first chip is higher than that of the second chip.

6. The power supply circuit according to claim 1, wherein: The functional safety level of the analog input monitoring circuit and the digital input monitoring circuit is ASIL B.

7. A control system, characterized in that: include: The power supply circuit according to claims 1 to 6.

8. An electronic device, characterized in that: The invention comprises the power supply circuit according to claims 1 to 6.

9. A vehicle, characterized in that: Comprising the control system of claim 7.

Images