Probe card for high-simultaneous-test disposable test wafer

Abstract

The utility model discloses a probe card used for a one-time test wafer of a high simultaneous test, which belongs to the technical field of probe cards and comprises a circuit board provided with an installation area extending in the length direction. The plurality of probes are respectively arranged in the mounting area and are respectively and electrically connected with the circuit board; the plurality of probes are arranged at intervals in the length direction, and the projections of any two adjacent probes in the length direction are mutually spaced. According to the probe card designed by the utility model, the distance between the adjacent probes is increased, mutual contact and even interference between the adjacent probes are avoided, and smooth installation of the probes is ensured, so that high-density arrangement of the probes is realized, the number of times of testing wafers is reduced, and the testing efficiency of the wafers is improved.

Description

Technical Field

[0001] The utility model belongs to the technical field of probe cards, and in particular relates to a probe card for high-precision one-time test wafers. Background Art

[0002] In the field of semiconductor testing, probe cards are used to perform electrical performance tests on unpackaged chips during wafer manufacturing. However, one of the main challenges facing conventional probe card design is how to achieve a high-density probe combination to support a greater number of test points, thereby reducing the number of wafer tests and improving wafer testing efficiency. Utility Model Content

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, one purpose of the present invention is to provide a probe card for high-simultaneity testing of disposable wafers. The probe card designed according to the present invention for high-simultaneity testing of disposable wafers increases the distance between adjacent probes, avoids contact or even interference between adjacent probes, ensures smooth installation of the probes, and thus achieves high-density probe placement, thereby reducing the number of wafer tests and improving wafer testing efficiency.

[0004] In order to achieve the above-mentioned purpose, the present invention provides the following technical solutions:

[0005] The utility model provides a probe card for high-speed simultaneous testing of disposable test wafers, comprising: a circuit board, wherein the circuit board is provided with a mounting area extending in the length direction; a plurality of probes, wherein the plurality of probes are respectively arranged in the mounting area, and the plurality of probes are respectively electrically connected to the circuit board; wherein the plurality of probes are arranged at intervals in the length direction, and the projections of any two adjacent probes in the length direction are spaced apart from each other.

[0006] According to the probe card for high-density disposable test wafers of the present invention, by arranging multiple probes at intervals along the length direction, and the projections of any two adjacent probes in the length direction are spaced apart from each other, the distance between adjacent probes is increased, and contact or even interference between adjacent probes is avoided, thereby ensuring the smooth installation of the probes, thereby achieving high-density arrangement of probes, and further reducing the number of tests on the wafer, improving the test efficiency of the wafer, and making the installation of the probes more convenient. At the same time, the above-mentioned arrangement can also reduce interference between probes, improve the purity of the test signal, and thus improve the accuracy of the test results.

[0007] Furthermore, the plurality of probes include: a plurality of first probes, which are spaced apart in the length direction; and a plurality of second probes, which are spaced apart in the length direction; wherein projections of the first probes and the second probes in the length direction are spaced apart from each other.

[0008] Furthermore, a plurality of mounting areas are provided on the circuit board, and the plurality of mounting areas are spaced apart in the length direction and / or the width direction.

[0009] Furthermore, the first probe includes: a first fixing part, one end of which is connected to the circuit board and electrically connected; a first connecting part, one end of which is connected to the other end of the first fixing part, and an extension direction of the first connecting part is at an angle to a height direction; and a first detecting part, the first detecting part is connected to the other end of the first connecting part, and an extension direction of the first detecting part is parallel to an extension direction of the first fixing part.

[0010] Furthermore, the angle α between the first connecting portion and the height direction satisfies: 5°≤α≤25°.

[0011] Furthermore, it also includes: a connecting socket, which is connected to the circuit board and is suitable for connecting the circuit board to a test device.

[0012] Furthermore, it also includes: a first connecting plate, the first connecting plate is connected to the connecting seat; a second connecting plate, the second connecting plate is connected to the circuit board, and the first connecting plate and the second connecting plate are detachably connected.

[0013] Furthermore, it also includes: a ceramic connecting plate, which is arranged between the second connecting plate and the circuit board, and is suitable for connecting the second connecting plate and the circuit board.

[0014] Other advantages, objectives, and features of the present invention will be described in the following description and will be apparent to those skilled in the art to some extent, or they may be taught by those skilled in the art from the practice of the present invention. The objectives and other advantages of the present invention may be realized and obtained through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to make the purpose, technical solution and beneficial effects of the present invention clearer, the present invention is described with the following drawings:

[0016] Figure 1 is a schematic diagram of a probe card of the present invention;

[0017] Figure 2 This is a schematic diagram of the connection between the circuit board and the probe of the present utility model;

[0018] Figure 3 This is a distribution diagram of the probes in the installation area of ​​the utility model.

[0019] The following are marked in the accompanying drawings:

[0020] 1. Probe card;

[0021] 10. Circuit board; 11. Installation area;

[0022] 20. Probe; 21. First probe; 22. Second probe;

[0023] 30. Connecting seat; 31. Base plate; 32. Support block;

[0024] 41. First connecting plate; 42. Second connecting plate;

[0025] 50. Ceramic connecting plate. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with embodiments and drawings. The schematic implementation methods of the present invention and their descriptions are only used to explain the present invention and are not intended to limit the present invention.

[0027] In the following description, numerous specific details are set forth to provide a thorough understanding of the present invention. However, it will be apparent to one skilled in the art that these specific details are not necessarily required to practice the present invention. In other instances, well-known structures, circuits, materials, or methods are not described in detail to avoid obscuring the present invention.

[0028] Throughout this specification, references to "one embodiment," "an embodiment," "an example," or "an example" mean that a particular feature, structure, or characteristic described in conjunction with the embodiment or example is included in at least one embodiment of the present invention. Therefore, the phrases "one embodiment," "an embodiment," "an example," or "an example" appearing in various places throughout this specification do not necessarily refer to the same embodiment or example. In addition, the particular features, structures, or characteristics may be combined in one or more embodiments or examples in any suitable combination and / or subcombination. Furthermore, it will be understood by those of ordinary skill in the art that the figures provided herein are for illustrative purposes only and are not necessarily drawn to scale. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0029] In the description of the present invention, it should be understood that the terms "front", "rear", "left", "right", "up", "down", "vertical", "horizontal", "high", "low", "inside", "outside", etc., indicating directions or positional relationships, are based on the directions or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction. Therefore, they cannot be understood as limiting the scope of protection of the present invention.

[0030] Example 1:

[0031] like Figure 1-Figure 3 As shown, the utility model provides a probe card 1 for high-speed simultaneous testing of disposable test wafers, comprising: a circuit board 10 and a plurality of probes 20, the circuit board 10 is provided with a mounting area 11 extending in the length direction, the plurality of probes 20 are respectively arranged in the mounting area 11, and the plurality of probes 20 are respectively electrically connected to the circuit board 10; wherein the plurality of probes 20 are arranged at intervals in the length direction, and the projections of any two adjacent probes 20 in the length direction are spaced apart from each other.

[0032] In some embodiments, the wafer is provided with a detection area, which extends in the length direction, that is, the extension direction of the detection area is parallel to the extension direction of the installation area 11. Multiple chips are arranged in the detection area, and the multiple chips are spaced apart in the length direction, and the multiple chips extend in the width direction.

[0033] In the probe card 1 of the present application, a circuit board 10 is provided with a mounting area 11, and a plurality of probes 20 are provided within the mounting area 11. The plurality of probes 20 are spaced apart in the longitudinal direction, and the projections of any two adjacent probes 20 in the longitudinal direction are spaced apart from each other. Thus, when the probe card 1 of the present application is used to test a wafer, the plurality of probes 20 correspond to the plurality of chips on the wafer, and when the plurality of probes 20 contact the plurality of wafers, one end of an adjacent chip in the width direction contacts the corresponding probe 20, and the other end of another adjacent chip in the width direction contacts the corresponding probe 20.

[0034] It can be understood that the circuit board 10 is a platform for carrying circuit elements and connecting wires. The circuit board 10 provides a basic structure for installing the probe 20 and has an installation area 11 extending in the length direction. The circuit board 10 not only provides an installation position for the probe 20, but is also responsible for transmitting the signal collected by the probe 20 to the external testing equipment. The setting of the installation area 11 is to ensure that the probe 20 can be installed on the circuit board 10 in a predetermined manner so as to achieve specific testing requirements. The design of the installation area 11 helps to accurately position the probe 20 and ensure accurate contact between the probe 20 and the wafer test point. The probe 20 is a metal needle-like structure used to contact the wafer surface and is suitable for collecting signals. The probe 20 is used to obtain the electrical signal of the chip during the wafer testing process to evaluate the performance of the wafer.

[0035] It should be noted that, through the layout of the above-mentioned probes 20, the present application achieves an increase in the distance between any two adjacent probes 20, thereby facilitating the installation of the probes 20, and the increased distance between the probes 20 makes the probes 20 easier to replace and maintain, thereby reducing the maintenance cost of the probe card 1. At the same time, the increased distance between the probes 20 reduces the interference between the probes 20, improves the purity of the test signal, and thus improves the accuracy of the test results.

[0036] At the same time, in some embodiments, the distance between any two adjacent chips on the wafer is too close, and the probe diameter is large, so that if the probes are set in a one-to-one correspondence with the chips (high-density probe setting), the probes will contact each other, and even the probes will interfere with each other, causing the probes to be unable to be installed. The present application increases the distance between any two adjacent probes 20 through the above-mentioned arrangement, thereby avoiding contact between adjacent probes 20 and interference between probes 20, improving the installation convenience of probes 20, and achieving a one-to-one correspondence between probes 20 and chips on the wafer, thereby achieving a one-time detection of the wafer, reducing the time required for wafer testing.

[0037] According to the probe card 1 for high-density disposable test wafers of the present invention, by arranging multiple probes 20 at intervals along the length direction, and the projections of any two adjacent probes 20 in the length direction are spaced apart from each other, the distance between adjacent probes 20 is increased, and contact or even interference between adjacent probes 20 is avoided, thereby ensuring the smooth installation of the probes 20, thereby achieving high-density arrangement of the probes 20, and further achieving a reduction in the number of tests on the wafer, improving the test efficiency of the wafer, and making the installation of the probes 20 more convenient. At the same time, the above-mentioned arrangement can also reduce interference between the probes 20, improve the purity of the test signal, and thus improve the accuracy of the test results.

[0038] Example 2:

[0039] In this embodiment, based on the first embodiment, the plurality of probes 20 include: a plurality of first probes 21 and a plurality of second probes 22, wherein the plurality of first probes 21 are spaced apart in the length direction, and the plurality of second probes 22 are spaced apart in the length direction; wherein the projections of the first probes 21 and the second probes 22 in the length direction are spaced apart from each other.

[0040] It can be understood that the probe 20 includes multiple first probes 21 and multiple second probes 22, the multiple first probes 21 are arranged at intervals in the length direction, and the multiple second probes 22 are also arranged at intervals in the length direction, a second probe 22 is arranged between two adjacent first probes 21, or a first probe 21 is arranged between two adjacent second probes 22, and the projections of the first probes 21 and the second probes 22 in the length direction are staggered with each other.

[0041] It is understandable that when the probe card 1 of the present application tests a wafer, one of two adjacent chips on the wafer contacts the first probe 21 , and the other chip contacts the second probe 22 .

[0042] The probe card 1 of the present application solves the physical and electrical interference problems that may exist between the first probes 21 and the second probes 22 by providing the first probes 21 and the second probes 22 and ensuring that the first probes 21 and the second probes 22 are spaced apart in the length direction and the projection interval.

[0043] Therefore, by using the first probe 21 and the second probe 22, multiple positions on the wafer can be tested in a single operation, reducing the number and time required for repeated testing, and the spacing design between the probes 20 ensures better contact stability and reliability, reduces the interference between the signals of the first probe 21 and the second probe 22, thereby improving the accuracy of the wafer test results. At the same time, the high simultaneous measurement capability helps to speed up the entire wafer manufacturing process, thereby improving the wafer production efficiency.

[0044] According to some embodiments of the present invention, a plurality of mounting areas 11 are provided on the circuit board 10 , and the plurality of mounting areas 11 are spaced apart in the length direction and / or the width direction.

[0045] In some embodiments, a plurality of detection areas are provided on the wafer, and the plurality of detection areas are spaced apart in the length direction and / or the width direction. The probe card 1 of the present application is also provided with a plurality of mounting areas 11, and the plurality of mounting areas 11 are spaced apart in the length direction and / or the width direction, so as to achieve a one-to-one correspondence between the plurality of mounting areas 11 and the plurality of detection areas, so that the probe card 1 of the present application can detect all the detection areas on the wafer at one time, thereby improving the test efficiency of the wafer and thus improving the production efficiency of the wafer.

[0046] Example 3:

[0047] In this embodiment, based on the second embodiment, the first probe 21 includes: a first fixing portion, a first connecting portion and a first detecting portion, one end of the first fixing portion is connected and electrically connected to the circuit board 10, one end of the first connecting portion is connected to the other end of the first fixing portion, the extension direction of the first connecting portion is at an angle to the height direction, the first detecting portion is connected to the other end of the first connecting portion, and the extension direction of the first detecting portion is parallel to the extension direction of the first fixing portion.

[0048] In some embodiments, the first fixing portion is a part of the first probe 21, and the first fixing portion is used to fix the first probe 21 on the circuit board 10 and ensure that a good electrical connection is formed between the first probe 21 and the circuit board 10. The first connecting portion is a structure connecting the first fixing portion and the first detection portion. The extension direction of the first connecting portion has a certain angle with the height direction. The first detection portion is the terminal part of the first probe 21, and the first detection portion directly contacts the wafer surface and is used to collect electrical signals.

[0049] It can be understood that when the first probe 21 contacts the chip on the wafer, the first connecting portion can undergo a certain degree of deformation, so that the first detection portion can have a certain degree of movement in the height direction, avoiding the contact between the first probe 21 and the chip being an absolutely rigid contact, reducing the pressure when the first probe 21 contacts the chip, thereby avoiding damage to the chip or breakage of the first probe 21 when testing the wafer.

[0050] According to some embodiments of the present invention, the angle α between the first connecting portion and the height direction satisfies the following conditions: 5°≤α≤25°. It is understood that the angle α between the first connecting portion and the height direction refers to the angle formed by the first connecting portion relative to the height direction perpendicular to the wafer surface. Setting α to 5° to 25° helps optimize the contact angle between the first probe 21 and the wafer surface, reduces the pressure during contact, improves the accuracy of the test results, thereby reducing errors during the test process and improving test efficiency.

[0051] In some embodiments, the second probe 22 includes: a second fixing portion, a second connecting portion, and a second detecting portion, one end of the second fixing portion is connected to and electrically connected to the circuit board 10, one end of the second connecting portion is connected to the other end of the second fixing portion, the extension direction of the second connecting portion is at an angle to the height direction, the second detecting portion is connected to the other end of the second connecting portion, and the extension direction of the second detecting portion is parallel to the extension direction of the second fixing portion.

[0052] Example 4:

[0053] In this embodiment, based on the first embodiment, the probe card 1 further includes a connector 30, which is connected to the circuit board 10 and is suitable for connecting the circuit board 10 to the test equipment. It will be understood that one side of the connector 30 in the thickness direction is connected to the circuit board 10, and the other side of the connector 30 in the thickness direction is suitable for fixed connection with the test equipment. The connector 30 can ensure a stable connection between the probe card 1 and the test equipment.

[0054] According to some embodiments of the present invention, the probe card 1 further includes: a first connecting plate 41 and a second connecting plate 42, the first connecting plate 41 is connected to the connecting seat 30, the second connecting plate 42 is connected to the circuit board 10, and the first connecting plate 41 and the second connecting plate 42 are detachably connected.

[0055] In some embodiments, the connecting seat 30 is fixedly connected to the first connecting plate 41 on the side facing the circuit board 10, and the circuit board 10 is connected to the second connecting plate 42 on the side facing the connecting seat 30. The first connecting plate 41 is provided with multiple first vias, and the second connecting plate 42 is provided with second vias corresponding to the multiple first vias. The bolts pass through the first vias and the corresponding second vias and are threadedly connected to the nuts to fix the first connecting plate 41 and the second connecting plate 42, thereby fixing the connecting seat 30 to the probe card 1.

[0056] Therefore, the above arrangement makes the connection between the probe card 1 and the testing equipment more convenient, thereby improving the efficiency of assembly and disassembly of the probe card 1 .

[0057] In some embodiments, the connecting seat 30 includes a substrate 31 and a support block 32. The substrate 31 is suitable for connecting to the testing equipment. The support block 32 is constructed in multiples. The multiple support blocks 32 are all arranged on one side of the substrate 31 in the thickness direction. The free ends of the multiple support blocks 32 are respectively fixedly connected to the first connecting plate 41.

[0058] According to some embodiments of the present invention, the probe card 1 further includes a ceramic connecting plate 50 , which is disposed between the second connecting plate 42 and the circuit board 10 . The ceramic connecting plate 50 is suitable for connecting the second connecting plate 42 to the circuit board 10 .

[0059] It will be appreciated that ceramic connecting plate 50 is located between second connecting plate 42 and circuit board 10. Ceramic connecting plate 50 provides electrical isolation, preventing accidental electrical short circuits between circuit board 10 and the test equipment. Furthermore, ceramic connecting plate 50 provides additional mechanical support, enhancing the structural strength of circuit board 10 and improving the stability of the connection between circuit board 10 and second connecting plate 42.

[0060] Finally, it should be noted that the above preferred embodiments are only used to illustrate the technical solutions of the present invention and are not limiting. Although the present invention has been described in detail through the above preferred embodiments, those skilled in the art should understand that various changes can be made in form and details without departing from the scope defined by the claims of the present invention.

Claims

1. A probe card for high-speed simultaneous testing of disposable test wafers, characterized in that: include: A circuit board (10), wherein the circuit board (10) is provided with a mounting area (11) extending in a length direction; A plurality of probes (20), wherein the plurality of probes (20) are respectively arranged in the mounting area (11), and the plurality of probes (20) are respectively electrically connected to the circuit board (10); in The plurality of probes (20) are spaced apart in the length direction, and projections of any two adjacent probes (20) in the length direction are spaced apart from each other.

2. The probe card for high-precision disposable test wafers according to claim 1, wherein: The plurality of probes (20) respectively include: A plurality of first probes (21), wherein the plurality of first probes (21) are spaced apart in the length direction; A plurality of second probes (22), wherein the plurality of second probes (22) are spaced apart in the length direction; wherein Projections of the first probe (21) and the second probe (22) in the length direction are spaced apart from each other.

3. The probe card for high-precision disposable test wafers according to claim 2, wherein: A plurality of installation areas (11) are provided on the circuit board (10), and the plurality of installation areas (11) are spaced apart in the length direction and / or the width direction.

4. The probe card for high-speed simultaneous testing of disposable test wafers according to claim 3, wherein: The first probe (21) comprises: a first fixing portion, one end of which is connected and electrically connected to the circuit board (10); a first connecting portion, one end of the first connecting portion being connected to the other end of the first fixing portion, and an extending direction of the first connecting portion forming an angle with a height direction; The first detecting portion is connected to the other end of the first connecting portion, and an extending direction of the first detecting portion is parallel to an extending direction of the first fixing portion.

5. The probe card for high-precision disposable test wafers according to claim 4, wherein: The included angle α between the first connecting portion and the height direction satisfies: 5°≤α≤25°.

6. The probe card for high-precision disposable test wafers according to claim 1, wherein: Also includes: A connecting seat (30) is connected to the circuit board (10), and the connecting seat (30) is suitable for connecting the circuit board (10) to a test device.

7. The probe card for high-precision disposable test wafers according to claim 6, wherein: Also includes: a first connecting plate (41), the first connecting plate (41) being connected to the connecting seat (30); A second connecting plate (42), the second connecting plate (42) is connected to the circuit board (10), and the first connecting plate (41) and the second connecting plate (42) are detachably connected.

8. The probe card for high-precision testing of disposable wafers according to claim 7, wherein: Also includes: A ceramic connecting plate (50) is provided between the second connecting plate (42) and the circuit board (10), and the ceramic connecting plate (50) is suitable for connecting the second connecting plate (42) and the circuit board (10).

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