Chip packaging structure and PCB wiring structure
By designing multiple interconnect pins with two routing directions in the chip packaging structure and implementing a through-type layout on the PCB circuit board, the problem of complex lead intersections in the traditional chip packaging structure is solved, achieving simpler chip connection and higher circuit integration.
Patent Information
- Application Number
- CN202422513639.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-17
- Publication Date
- 2025-09-16
- Estimated Expiration
- 2034-10-17
AI Technical Summary
When high-density interconnection is performed on PCB circuit boards, due to the limitations of traditional chip packaging structures, there are many intersections between leads, resulting in complex wiring, high material costs and difficulty in optimizing pin interference.
The pin group in the chip packaging structure is designed to be multiple interconnected pins with two routing directions. The same chip is set on the PCB circuit board to achieve a through-type layout. Multiple interconnected pins are used to interconnect with other chips in different directions to reduce the use of jumpers and interference.
It reduces the complexity of chip connection design, saves PCB circuit board space, and is conducive to circuit integration and product miniaturization.
Smart Images
Figure CN223347779U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of electronic technology, in particular to a chip packaging structure and a PCB circuit board wiring structure. Background Art
[0002] PCB (Printed Circuit Board) is one of the important components of the electronics industry. Almost every electronic device uses PCB to achieve electrical interconnection between various components or chips.
[0003] High-density interconnect technology is an important trend in the future development of PCB circuit boards. As electronic devices become smaller and smaller, and circuit integration becomes higher and higher, high-density interconnection can not only improve circuit performance, but also save space and reduce production costs.
[0004] However, high-density interconnection on PCB circuit boards usually involves the interconnection design of multiple chips. Due to the limitations of traditional chip packaging structures, the connection traces of each chip will have many intersections during PCB wiring design. In this case, jumpers or 0-ohm chip resistors are needed to achieve cross-connection on a single-layer PCB, or a PCB with multi-layer metal circuits is used for wiring. These processing methods increase material costs, increase design difficulty, and make it difficult to optimize the interference between various pins during layout. Utility Model Content
[0005] The utility model aims to solve at least one of the above-mentioned technical problems existing in the prior art.
[0006] To this end, the first aspect of the present invention provides a chip packaging structure, which is provided with several pin groups with different functions, each pin group includes at least two interconnection pins with the same function, wherein the interconnection pins in the same pin group receive or transmit the same signal; and several interconnection pins in the same pin group are distributed in two directions of the chip, so that the several interconnection pins have two different routing directions, wherein at least one of the interconnection pins in the same pin group is used to connect to the interconnection pin with the same function in another chip packaging structure that is exactly the same as the chip packaging structure.
[0007] Based on the above-mentioned redesigned chip packaging structure, each chip has multiple interconnection pins that transmit the same signal, and the multiple interconnection pins have two routing directions. Therefore, the multiple interconnection pins can be used to interconnect with other chips in different routing directions. By increasing the selectable routing directions during the chip interconnection process, the complexity of the chip connection design is reduced.
[0008] The second aspect of the present invention provides a PCB wiring structure, wherein the PCB is provided with a first chip and a second chip, wherein the first chip and the second chip are identical and arranged in the same plane; each chip is provided with a first function type pin group, the first function type pin group includes at least two interconnect pins, the at least two interconnect pins have identical functions, and the at least two interconnect pins are distributed in two different positions of the chip so that the interconnect pins have a first wiring direction and a second wiring direction; the interconnect pins with the first wiring direction in the first function type pin group of the first chip are coupled to the interconnect pins with the second wiring direction in the first function type pin group of the second chip. It is understandable that in this PCB wiring structure, based on the configuration and connection relationship of the first chip and the second chip, it is possible to expand the connection of more chips to achieve the interconnection of multiple chips.
[0009] In summary, due to the adoption of the above technical features, the beneficial effects of the present invention are:
[0010] By adopting the chip packaging structure and PCB wiring structure of the present invention, a through-type layout can be formed on the PCB when the chips need to be interconnected. Several chips that need to be cascaded or paralleled can be connected in sequence, effectively reducing the complexity of wiring. At the same time, the use of jumpers can be greatly reduced, and the signal transmission paths represented by each pin group are less likely to interfere with each other. This saves PCB circuit board space and is conducive to circuit integration and product miniaturization.
[0011] Additional aspects and advantages of the present invention will become apparent in the following description or will be understood through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments in conjunction with the following drawings, in which:
[0013] Figure 1 This is a schematic diagram of a chip packaging structure according to an embodiment of the present invention;
[0014] Figure 2 is a schematic diagram of a chip packaging structure according to another embodiment of the present invention;
[0015] Figure 3 This is a schematic diagram of a chip packaging structure according to another embodiment of the present invention;
[0016] Figure 4 This is a schematic diagram of a PCB wiring structure according to an embodiment of the present invention;
[0017] Figure 5It is a schematic diagram of a PCB wiring structure of another embodiment of the present invention.
[0018] in, Figures 1 to 5 The corresponding relationship between the reference numerals and component names is as follows:
[0019] 1. First chip; 2. Second chip; 3. Third chip; 4. PCB circuit board;
[0020] 11. First metal path; 12. Second metal path; 13. Third metal path; 14. Fourth metal path. DETAILED DESCRIPTION
[0021] In order to more clearly understand the above-mentioned objectives, features and advantages of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the embodiments of the present application and the features therein can be combined with each other without conflict.
[0022] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the scope of protection of the present invention is not limited to the specific embodiments disclosed below.
[0023] Refer to the following Figures 1 to 5 To describe the chip packaging structure and PCB circuit board wiring structure provided according to some embodiments of the present invention.
[0024] Some embodiments of the present application provide a chip packaging structure.
[0025] The first embodiment of the present invention provides a chip package structure having multiple pin groups with different functions. The number of pin groups can be set according to actual needs. In other words, one or more pin groups can be provided, depending on the number of signals required for chip interconnection. Each pin group includes at least two interconnect pins with the same function, and the interconnect pins within the same pin group receive or transmit the same signal.
[0026] Specifically, several interconnect pins within the same pin group are distributed in two directions of the chip, so that the several interconnect pins have two different routing directions, wherein at least one of the interconnect pins within the same pin group is used to connect to an interconnect pin with the same function in another chip package structure that is completely identical to the chip package structure. Through the above arrangement, the current chip can be interconnected with other chips in different routing directions. In the present disclosure, the pin group originally provided with only one pin is expanded to a pin group with multiple interconnect pins, and then multiple interconnect pins with the same function can realize the interconnection of multiple chips in different directions, optimize the chip layout, and reduce the number and length of jumpers used.
[0027] In the following embodiments, a chip package structure having four pin groups is taken as an example for description, and the four pin groups are pin group A, pin group B, pin group C, and pin group D.
[0028] like Figure 1 In the illustrated embodiment, each pin group has two interconnect pins. The four pin groups are arranged in the same manner, but are used to transmit different signals. Taking pin group A as an example, the two interconnect pins in pin group A are located on opposite sides of the chip. In one specific embodiment, to further improve the neatness of the chip layout, the two interconnect pins can be symmetrically arranged on both sides of the chip.
[0029] like Figure 2 In one embodiment shown, each pin group also has two interconnected pins. Figure 1 The difference between the illustrated embodiments is that two interconnect pins in the same pin group are distributed on two adjacent edges of the chip. Generally, the two adjacent edges are perpendicular to each other.
[0030] like Figure 3 In one embodiment shown, pin group A and pin group B each have four interconnect pins, with the four interconnect pins grouped in pairs to form sub-pin groups, such as sub-pin group A1, sub-pin group A2, sub-pin group B1, and sub-pin group B2 shown in the figure. Pin group C and pin group D each have two interconnect pins. Still using pin group A as an example, the four interconnect pins in pin group A are evenly and symmetrically distributed on both sides of the chip. In other words, within the same chip package structure, the number of interconnect pins within different pin groups can vary, as long as the number of interconnect pins within each pin group matches the number of pins required for the corresponding signal interconnection.
[0031] It should be noted that the chip packaging structure proposed in the present disclosure can well cope with the parallel topology or cascade topology that requires multiple chip interconnections in chip interconnection, and the chip packaging structure of the present disclosure still has the good applicability of the conventional chip packaging structure. When used alone or when there are redundant interconnection pins, the additional interconnection pins can be left floating.
[0032] Other embodiments of the present application provide a PCB circuit board wiring structure.
[0033] In a PCB circuit board wiring structure proposed by the present invention, a first chip 1 and a second chip 2 are provided on the PCB circuit board 4, wherein the first chip 1 and the second chip 2 are exactly the same, and the first chip 1 and the second chip 2 are arranged on the same plane; each chip is provided with a first function type pin group, the first function type pin group includes at least two interconnection pins, at least two interconnection pins have exactly the same functions, and at least two interconnection pins are distributed in two different positions of the chip so that the interconnection pin has a first wiring direction and a second wiring direction; the interconnection pin with the first wiring direction in the first function type pin group of the first chip 1 is coupled to the interconnection pin with the second wiring direction in the first function type pin group of the second chip 2.
[0034] It can be understood that the PCB circuit board 4 can also be equipped with a third chip 3, a fourth chip, etc. for parallel or cascade connection based on the connection relationship between the first chip 1 and the second chip 2. It should be noted that each chip for parallel or cascade connection is exactly the same and is arranged on the same plane; in addition to the first functional type pin group, more pin groups can be set on each chip, such as the second functional type pin group, the third functional type pin group, the fourth functional type pin group, etc., wherein each pin group has different functions.
[0035] exist Figure 4 In one embodiment shown, the PCB wiring structure is based on Figure 1 The chip package structure shown interconnects multiple chips. The figure illustrates the connection relationship between a first chip 1, a second chip 2, and a third chip 3. Those skilled in the art can refer to the above connection method to interconnect more chips. The first functional type pin group is illustrated as pin group A, the second functional type pin group is illustrated as pin group B, the third functional type pin group is illustrated as pin group C, and the fourth functional type pin group is illustrated as pin group D.
[0036] like Figure 4 As shown, the two interconnect pins in the first function type pin group on each chip are located on both sides of the chip, then the interconnect pin with the first wiring direction in the first function type pin group is the right pin, and the interconnect pin with the second wiring direction is the left pin. It should be noted that the "left" and "right" referred to here are only for reference only. Figure 4 The schematic illustration of the pin orientation does not limit the present disclosure.
[0037] Specifically, the right pin of the first function type pin group of the first chip 1 is coupled to the left pin of the first function type pin group of the second chip 2. The right pin of the first function type pin group of the second chip 2 is coupled to the left pin of the first function type pin group of the third chip 3.
[0038] exist Figure 4 In the illustrated embodiment, the second function type pin group also includes two interconnect pins with the same function. Of course, more interconnect pins can be provided as needed. Specifically, the right pin of the second function type pin group of the first chip 1 is coupled to the left pin of the second function type pin group of the second chip 2. The right pin of the second function type pin group of the second chip 2 is coupled to the left pin of the second function type pin group of the third chip 3.
[0039] Through the above connection method, several chips are connected sequentially from left to right (or right to left), forming a through-type layout on the PCB circuit board 4. The signal chain composed of the corresponding pin groups on the several chips is used to transmit the same signal. The interconnect pins at the beginning of the signal chain can be regarded as the starting pins, and the interconnect pins at the end of the signal chain can be regarded as the end pins. Depending on the type of signal transmitted by the signal chain, the wiring method of the starting pins and the end pins will also be slightly different.
[0040] In a specific embodiment, the case where only the first chip 1 and the second chip 2 are interconnected is taken as an example for explanation. When the first function type pin group is used to transmit a signal that needs to be input from the outside (for example, the feedback signal FB in a multi-phase switching converter), the interconnection pin with the second wiring direction in the first function type pin group of the first chip 1 is the starting pin, which receives the signal input, and the interconnection pin with the first wiring direction in the first function type pin group of the second chip 2 is the end pin, which is floating.
[0041] In another specific embodiment, the case where only the first chip 1 and the second chip 2 are interconnected is also used as an example for explanation. When the first functional type pin group is used to transmit signals generated or circulated inside the chip (such as the synchronization signal SYN or the current sharing signal ISUM in a multi-phase switching converter), the interconnection pin with the second wiring direction in the first functional type pin group of the first chip 1 is the starting pin, and the starting pin is floating. The interconnection pin with the first wiring direction in the first functional type pin group of the second chip 2 is the end pin, and the end pin is floating.
[0042] In some embodiments, the interconnect pins of corresponding pin groups between different chips that need to be connected can be connected via jumper wires or directly connected via metal paths on the PCB circuit board 4. It can be understood that even if jumper wires are used, the present disclosure can still greatly reduce the length of the jumper wires and the complexity of the wiring compared to traditional wiring methods.
[0043] In one specific embodiment, interconnect pins are connected via metal paths on a PCB 4 as follows: PCB 4 includes several metal paths. The interconnect pins in the first functional type pin group of the first chip 1 and the second chip 2 are connected via corresponding first metal paths 11. The interconnect pins in the second functional type pin group of the first chip 1 and the second chip 2 are connected via corresponding second metal paths 12. Similarly, the interconnect pins in the third functional type pin group are connected via corresponding third metal paths 13. The interconnect pins in the fourth functional type pin group are connected via corresponding fourth metal paths 14. The first metal paths 11, the second metal paths 12, the third metal paths 13, and the fourth metal paths 14 are insulated from each other. Furthermore, the first metal paths 11, the second metal paths 12, the third metal paths 13, and the fourth metal paths 14 are located on the same wiring layer of the PCB 4. Similarly, connections between corresponding interconnect pins on other chips are also achieved via metal paths. This approach minimizes the use of jumper wires in the PCB wiring structure based on the chip packaging structure.
[0044] exist Figure 5 In another embodiment shown, the PCB wiring structure is based on Figure 2 The chip packaging structure shown is used to interconnect several chips. When this chip packaging structure is used for chip cascade design, since the cascaded chips need to be exactly the same, the number of chips is usually two, and no more than four.
[0045] In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any suitable manner in any one or more embodiments or examples.
[0046] Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of this utility model should be included in the scope of protection of this utility model.
Claims
1. A chip packaging structure, characterized in that: The package structure is provided with a plurality of pin groups with different functions, each pin group includes at least two interconnected pins with the same function, wherein the interconnected pins in the same pin group receive or transmit the same signal; and Several interconnect pins in the same pin group are distributed in two directions of the chip so that the several interconnect pins have two different routing directions, wherein at least one of the interconnect pins in the same pin group is used to connect to an interconnect pin with the same function in another chip packaging structure that is exactly the same as the chip packaging structure.
2. The chip packaging structure according to claim 1, wherein: At least two interconnect pins are respectively arranged on two sides of the chip.
3. The chip packaging structure according to claim 2, wherein: At least two interconnection pins in the same pin group are symmetrically arranged on both sides of the chip.
4. A PCB wiring structure, characterized in that: The PCB circuit board is provided with a first chip and a second chip, wherein the first chip and the second chip are identical and arranged on the same plane; Each chip is provided with a first function type pin group, the first function type pin group includes at least two interconnect pins, the at least two interconnect pins have exactly the same function, and the at least two interconnect pins are distributed in two different directions of the chip so that the interconnect pins have a first wiring direction and a second wiring direction; The interconnection pins with a first connection direction in the first function type pin group of the first chip are coupled to the interconnection pins with a second connection direction in the first function type pin group of the second chip.
5. The PCB wiring structure according to claim 4, characterized in that: The interconnection pins with the second connection direction in the first function type pin group of the first chip receive signal input, and the interconnection pins with the first connection direction in the first function type pin group of the second chip are floating.
6. The PCB wiring structure according to claim 4, characterized in that: The interconnection pins with the second wiring direction in the first function type pin group of the first chip are floating, and the interconnection pins with the first wiring direction in the first function type pin group of the second chip are floating.
7. The PCB wiring structure according to claim 4, characterized in that: Each chip is further provided with a second function type pin group, and the first function type pin group and the second function type pin group have different functions; The second functional type pin group includes at least two interconnection pins, the at least two interconnection pins have the same function, and the at least two interconnection pins are distributed at two positions of the chip so that the interconnection pins have two wiring directions; The interconnection pins with a first connection direction in the second function type pin group of the first chip are coupled to the interconnection pins with a second connection direction in the second function type pin group of the second chip.
8. The PCB wiring structure according to claim 4, characterized in that: The PCB circuit board is further provided with a third chip, wherein the third chip is identical to the first chip and the second chip, and the third chip is arranged on the same plane as the first chip and the second chip; The interconnection pins with a first connection direction in the first function type pin group of the second chip are coupled to the interconnection pins with a second connection direction in the first function type pin group of the third chip.
9. The PCB wiring structure according to claim 7, wherein: The PCB circuit board includes several metal paths, the interconnection pins in the first function type pin group in the first chip and the second chip are connected through the corresponding first metal paths, and the interconnection pins in the second function type pin group in the first chip and the second chip are connected through the corresponding second metal paths, and the first metal path and the second metal path are insulated from each other.
10. The PCB wiring structure according to claim 9, characterized in that: The first metal path and the second metal path are located on the same wiring layer of the PCB circuit board.