In-phase and reverse-phase automatic switching circuit applied to flying capacitor three-level circuit

Abstract

The utility model relates to an in-phase and inverted-phase automatic switching circuit, in particular to an in-phase and inverted-phase automatic switching circuit applied to a flying capacitor three-level circuit, which is used for solving the problems that in the prior art, an analog switch is used for switching circuits, the internal resistance of the analog switch is relatively large, the stray capacitance effect is obvious, extra interference is possibly introduced, and the cost is low. And the accuracy and the stability of control are influenced. The in-phase and inverted-phase automatic switching circuit applied to the flying capacitor three-level circuit realizes automatic switching of in-phase and inverted-phase signals through two operational amplifiers and a series of feedback resistors and capacitors in combination with an input signal Dx and an inductive current signal IL and through control of an NMOS transistor N1, thereby realizing regulation and balance of voltage.

Description

Technical Field

[0001] The utility model relates to an in-phase and out-phase automatic switching circuit, in particular to an in-phase and out-phase automatic switching circuit applied to a flying capacitor three-level circuit. Background Art

[0002] The flying capacitor three-level circuit is a common multilevel circuit topology widely used in medium- and high-voltage power electronics applications, such as frequency converters and grid inverters. The primary function of a flying capacitor is to provide voltage balancing within the circuit, ensuring that the voltages of each capacitor stage remain at the desired level. However, in practical applications, controlling the flying capacitor voltage presents complex challenges.

[0003] Existing technologies typically adjust the flying capacitor voltage by controlling the duty cycle of the switching transistor to achieve voltage balance. However, when the load current direction changes, the flying capacitor voltage compensation direction also changes accordingly. If the compensation direction is not adjusted in time, the negative feedback in the circuit may turn into positive feedback, causing rapid voltage imbalance and even uneven voltage in the circuit. In severe cases, it may cause irreversible damage to the circuit.

[0004] In existing technology, analog switches are often used to switch circuits to achieve dynamic voltage adjustment. However, analog switches have high internal resistance and significant parasitic capacitance, which can introduce additional interference, affecting control accuracy and stability. Therefore, how to reduce this interference and optimize circuit control has become a key issue that urgently needs to be addressed in existing technology. Utility Model Content

[0005] The purpose of the utility model is to solve the shortcomings of the prior art in which analog switches are used to switch circuits. Since the internal resistance of the analog switches is large and the parasitic capacitance effect is significant, additional interference may be introduced, affecting the accuracy and stability of control. The utility model provides an in-phase and inverting automatic switching circuit applied to a flying capacitor three-level circuit.

[0006] In order to solve the deficiencies of the above-mentioned prior art, the present invention provides the following technical solutions:

[0007] A same-phase and opposite-phase automatic switching circuit applied to a flying capacitor three-level circuit is special in that it includes a basic amplifier circuit, an inductor current regulation circuit and an NMOS tube N1;

[0008] The basic amplifier circuit is used to process the input signal Dx and output the output signal Dy. The basic amplifier circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor c1, and a first operational amplifier u1. The input signal Dx is input to the non-inverting terminal and the inverting terminal of the first operational amplifier u1 through the first resistor R1 and the second resistor R2, respectively. The third resistor R3 and the first capacitor c1 are connected in parallel between the inverting terminal and the output terminal of the first operational amplifier u1. The resistance values ​​of the first resistor R1 and the third resistor R3 are equal.

[0009] The inductor current regulation circuit is used to control the conduction and disconnection of the NMOS tube N1 according to the inductor current signal IL. The inductor current regulation circuit includes a second operational amplifier u2, a low-pass filter circuit, and a feedback voltage divider network. The low-pass filter circuit is connected to the inverting terminal of the second operational amplifier u2 and is used to input the inductor current signal IL. The feedback voltage divider network is arranged between the inverting terminal and the output terminal of the second operational amplifier u2. The output terminal of the second operational amplifier u2 is connected to the gate of the NMOS tube N1 through the gate control circuit. The source of the NMOS tube N1 is grounded, and the drain is connected to the non-inverting terminal of the first operational amplifier u1.

[0010] Furthermore, the low-pass filter circuit includes a sixth resistor R6 and a second capacitor c2, one end of the sixth resistor R6 is used to input the inductor current signal IL, and the other end is connected to the inverting end of the second operational amplifier u2, and the two ends of the second capacitor c2 are respectively connected to the ground GND and the inverting end of the second operational amplifier u2.

[0011] Furthermore, the feedback voltage divider network includes a fourth resistor R4 and a fifth resistor R5, wherein both ends of the fourth resistor R4 are respectively connected to the ground GND and the non-inverting terminal of the second operational amplifier u2, and both ends of the fifth resistor R5 are respectively connected to the non-inverting terminal and the output terminal of the second operational amplifier u2.

[0012] Furthermore, the gate control circuit includes a seventh resistor R7 and a third capacitor c3, wherein both ends of the seventh resistor R7 are respectively connected to the output end of the second operational amplifier u2 and the gate of the NMOS tube N1, and both ends of the third capacitor c3 are respectively connected to the ground GND and the gate of the NMOS tube N1.

[0013] Compared with the prior art, the beneficial effects of the present invention are:

[0014] The utility model discloses an automatic switching circuit for same-phase and opposite-phase signals applied to a flying capacitor three-level circuit. By combining two operational amplifiers and a series of feedback resistors and capacitors with an input signal Dx and an inductor current signal IL, the circuit realizes automatic switching of same-phase and opposite-phase signals through the control of an NMOS transistor N1, thereby achieving voltage regulation and balance. The circuit is suitable for flying capacitor three-level circuits, helps stabilize capacitor voltage, and reduces unnecessary voltage fluctuations. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a circuit diagram of an embodiment of an in-phase and inverting automatic switching circuit applied to a flying capacitor three-level circuit of the present utility model;

[0016] Figure 2 This is an equivalent circuit diagram of the embodiment of the utility model when the NMOS tube N1 is turned off;

[0017] Figure 3 This is an equivalent circuit diagram of the embodiment of the present invention when the NMOS tube N1 is turned on. DETAILED DESCRIPTION

[0018] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0019] Reference Figure 1 A same-phase and inverse-phase automatic switching circuit for a flying capacitor three-level circuit includes a basic amplifier circuit, an inductor current regulation circuit and an NMOS tube N1.

[0020] The basic amplifier circuit is used to process an input signal Dx and output an output signal Dy. The basic amplifier circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, and a first operational amplifier U1. The input signal Dx is connected to one end of the first resistor R1 and the second resistor R2. The other end of the first resistor R1 is connected to the inverting terminal of the first operational amplifier U1. The other end of the second resistor R2 is connected to the non-inverting terminal of the first operational amplifier U1. The two ends of the third resistor R3 are respectively connected to the inverting terminal and the output terminal of the first operational amplifier U1. The first capacitor C1 and the third resistor R3 are connected in parallel. The output signal of the output terminal of the first operational amplifier U1 is Dy.

[0021] The inductor current regulating circuit is used to control the conduction and disconnection of the NMOS transistor N1 according to the inductor current signal IL, and the inductor current signal IL is the output stage filtered inductor current signal of the flying capacitor three-level circuit.

[0022] The inductor current regulation circuit includes a second operational amplifier u2, a low-pass filter circuit, and a feedback voltage divider network; the low-pass filter circuit includes a sixth resistor R6 and a second capacitor C2; the feedback voltage divider network includes a fourth resistor R4 and a fifth resistor R5; and the gate control circuit includes a seventh resistor R7 and a third capacitor C3.

[0023] The inductor current signal IL is connected to one end of the sixth resistor R6, the other end of the sixth resistor R6 is connected to the inverting terminal of the second operational amplifier u2, one end of the second capacitor C2 is connected to the reverse terminal of the second operational amplifier u2, and the other end of the second capacitor C2 is grounded; one end of the fourth resistor R4 is grounded, and the other end is connected to the non-inverting terminal of the second operational amplifier u2; one end of the fifth resistor R5 is connected to the non-inverting terminal of the second operational amplifier u2, and the other end is connected to the output terminal of the second operational amplifier u2; the output terminal of the second operational amplifier u2 is also connected to one end of the seventh resistor R7, and the other end of the seventh resistor R7 is connected to the gate of the NMOS transistor N1; the two ends of the third capacitor C3 are respectively connected to the gate of the NMOS transistor N1 and GND; the source of the NMOS transistor N1 is grounded, and the drain is connected to the non-inverting terminal of the first operational amplifier u1.

[0024] The working principle of the present invention is as follows: the sixth resistor R6 and the second capacitor C2 form a first-order filter to filter the inductor current signal IL to remove high-frequency interference; the second operational amplifier U2, the fourth resistor R4 and the fifth resistor R5 are used to form a positive feedback hysteresis loop circuit to replace the ordinary comparator circuit. This is because the output negative voltage of the second operational amplifier U2 can well ensure the reliability of the shutdown of the NMOS tube N1, thereby improving the anti-interference purpose; the seventh resistor R7 and the third capacitor C3 form a first-order filter to filter out the gate interference signal of the NMOS tube N1.

[0025] When the inductor current signal IL>0, the output of the second operational amplifier u2 is the negative power supply voltage, and the NMOS tube N1 is turned off. At this time, the equivalent circuit around the first operational amplifier u1 is as follows: Figure 2 As shown, the first operational amplifier u1 outputs a signal Dy=Dx;

[0026] When the inductor current signal IL is less than 0, the output of the second operational amplifier u2 is the positive power supply voltage, and the NMOS transistor N1 is turned on. At this time, the equivalent circuit around the first operational amplifier u1 is as follows: Figure 3 As shown, the first operational amplifier u1 outputs a signal Dy=-Dx*R3 / R1, and R3=R1 (the resistance values ​​of the first resistor R1 and the third resistor R3 are equal), then Dy=-Dx;

[0027] Therefore, the output signal Dy can be controlled to be -Dx or +Dx according to the positive or negative value of the inductor current signal IL.

Claims

1. An in-phase and out-phase automatic switching circuit for a flying capacitor three-level circuit, characterized by: It includes a basic amplifier circuit, an inductor current regulation circuit and an NMOS tube N1; The basic amplifier circuit is used to process the input signal Dx and output the output signal Dy. The basic amplifier circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor c1, and a first operational amplifier u1. The input signal Dx is input to the non-inverting terminal and the inverting terminal of the first operational amplifier u1 through the first resistor R1 and the second resistor R2, respectively. The third resistor R3 and the first capacitor c1 are connected in parallel between the inverting terminal and the output terminal of the first operational amplifier u1. The resistance values ​​of the first resistor R1 and the third resistor R3 are equal. The inductor current regulation circuit is used to control the conduction and disconnection of the NMOS tube N1 according to the inductor current signal IL. The inductor current regulation circuit includes a second operational amplifier u2, a low-pass filter circuit, and a feedback voltage divider network. The low-pass filter circuit is connected to the inverting terminal of the second operational amplifier u2 and is used to input the inductor current signal IL. The feedback voltage divider network is arranged between the inverting terminal and the output terminal of the second operational amplifier u2. The output terminal of the second operational amplifier u2 is connected to the gate of the NMOS tube N1 through the gate control circuit. The source of the NMOS tube N1 is grounded, and the drain is connected to the non-inverting terminal of the first operational amplifier u1.

2. The in-phase and inverting automatic switching circuit for a flying capacitor three-level circuit according to claim 1, characterized in that: The low-pass filter circuit includes a sixth resistor R6 and a second capacitor c2. One end of the sixth resistor R6 is used to input the inductor current signal IL, and the other end is connected to the inverting end of the second operational amplifier u2. The two ends of the second capacitor c2 are respectively connected to the ground GND and the inverting end of the second operational amplifier u2.

3. The in-phase and inverting automatic switching circuit for a flying capacitor three-level circuit according to claim 1, characterized in that: The feedback voltage divider network includes a fourth resistor R4 and a fifth resistor R5. The fourth resistor R4 is connected to the ground GND and the non-inverting terminal of the second operational amplifier u2 at both ends, and the fifth resistor R5 is connected to the non-inverting terminal and the output terminal of the second operational amplifier u2 at both ends.

4. The in-phase and inverting automatic switching circuit for a flying capacitor three-level circuit according to claim 1, characterized in that: The gate control circuit includes a seventh resistor R7 and a third capacitor c3. The two ends of the seventh resistor R7 are respectively connected to the output end of the second operational amplifier u2 and the gate of the NMOS tube N1. The two ends of the third capacitor c3 are respectively connected to the ground GND and the gate of the NMOS tube N1.

Images