Semiconductor dielectric block
By stacking an epitaxial layer, an adhesion layer and a thermal conductive layer on a sapphire substrate and coating the side wall with an insulating layer, the problem of the ceramic substrate being unable to be thinned is solved, the insulation performance and heat dissipation capacity of the semiconductor dielectric block are improved, and the packaging cost is reduced.
Patent Information
- Application Number
- CN202422595840.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-25
- Publication Date
- 2025-09-19
- Estimated Expiration
- 2034-10-25
AI Technical Summary
When existing direct copper-clad ceramic substrates are used as substrate structures for semiconductor devices, their thickness cannot be reduced and they are easily affected by the environment and oxidized and sulfurized, which increases packaging costs.
Sapphire is used as the substrate, and an epitaxial layer, an adhesion layer and a thermal conductive layer are stacked on it, and an insulating layer is coated on the side wall to form a semiconductor dielectric block. Laser cutting is combined to form a cutting crack to improve the insulation performance.
The thickness of the semiconductor dielectric block is reduced while maintaining good heat dissipation capability, improving insulation performance, and reducing packaging costs.
Smart Images
Figure CN223363144U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of semiconductor dielectric blocks, in particular to a semiconductor dielectric block. Background Art
[0002] Semiconductor devices generally require a substrate structure, and the most widely used substrate structure is the direct-bonded copper ceramic substrate (DBC). Its material structure is a layer of copper metal plated on a ceramic gasket. However, the disadvantage of using ceramic as a substrate is that its thickness cannot be reduced very thinly, making it unsuitable for flat packages. In addition, the copper plating operation makes it susceptible to environmental influences when used as a bracket for the package. After opening, the direct-bonded copper ceramic substrate is prone to oxidation and sulfurization, making it difficult to preserve, thereby increasing the packaging cost of subsequent packages. Utility Model Content
[0003] The purpose of the utility model is to provide a semiconductor dielectric block, which can effectively reduce the thickness of the semiconductor dielectric block while maintaining the heat dissipation capability, and improve the insulation performance of the semiconductor dielectric block.
[0004] In order to achieve the above object, the utility model discloses a semiconductor dielectric block, which includes:
[0005] The substrate is made of sapphire material, and an epitaxial layer, an adhesion layer and a thermal conductive layer are sequentially stacked on the substrate. The substrate is also provided with an insulating layer covering the side walls of the epitaxial layer, the adhesion layer and the thermal conductive layer.
[0006] Optionally, the thickness of the substrate ranges from 10um to 200um.
[0007] Optionally, the thickness of the epitaxial layer ranges from 0.5um to 10um, and the composition of the epitaxial layer is gallium nitride, indium nitride, aluminum nitride, aluminum gallium nitride or indium gallium nitride.
[0008] Optionally, the sidewall of the epitaxial layer is provided with at least one inclined surface.
[0009] Optionally, the inclined surface is extended along the circumference of the epitaxial layer, and the angle formed between the inclined surface and the top surface of the substrate is in a range of 45 degrees to 85 degrees.
[0010] Optionally, the thickness of the adhesion layer ranges from 5 nm to 200 nm, and the composition of the adhesion layer is titanium, aluminum, chromium, nickel or rhodium.
[0011] Optionally, the thickness of the heat-conducting layer ranges from 0.1 um to 10 um, and the heat-conducting layer is made of aluminum.
[0012] Optionally, the thickness of the insulating layer ranges from 100 nm to 500 nm, and the insulating layer is made of silicon dioxide or silicon nitride.
[0013] Optionally, the sidewall of the substrate is provided with a plurality of laser holes by laser cutting, and at least some adjacent laser holes are connected to form a cutting crack; or the sidewall of the substrate is provided with a plurality of laser holes at intervals by laser cutting.
[0014] Optionally, the back side of the substrate is provided with a plurality of cutting holes arranged in an array by laser cutting.
[0015] The utility model forms a novel semiconductor dielectric block by stacking an epitaxial layer, an adhesive layer and a thermal conductive layer on a sapphire substrate, and covering the side walls of the epitaxial layer, the adhesive layer and the thermal conductive layer with an insulating layer. This can effectively reduce the thickness of the semiconductor dielectric block while maintaining the heat dissipation capability, and improve the insulation performance of the semiconductor dielectric block. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 This is a schematic structural diagram of a semiconductor dielectric block according to an embodiment of the present utility model. DETAILED DESCRIPTION
[0017] In order to explain the technical content, structural features, achieved objectives and effects of the present invention in detail, the following is a detailed description in conjunction with the embodiments and the accompanying drawings.
[0018] See also Figure 1 The utility model discloses a semiconductor dielectric block, which includes:
[0019] The substrate 1 is made of sapphire. An epitaxial layer 2, an adhesion layer 3 and a thermal conductive layer 4 are sequentially stacked on the substrate 1. An insulating layer 5 covering the side walls of the epitaxial layer 2, the adhesion layer 3 and the thermal conductive layer 4 is also provided on the substrate 1.
[0020] The utility model forms a novel semiconductor dielectric block by stacking an epitaxial layer 2, an adhesion layer 3 and a thermal conductive layer 4 on a sapphire substrate 1, and covering the side walls of the epitaxial layer 2, the adhesion layer 3 and the thermal conductive layer 4 with an insulating layer 5. This can effectively reduce the thickness of the semiconductor dielectric block while maintaining the heat dissipation capability, and improve the insulation performance of the semiconductor dielectric block.
[0021] See Figure 1 The thickness of the substrate 1 ranges from 10um to 200um. Using sapphire instead of ceramic as the material of the substrate 1 can effectively reduce the thickness of the semiconductor dielectric block, and the heat dissipation of the sapphire substrate 1 after thinning is not worse than that of the ceramic substrate 1, and can maintain the heat dissipation capacity.
[0022] See Figure 1The thickness of the epitaxial layer 2 ranges from 0.5um to 10um. The composition of the epitaxial layer 2 is gallium nitride (GaN), indium nitride (InN), aluminum nitride (ALN), aluminum gallium nitride (ALGaN) or indium gallium nitride (INGaN). As a special semiconductor epitaxial layer, it can assist the adhesion of the upper metal.
[0023] See Figure 1 The side wall of the epitaxial layer 2 is provided with at least one inclined surface 21, so that the side of the semiconductor dielectric block forms a chamfer before being covered with the insulating layer 5, which can cooperate with the covered insulating layer 5 to improve the structural stability of the insulating layer 5.
[0024] Furthermore, the inclined surface 21 is extended along the circumference of the epitaxial layer 2 , and the angle formed between the inclined surface 21 and the top surface of the substrate 1 is in a range of 45 degrees to 85 degrees.
[0025] See Figure 1 The thickness of the adhesion layer 3 ranges from 5 nm to 200 nm. The composition of the adhesion layer 3 is titanium (Ti), aluminum (Al), chromium (Cr), nickel (Ni) or rhodium (Rh). It can be formed on the top surface of the epitaxial layer 2 by plating and can penetrate into the epitaxial layer 2, which is conducive to forming a well-adhered metal on its top surface and improving the structural stability of the thermal conductive layer 4. However, it is not limited to this. In some embodiments, the composition of the adhesion layer 3 can also be other adhesive metals.
[0026] See Figure 1 The thickness of the heat conducting layer 4 ranges from 0.1um to 10um, and the composition of the heat conducting layer 4 is aluminum (AL).
[0027] Using aluminum instead of copper as the heat diffusion metal can effectively improve excessive oxidation while achieving better heat diffusion effect, but is not limited thereto. In some embodiments, the heat conducting layer 4 can also be made of other heat diffusion metals.
[0028] See Figure 1 The thickness of the insulating layer 5 ranges from 100 nm to 500 nm. The composition of the insulating layer 5 is silicon dioxide (SiO2) or silicon nitride (SINx), so as to form a special dielectric block edge design, so as to achieve the effect of protecting the epitaxial layer 2, the adhesion layer 3 and the thermal conductive layer 4 as a side cladding layer, and effectively improve the insulation performance of the dielectric block.
[0029] See Figure 1 In this embodiment, the sidewall of the substrate 1 is provided with a plurality of laser holes 11 by laser cutting, and at least some adjacent laser holes 11 are connected to form a cutting crack 10, but the present invention is not limited thereto. In some embodiments, the sidewall of the substrate 1 can also be provided with a plurality of laser holes 11 at intervals by laser cutting, which is beneficial for preventing the bottom glue used when the dielectric block is packaged as a substrate of a semiconductor device from climbing up.
[0030] Furthermore, in this embodiment, the distance between the cutting rift 10 and the bottom surface of the sapphire substrate 1 ranges from one-third to one-half of the thickness of the sapphire substrate 1 , but is not limited thereto.
[0031] Specifically, in this embodiment, a laser with a wavelength range of 800 nm to 1300 nm, a frequency range of 30 Hz to 200 Hz, and an energy of 3 mW to 10 mW is used to cut the sidewall of the sapphire substrate 1 so that continuous laser burst points are formed on the sidewall, thereby forming a special cutting crack 10 on the sidewall of each independent dielectric block element, but the present invention is not limited to this.
[0032] Furthermore, the back side of the substrate 1 is provided with a plurality of cutting holes 12 arranged in an array by laser cutting, which is beneficial to further prevent the bottom glue used in packaging from climbing up.
[0033] The above disclosure is only a preferred embodiment of the present invention, and certainly cannot be used to limit the scope of rights of the present invention. Therefore, equivalent changes made according to the scope of the patent application of the present invention are still within the scope covered by the present invention.
Claims
1. A semiconductor dielectric block, characterized in that: include: The substrate is made of sapphire material, and an epitaxial layer, an adhesion layer and a thermal conductive layer are sequentially stacked on the substrate. The substrate is also provided with an insulating layer covering the side walls of the epitaxial layer, the adhesion layer and the thermal conductive layer.
2. The semiconductor dielectric block according to claim 1, wherein: The thickness of the substrate ranges from 10um to 200um.
3. The semiconductor dielectric block according to claim 1, wherein: The thickness of the epitaxial layer ranges from 0.5um to 10um, and the component of the epitaxial layer is gallium nitride, indium nitride, aluminum nitride, aluminum gallium nitride or indium gallium nitride.
4. The semiconductor dielectric block according to claim 1, wherein: The sidewall of the epitaxial layer is provided with at least one inclined surface.
5. The semiconductor dielectric block according to claim 4, wherein: The inclined surface is extended along the circumference of the epitaxial layer, and the angle formed between the inclined surface and the top surface of the substrate is in a range of 45 degrees to 85 degrees.
6. The semiconductor dielectric block according to claim 1, wherein: The thickness of the adhesion layer ranges from 5 nm to 200 nm, and the composition of the adhesion layer is titanium, aluminum, chromium, nickel or rhodium.
7. The semiconductor dielectric block according to claim 1, wherein: The thickness of the heat-conducting layer ranges from 0.1um to 10um, and the heat-conducting layer is composed of aluminum.
8. The semiconductor dielectric block according to claim 1, wherein: The thickness of the insulating layer ranges from 100 nm to 500 nm, and the insulating layer is made of silicon dioxide or silicon nitride.
9. The semiconductor dielectric block according to claim 1, wherein: The sidewall of the substrate is provided with a plurality of laser holes by laser cutting, and at least some adjacent laser holes are connected to form a cutting crack; or The sidewall of the substrate is provided with a plurality of laser holes at intervals by laser cutting.
10. The semiconductor dielectric block according to claim 1, wherein: The back side of the substrate is provided with a plurality of cutting holes arranged in an array by laser cutting.