Printed circuit board and electronic equipment
By setting target holes and patterns of different depths and thicknesses on the printed circuit board, the problem of insufficient target alignment accuracy is solved, higher recognition and alignment accuracy is achieved, and target damage is avoided.
Patent Information
- Application Number
- CN202422425239.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-08
- Publication Date
- 2025-09-19
- Estimated Expiration
- 2034-10-08
AI Technical Summary
The target alignment accuracy of the printed circuit board is insufficient, resulting in inaccurate recognition and alignment.
A target penetrating multiple conductive layers is set on the printed circuit board, including a first-stage hole and a second-stage hole. The diameter of the first-stage hole is smaller than the second-stage hole. The target pattern surrounds the first-stage hole and is exposed outside the second-stage hole, forming a depth difference to improve the recognition feature. The thickness of the target pattern is greater than 5 microns to prevent damage by laser drilling.
Through the depth difference and thickness design, the recognition and alignment accuracy of the target are improved, the damage of the target pattern due to laser drilling is avoided, and the alignment accuracy is enhanced.
Smart Images
Figure CN223364333U_ABST
Abstract
Description
Technical Field
[0001] The utility model is applied to the technical field of printed circuit boards, in particular to a printed circuit board and electronic equipment. Background Art
[0002] PCB (Printed Circuit Board), also known as printed circuit board or printed circuit board, is an important electronic component with wide application. It is the support body of electronic components and also the carrier of electrical connection of electronic components.
[0003] During the preparation of printed circuit boards, it is often necessary to set targets on the boards for alignment.
[0004] However, at present, the target alignment accuracy is insufficient. Utility Model Content
[0005] The utility model provides a printed circuit board and electronic equipment to solve the problem of insufficient target alignment accuracy.
[0006] In order to solve the above technical problems, the present invention provides a printed circuit board, comprising: a plurality of inner conductive layers and two outer conductive layers respectively bonded on opposite sides of the plurality of inner conductive layers; at least one target area and a graphic area are provided on the printed circuit board, and a target penetrating the printed circuit board is provided on the target area, wherein the target comprises a first-stage hole provided on the plurality of inner conductive layers and a second-stage hole provided on the two outer conductive layers respectively; the diameter of the first-stage hole is smaller than the diameter of the second-stage hole; wherein, on the two inner conductive layers respectively adjacent to the adjacent outer conductive layers, a target graphic is formed on the target area, and the target graphic is bonded around the first-stage hole so as to be exposed by the corresponding second-stage hole.
[0007] Wherein, the thickness of the target pattern is greater than 5 microns.
[0008] Wherein, on two inner conductive layers respectively close to the adjacent outer conductive layers, the first area ratio between the target pattern and the target region is 90-110% of the second area ratio between the circuit pattern in the pattern region and the corresponding inner conductive layer.
[0009] Wherein, on two inner conductive layers respectively close to the adjacent outer conductive layers, a first area ratio between the target pattern and the target region is equal to a second area ratio between the circuit pattern in the pattern region and the corresponding inner conductive layer.
[0010] The target area is 30-40 mm in area. 2The target pattern has an area range of 2-15 mm 2 .
[0011] The target area is a square area of 6mm*6mm.
[0012] Wherein, the target pattern includes a circular pattern and a preset pattern; the circular pattern is arranged around the first stage hole, and the preset pattern is arranged in the target area.
[0013] The preset shapes include one or more of a circle, a square, a triangle, a parallelogram, a heart, an ellipse, and a line.
[0014] The diameter of the circular ring pattern is in the range of 1.5-2.5 mm, and the diameter of the first-stage hole is in the range of 0.9-1.1 mm.
[0015] The diameter of the circular ring shape is 2 mm, and the diameter of the first stage hole is 1 mm.
[0016] In order to solve the above technical problems, the present invention further provides an electronic device, which includes the printed circuit board as described in any one of the above items.
[0017] To solve the above technical problems, the present invention provides a printed circuit board comprising: a plurality of inner conductive layers and two outer conductive layers respectively laminated on opposite sides of the plurality of inner conductive layers; at least one target area and a pattern area are provided on the printed circuit board, wherein the target area is provided with a target penetrating the printed circuit board, wherein the target comprises a first-stage hole provided in the plurality of inner conductive layers and a second-stage hole provided in each of the two outer conductive layers; the diameter of the first-stage hole is smaller than the diameter of the second-stage hole; wherein a target pattern is formed on the target area on each of the two inner conductive layers adjacent to the adjacent outer conductive layers, the target pattern being laminated around the first-stage hole so as to be exposed by the corresponding second-stage hole. Thus, the target has a depth difference by utilizing the different depths of the first-stage hole and the second-stage hole, thereby enhancing grayscale difference and improving the accuracy of target recognition and alignment. Furthermore, a target pattern is provided on the inner conductive layer adjacent to the adjacent outer conductive layer, laminated around the first-stage hole so as to be exposed by the corresponding second-stage hole, thereby further improving the recognition feature of the target and improving the accuracy of target recognition and alignment. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 This is a structural diagram of an embodiment of a printed circuit board provided by the present utility model;
[0019] Figure 2 This is a schematic top view of the structure of an embodiment of a printed circuit board provided by the present utility model;
[0020] Figure 3 This is a schematic top view of a target area on an inner conductive layer close to an adjacent outer conductive layer provided by the present invention;
[0021] Figure 4 It is a schematic top view of another embodiment of a target area on an inner conductive layer close to an adjacent outer conductive layer provided by the present invention. DETAILED DESCRIPTION
[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.
[0023] It should be noted that if the embodiments of the present invention involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly.
[0024] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features specified as "first" or "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but this must be based on the fact that ordinary technicians in this field can implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.
[0025] Please read together Figure 1-3 , Figure 1 It is a structural schematic diagram of an embodiment of a printed circuit board provided by the utility model. Figure 2 It is a schematic top view of the structure of an embodiment of a printed circuit board provided by the utility model. Figure 3 It is a schematic top view of the structure of an embodiment of a target area on an inner conductive layer close to an adjacent outer conductive layer provided by the present invention.
[0026] The printed circuit board 100 of this embodiment includes a plurality of inner conductive layers 132 and two outer conductive layers 131 respectively disposed on opposite sides of the plurality of inner conductive layers 132 .
[0027] The materials of the inner conductive layer 132 and the outer conductive layer 131 may include but are not limited to conductive materials such as copper, iron, aluminum, silver, gold, nickel or alloys. Circuit patterns are formed on the inner conductive layer 132 and the outer conductive layer 131 to realize the electrical functions of the printed circuit board 100.
[0028] A dielectric layer 120 is further interposed between each two adjacent conductive layers for dielectric purposes. The dielectric layer 120 may include, but is not limited to, one or more insulating materials such as prepreg, epoxy resin, polyester resin (PET), polyimide, polyimide, polycarbonate (PC), bismaleimide triazine (BT), Ajinomoto build film (ABF), FR4 resin, and ceramic matrix.
[0029] The number of inner conductive layers 132 in the printed circuit board 100 is set based on actual needs, and can be 2 layers, 4 layers, 6 layers, 7 layers, 8 layers or 10 layers, etc., which is not limited here.
[0030] Printed circuit board 100 is provided with at least one target area 140 and a pattern area 130. Pattern area 130 is used to form a circuit pattern, and target area 140 is used to form target 110. The specific locations of target area 140 and pattern area 130 on printed circuit board 100 are set based on actual needs. The number of target areas 140 can be one, three, four, or ten, etc., and is not limited here.
[0031] Target area 140 is provided with a target 110 that penetrates printed circuit board 100. Target 110 includes first-stage holes 111 disposed in multiple inner conductive layers 132 and second-stage holes 112 disposed in each of the two outer conductive layers 131. The diameter of first-stage holes 111 is smaller than that of second-stage holes 112. By designing target 110 as a stepped through-hole, with the outer step having a larger diameter than the inner step, target 110 exhibits a depth difference, thereby enhancing grayscale differences and improving the accuracy of target 110 identification and alignment.
[0032] Among them, on the two inner conductive layers 132 respectively close to the adjacent outer conductive layers 131, a target pattern 170 is formed on the target area 140, and the target pattern 170 is arranged to fit around the first-stage hole 111 so as to be exposed by the corresponding second-stage hole 112, thereby further improving the recognition characteristics of the target 110 and improving the accuracy of identifying the target 110 for alignment.
[0033] According to the above structure, the printed circuit board of this embodiment includes: multiple inner conductive layers and two outer conductive layers respectively laminated on opposite sides of the multiple inner conductive layers; at least one target area and a pattern area are provided on the printed circuit board, wherein the target area is provided with a target penetrating the printed circuit board, wherein the target includes a first-stage hole provided in the multiple inner conductive layers and a second-stage hole provided in each of the two outer conductive layers; the diameter of the first-stage hole is smaller than the diameter of the second-stage hole; wherein a target pattern is formed on the target area on each of the two inner conductive layers adjacent to the adjacent outer conductive layers, and the target pattern is laminated around the first-stage hole so as to be exposed by the corresponding second-stage hole. Thus, the different depths of the first-stage hole and the second-stage hole are used to create a depth difference in the target, thereby enhancing grayscale difference and improving the accuracy of target recognition and alignment. Furthermore, a target pattern is provided on the inner conductive layer adjacent to the adjacent outer conductive layer, laminated around the first-stage hole so as to be exposed by the corresponding second-stage hole, thereby further improving the recognition feature of the target and improving the accuracy of target recognition and alignment.
[0034] In other embodiments, the thickness of the target pattern 170 is greater than 5 microns, and can be 5 microns, 8 microns, 10 microns, 11 microns, 14 microns, 16 microns, 20 microns, 25 microns, 26 microns, 30 microns, 35 microns, 38 microns or 40 microns, etc., which is not limited here.
[0035] In this embodiment, the target 110 first forms the first-stage holes 111 on the inner conductive layer 132. After processing the outer conductive layer 131, laser drilling and burning are performed on the outer conductive layer 131 at the locations covering the first-stage holes 111 to form the second-stage holes 112. However, if the target pattern 170 is too thin during this process, the laser energy will burn through the target pattern 170, resulting in insufficient roundness for the first-stage holes 111 in the target 110 and making pattern alignment impossible. Therefore, in this embodiment, the thickness of the target pattern 170 is set to greater than 5 microns to reduce the risk of laser burning of the target pattern 170, thereby improving the roundness of the first-stage holes 111 and ensuring the pattern alignment accuracy of the target 110.
[0036] In other embodiments, on two inner conductive layers 132 respectively adjacent to the adjacent outer conductive layers 131 , the first area ratio between the target pattern 170 and the target region 140 is 90-110% of the second area ratio between the circuit pattern 155 in the pattern region 130 and the corresponding inner conductive layer 132 .
[0037] That is, the area A of the target pattern 170 is divided by the area B of the target area 140 to obtain a first area ratio H, H=A / B, and the area C of the circuit pattern 155 is divided by the area D of the corresponding inner conductive layer 132 to obtain a second area ratio P, P=C / D, wherein the range of H is 90%P-110%P, and specifically can be 90%P, 92%P, 95%P, 98%P, 100%P, 102%P, 105%P, 108%P or 110%P, etc.
[0038] The circuit pattern 155 in the pattern area 130 is a conductive circuit on the inner conductive layer 132 close to the adjacent outer conductive layer 131 . The second area ratio P between the circuit pattern 155 and the inner conductive layer 132 is the residual copper rate of the inner conductive layer 132 .
[0039] In this embodiment, the target pattern 170 and the circuit pattern 155 in the pattern area 130 are both formed simultaneously by electroplating. When the first area ratio H between the target pattern 170 and the target area 140 is close to the residual copper rate of the inner conductive layer 132, the target pattern 170 and the circuit pattern 155 on the inner conductive layer 132 can be formed in the same electroplating process and electroplated based on the similar residual copper rate, so that the electroplated thickness of the target pattern 170 and the circuit pattern 155 on the inner conductive layer 132 is close. The thickness of the circuit pattern 155 itself will take into account laser drilling and reliability issues. Therefore, the above-mentioned area ratio setting can ensure that the thickness of the target pattern 170 is close to that of the circuit pattern 155, so as to avoid the problem of target burning and improve the structural stability of the inner conductive layer 132.
[0040] In other embodiments, on two inner conductive layers 132 respectively adjacent to the adjacent outer conductive layers 131, the first area ratio H between the target pattern 170 and the target area 140 is equal to the second area ratio P between the circuit pattern 155 in the pattern area 130 and the corresponding inner conductive layer 132.
[0041] The first area ratio H is the ratio of the projected area of the target pattern 170 on the inner conductive layer 132 to the projected area of the target region 140 on the inner conductive layer 132. The second area ratio P is the ratio of the projected area of the circuit pattern 155 on the inner conductive layer 132 to the area of the inner conductive layer 132 itself. The specific position of the circuit pattern 155 is set based on actual needs.
[0042] The circuit pattern 155 in the pattern region 130 is a conductive circuit on the inner conductive layer 132 adjacent to the adjacent outer conductive layer 131. The second area ratio P between the circuit pattern 155 and the inner conductive layer 132 is equal to the residual copper rate of the inner conductive layer 132. That is, the first area ratio H between the target pattern 170 and the target region 140 on the inner conductive layer 132 adjacent to the adjacent outer conductive layer 131 is equal to the residual copper rate of the inner conductive layer 132.
[0043] The target pattern 170 is an electroplated metal layer disposed on the target area 140 of the inner conductive layer 132 adjacent to the outer conductive layer 131 .
[0044] In this embodiment, the target pattern 170 and the circuit pattern 155 in the pattern area 130 are both formed simultaneously by electroplating. When the first area ratio H between the target pattern 170 and the target area 140 is equal to the residual copper rate of the inner conductive layer 132, the target pattern 170 and the circuit pattern 155 on the inner conductive layer 132 can be formed in the same electroplating process and electroplated based on the same residual copper rate, so that the target pattern 170 and the circuit pattern 155 on the inner conductive layer 132 have the same electroplated thickness. The thickness of the circuit pattern 155 itself will take into account laser drilling and reliability issues. Therefore, the above-mentioned area ratio setting can ensure that the thickness of the target pattern 170 is the same as the thickness of the circuit pattern 155, so as to avoid the problem of target burning and improve the structural stability of the inner conductive layer 132.
[0045] In other embodiments, the target area 140 is in the range of 30-40 mm. 2 , specifically 30mm 2 , 32mm 2 , 33mm 2 , 35mm 2 , 36mm 2 , 37mm 2 , 39mm 2 or 40mm 2 etc.; the area range of the target pattern 170 is 2-15mm 2 , specifically 2mm 2 , 3mm 2 , 4mm 2 , 5mm 2 , 6mm 2 , 7mm 2 , 8mm 2 , 9mm 2 , 10mm 2 , 12mm 2 , 14mm 2 or 15mm 2 wait.
[0046] The area of the target area 140 and the area of the target pattern 170 can be adjusted within the above range, so that the target area 140 and the target pattern 170 within the above range can adapt to various residual copper rates of the circuit pattern 155 on the inner conductive layer 132 close to the adjacent outer conductive layer 131, thereby ensuring that in various scenarios, the first area ratio between the target pattern 170 and the target area 140 can be equal to the second area ratio between the circuit pattern 155 in the pattern area 130 and the corresponding inner conductive layer 132, thereby ensuring that the thickness of the target pattern 170 is the same as the thickness of the circuit pattern 155, so as to avoid the problem of target burning.
[0047] Please see further Figure 3 In other embodiments, target area 140 is a 6 mm * 6 mm square area. Within this size, target area 140 can reduce the impact on pattern area 130, ensuring routing space for circuit pattern 155 within pattern area 130. Furthermore, within this range, target area 140 can ensure design space for target pattern 170, thereby achieving the aforementioned area ratio setting and ensuring that target pattern 170 itself has a certain size for easy identification and alignment.
[0048] See also Figure 4 , Figure 4 It is a schematic top view of another embodiment of a target area on an inner conductive layer close to an adjacent outer conductive layer provided by the present invention.
[0049] In other embodiments, the target pattern 270 includes a circular ring pattern 290 and a preset pattern 180; the circular ring pattern 290 is arranged around the first-stage hole 211 to be exposed by the second-stage hole to facilitate identification and alignment, and the preset pattern 180 is arranged in the target area 240. The preset pattern 180 is used to increase the first area ratio between the target pattern 270 and the target area 240, thereby expanding the range of the residual copper rate of the adaptive circuit pattern and expanding the application scenario.
[0050] In other embodiments, the preset graphic 180 includes but is not limited to one or more of a circle, a square, a triangle, a parallelogram, a heart shape, an ellipse, and a line. The setting of the preset graphic 180 is used to expand the first area ratio between the target graphic 270 and the target area 240.
[0051] In a specific application scenario, the preset graphics 180 may include a circular graphic 183, a square graphic 182, a linear graphic 184, and a triangular graphic 181. In other application scenarios, the preset graphics 180 may also include other graphic shapes, which are not limited here.
[0052] In other embodiments, the diameter range of the annular ring graphic 290 is 1.5-2.5 mm, specifically including 1.5 mm, 1.8 mm, 1.9 mm, 2.0 mm, 2.2 mm or 2.5 mm, etc., and the diameter range of the first stage hole 211 is 0.9-1.1 mm, specifically including 0.9 mm, 1.0 mm or 1.1 mm, etc.
[0053] The second stage hole may expose at least a portion of the annular pattern 290 to facilitate identification and alignment.
[0054] In other embodiments, the diameter of the ring pattern 290 is 2 mm, and the diameter of the first-stage hole 211 is 1 mm. The diameter of the second-stage hole can be in the range of 1.5-2.0 mm, specifically 1.5 mm, 1.6 mm, 1.7 mm, 1.8 mm, or 2.0 mm, so as to expose the ring pattern 290 for alignment recognition.
[0055] Based on the same concept, the present application also provides an electronic device, which includes the printed circuit board 100 of any of the above embodiments.
[0056] Electronic devices may include, but are not limited to, mobile devices, computer devices, medical devices, audio devices, etc.
[0057] The above description is only an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the description and drawings of the present invention, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.
Claims
1. A printed circuit board, characterized in that: The printed circuit board comprises: a multi-layer inner conductive layer and two outer conductive layers respectively arranged on opposite sides of the multi-layer inner conductive layer; The printed circuit board is provided with at least one target area and a pattern area, wherein the target area is provided with a target penetrating the printed circuit board, wherein the target includes first-stage holes provided on multiple inner conductive layers and second-stage holes provided on two outer conductive layers respectively; the diameter of the first-stage holes is smaller than the diameter of the second-stage holes; Wherein, on the two inner conductive layers respectively close to the adjacent outer conductive layers, a target pattern is formed on the target area, and the target pattern is arranged around the first stage hole to be exposed by the corresponding second stage hole.
2. The printed circuit board according to claim 1, wherein: The thickness of the target pattern is greater than 5 microns.
3. The printed circuit board according to claim 1, wherein: On two inner conductive layers respectively adjacent to the adjacent outer conductive layers, a first area ratio between the target pattern and the target region is 90-110% of a second area ratio between the circuit pattern in the pattern region and the corresponding inner conductive layer.
4. The printed circuit board according to claim 3, wherein: On two inner conductive layers respectively adjacent to the adjacent outer conductive layers, a first area ratio between the target pattern and the target region is equal to a second area ratio between the circuit pattern in the pattern region and the corresponding inner conductive layer.
5. The printed circuit board according to any one of claims 1 to 4, characterized in that: The target area ranges from 30 to 40 mm 2 The target pattern has an area range of 2-15 mm 2 .
6. The printed circuit board according to claim 5, characterized in that The target area is a square area of 6 mm*6 mm.
7. The printed circuit board according to claim 5, characterized in that The target graphics include circular graphics and preset graphics; The annular pattern is arranged around the first stage hole, and the preset pattern is arranged in the target area.
8. The printed circuit board according to claim 7, wherein: The preset shapes include one or more of a circle, a square, a triangle, a parallelogram, a heart shape, an ellipse, and a line.
9. The printed circuit board according to claim 7, characterized in that: The diameter of the annular pattern is in the range of 1.5-2.5 mm, and the diameter of the first stage hole is in the range of 0.9-1.1 mm.
10. An electronic device, characterized in that: The electronic device comprises the printed circuit board according to any one of claims 1 to 9.