High-reliability low-ESL high-voltage multilayer ceramic dielectric capacitor

Abstract

The utility model provides a high-reliability low-ESL high-voltage multilayer ceramic dielectric capacitor. The high-reliability low-ESL high-voltage multilayer ceramic dielectric capacitor comprises an outer electrode and a capacitor core, the two outer electrodes respectively wrap two opposite sides of the capacitor core, the capacitor core comprises a plurality of layers of inner electrodes and dielectric layers, the plurality of layers of inner electrodes and dielectric layers are alternately stacked to form a square block, the top and the bottom of the square block are respectively provided with an upper protective layer and a lower protective layer, each inner electrode comprises a plurality of tiled electrode plates, and the upper protective layer and the lower protective layer are arranged in the square block. And two adjacent layers of inner electrodes are arranged in a staggered manner. The four corners of the electrode plate are designed to be rounded, thereby improving the distribution condition of an electric field on the inner electrode under the condition of high voltage, and effectively preventing the point discharge of the capacitor. The two layers of inner electrodes form four capacitors connected in series, so that the voltage applied by the capacitors is shared, and the voltage endurance capability of the capacitors is effectively improved; the inner electrode is divided into two or more independent and separated inner electrode patterns, so that the printing area proportion of the inner electrode is effectively reduced, the sintering stress of the capacitor is reduced, and the reliability of the capacitor is improved.

Description

Technical Field

[0001] The utility model relates to a high-reliability, low-ESL, high-voltage multilayer ceramic capacitor. Background Art

[0002] High-voltage multilayer ceramic capacitors (HVMLCCs) are widely used in aviation, aerospace, shipbuilding, weapons, and other fields due to their high withstand voltage, large capacity, and small size. They perform high-voltage coupling, DC blocking, and filtering functions in circuits. With the continuous expansion of HVMLCC applications and the iterative updates of circuit design, HVMLCCs are required to have higher reliability and lower equivalent series inductance (ESL). Conventional HVMLCCs have a large internal electrode brush area. During the sintering process, due to the difference in expansion coefficients between the internal electrode metal and the ceramic dielectric, stress is generated at the metal-ceramic interface, which can easily lead to cracks or delamination within the capacitor, and the reliability of the HVMLCC cannot be guaranteed. In addition, the aspect ratio of existing HVMLCC designs is usually greater than 1, resulting in a long current transmission path, which leads to a large ESL. When used at high frequencies, the circuit is prone to noise and voltage fluctuations. For example, the multilayer ceramic capacitor disclosed in JP2001185446A forms a multilayer capacitor by alternately stacking dielectric layers and internal electrode layers. However, the internal electrode layers are arranged vertically, so that the withstand voltage value of each layer of capacitance is not high, and the current transmission path formed between the internal electrode and the external electrode is long, resulting in a large ESL. Utility Model Content

[0003] In order to solve the above technical problems, the utility model provides a high-reliability, low-ESL, high-voltage multilayer ceramic capacitor.

[0004] The utility model is achieved through the following technical solutions.

[0005] The utility model provides a high-reliability, low-ESL, high-voltage multilayer ceramic capacitor, comprising an outer electrode and a capacitor core; the two outer electrodes are respectively wrapped around opposite sides of the capacitor core; the capacitor core comprises several layers of inner electrodes and dielectric layers, which are alternately stacked into a square block; the top and bottom of the square block are respectively provided with an upper protective layer and a lower protective layer; the inner electrode comprises several flat electrode sheets, and adjacent layers of inner electrodes are staggered.

[0006] The electrode sheets are printed on the dielectric layer in a square array. The electrode sheets on the same column of two adjacent inner electrode layers are staggered, and the two ends of adjacent electrode sheets on the two adjacent inner electrode layers are opposite to each other.

[0007] Among any two adjacent layers of inner electrodes in the plurality of layers of inner electrodes, only one layer has its two ends connected to the outer electrodes.

[0008] The four corners of the electrode sheet are all rounded.

[0009] The upper protective layer and the lower protective layer are both ceramic bodies.

[0010] The beneficial effects of the present invention are:

[0011] 1. The four corners of the electrode are rounded to improve the distribution of the electric field on the inner electrode under high voltage conditions, effectively preventing discharge at the capacitor tip;

[0012] 2. The two layers of inner electrodes form four capacitors connected in series, which share the voltage applied by the capacitor and effectively increase the capacitor's voltage resistance;

[0013] 3. The inner electrode is divided into two or more independent and separated inner electrode patterns, which effectively reduces the printing area of ​​the inner electrode, reduces the sintering stress of the capacitor, and increases the reliability of the capacitor. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a structural diagram of the utility model;

[0015] Figure 2 For the utility model Figure 1 Cross-section of the XOZ plane;

[0016] Figure 3 For the utility model Figure 1 The XOY cross-sectional view.

[0017] In the figure: 1-upper protective layer, 2-lower protective layer, 3-dielectric layer, 4-inner electrode, 5-outer electrode, 6-electrode fillet, 7-capacitor core. DETAILED DESCRIPTION

[0018] The technical solution of the present invention is further described below, but the scope of protection claimed is not limited to the described solution.

[0019] A high-reliability, low-ESL, high-voltage multilayer ceramic capacitor comprises an external electrode 5 and a capacitor core 7; the external electrode 5 is wrapped around opposite sides of the capacitor core, and the capacitor core 7 comprises several layers of internal electrodes 4 and dielectric layers 3, which are alternately stacked into a square block. The top and bottom of the square block are provided with an upper protective layer 1 and a lower protective layer 2, respectively. The internal electrode 4 comprises several flat electrode sheets, and adjacent layers of internal electrodes 4 are staggered. By staggering the multiple layers of internal electrodes and dielectric layers between two external electrodes 5, the edges of the adjacent electrode sheets of the adjacent two layers of internal electrodes 4 are relative to form a series capacitor, which shares the voltage applied to the capacitor and increases the capacitor's withstand voltage. The external electrode 5 is wrapped around both ends of the capacitor and is used to connect and lead out the internal electrode 4. The external electrode connects and leads out the capacitance formed by the adjacent two layers of internal electrodes in parallel, reducing the aspect ratio of the capacitor, shortening the current transmission path, and effectively reducing the capacitor's ESL.

[0020] like Figure 1 and Figure 2 As shown, a layer of inner electrode 4 includes three electrode sheets a, b, and c on the X0Z plane, and the inner electrode of the lower layer includes two electrode sheets c and e. The upper inner electrodes a, b, and c are staggered and opposite to the lower inner electrodes d and e, and the facing parts at both ends form four capacitors C1, C2, C3, and C4. The four capacitors are connected in series to share the voltage applied by the capacitors, effectively increasing the withstand voltage capability of the capacitors. The withstand voltage capability of the present invention can reach (2000V~10000V).

[0021] like Figure 3 As shown, the inner electrodes a, b, c, d and e adopt a split design in the XOY cross section. The inner electrodes are divided into two or more patterns of the same area. The patterns are independent and separated from each other, which effectively reduces the printing area of ​​the inner electrodes, reduces the sintering stress of the capacitor, and increases the reliability of the capacitor.

[0022] Among any two adjacent layers of the plurality of layers of inner electrodes 4 , only one layer has its two ends connected to the outer electrodes 5 .

[0023] The four corners of the electrode sheet are all rounded, which improves the distribution of the electric field on the inner electrode under high voltage conditions and effectively prevents discharge at the capacitor tip.

Claims

1. A high-reliability, low-ESL, high-voltage multilayer ceramic capacitor, comprising an outer electrode (5) and a capacitor core (7), characterized in that: Two outer electrodes (5) are respectively wrapped around opposite sides of a capacitor core (7); the capacitor core (7) comprises a plurality of layers of inner electrodes (4) and dielectric layers (3); the plurality of layers of inner electrodes (4) and dielectric layers (3) are alternately stacked to form a square block; an upper protective layer (1) and a lower protective layer (2) are respectively provided on the top and bottom of the square block; the inner electrode (4) comprises a plurality of flat electrode sheets; and two adjacent layers of inner electrodes (4) are staggered.

2. The high-reliability, low-ESL, high-voltage multilayer ceramic capacitor according to claim 1, wherein: The electrode sheets are printed in a square array on the dielectric layer (3), and the electrode sheets on the same column of two adjacent layers of inner electrodes (4) are arranged in a staggered manner, with the ends of adjacent electrode sheets on the two adjacent layers of inner electrodes (4) facing each other.

3. The high-reliability, low-ESL, high-voltage multilayer ceramic capacitor according to claim 2, wherein: Among any two adjacent layers of inner electrodes (4) in the plurality of layers of inner electrodes (4), only one layer has its two ends connected to the outer electrode (5).

4. The high-reliability, low-ESL, high-voltage multilayer ceramic capacitor according to claim 1, wherein: The four corners of the electrode sheet are all rounded.

5. The high-reliability, low-ESL, high-voltage multilayer ceramic capacitor according to claim 1, wherein: The upper protective layer (1) and the lower protective layer (2) are both ceramic bodies.

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