Multi-channel SD card test equipment

Abstract

The utility model provides a multichannel SD card test equipment relates to memory card test technical field, the equipment includes: power supply module, bridge expansion module and a plurality of SD card test branch, power supply module is respectively with bridge expansion module and each SD card test branch electrical connection, each SD card test branch electrical connection with bridge expansion module, the bridge expansion module is electrically connected with the bridge expansion module, the bridge expansion module is electrically connected with the plurality of SD card test branch electrical connection, the bridge expansion module is electrically connected with the plurality of SD card test branch electrical connection, and the bridge expansion module is electrically connected with the plurality of SD card test branch electrical connection. The bridging expansion module is also used for being connected with an upper computer; the SD card test branch comprises a main control module and an SD card assembly, the main control module is electrically connected with the bridging expansion module, and the SD card assembly is electrically connected with the main control module; the main control module comprises a main control chip, a debugging circuit, a program storage circuit, a reset circuit, a starting configuration circuit and a current sampling circuit. The main control chip is electrically connected with the debugging circuit, the program storage circuit, the reset circuit, the starting configuration circuit and the current sampling circuit. According to the utility model, multichannel SD card testing is realized, and the efficiency of SD card testing is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of memory card testing, in particular to a multi-channel SD card testing device. Background Art

[0002] Secure Digital card, also known as SD card, is a widely used storage medium with the advantages of being small, large capacity, and easy to use.

[0003] In the existing SD2.0 test system card activation and read / write tests, when processing large amounts of data, insufficient transmission capacity will occur, which will affect system performance and reduce mass production efficiency. Utility Model Content

[0004] In view of this, the purpose of the present invention is to provide a multi-channel SD card test device, which uses a bridge expansion module to achieve one-to-many multi-channel testing and improve test efficiency.

[0005] The present invention provides a multi-channel SD card test device, which includes a power supply module, a bridge expansion module, and multiple SD card test branches. The power supply module is electrically connected to the bridge expansion module and each SD card test branch respectively, and each SD card test branch is electrically connected to the bridge expansion module. The bridge expansion module is also used to connect to a host computer to receive test information sent by the host computer and send the test information to the SD card test branch.

[0006] The SD card test branch includes a main control module and an SD card assembly. The main control module is electrically connected to the bridge expansion module, and the SD card assembly is electrically connected to the main control module. The SD card assembly is used to place the SD card to be tested. The main control module is used to receive test information and test the SD card to be tested placed in the SD card assembly according to the test information.

[0007] The main control module includes a main control chip, a debugging circuit, a program storage circuit, a reset circuit, a startup configuration circuit and a current sampling circuit. The main control chip is electrically connected to the debugging circuit, the program storage circuit, the reset circuit, the startup configuration circuit and the current sampling circuit respectively.

[0008] In a preferred embodiment of the present utility model, the power supply module includes a main power supply circuit, a main control power supply circuit and an interface power supply circuit;

[0009] The main power supply circuit includes the MP2144GJ chip, the VIN pin of the MP2144GJ chip is connected to the external power supply, and the OUT pin of the MP2144GJ chip is electrically connected to the P12 pin, N14 pin, E6 pin, F5 pin, E9 pin, F10 pin and J10 pin in the main control chip;

[0010] The main control power supply circuit includes an RT9193-30GB chip. The VIN pin of the RT9193-30GB chip is connected to an external power supply, and the VOUT pin of the RT9193-30GB chip is used to electrically connect to the M9 pin, L1 pin, and K3 pin in the main control chip.

[0011] The interface power supply circuit includes an RT9193-18GB chip, the VIN pin of the RT9193-18GB chip is connected to an external power supply, and the VOUT pin of the RT9193-18GB chip is electrically connected to the pin of the SDIO interface in the main control chip;

[0012] The interface power supply circuit also includes an RT9193-33GB chip, a VIN pin of the RT9193-33GB chip is connected to an external power supply, and a VOUT pin of the RT9193-33GB chip is electrically connected to a pin of the SDIO interface in the main control chip.

[0013] In a preferred embodiment of the present invention, the power module also includes an SD card protection circuit, which includes a TCP16280A / B chip. The IN pin of the TCP16280A / B chip is electrically connected to the OUT pin of the MP2144GJ chip, and the OUT pin of the TCP16280A / B chip is electrically connected to the SD_VCC pin on the SD card assembly.

[0014] In a preferred embodiment of the present utility model, the power supply module also includes a surge protection circuit, which includes a first diode, a second diode, a third diode and a fourth diode, the cathode of the first diode and the cathode of the third diode are connected to the external power supply, the anode of the first diode is connected to the anode of the second diode, the anode of the third diode is connected to the anode of the fourth diode, and the cathode of the second diode and the cathode of the fourth diode are grounded.

[0015] In a preferred embodiment of the present invention, the debugging circuit includes a UART interface circuit, a JTAG burning interface circuit and a USB interface, and the debugging circuit is used to debug the program stored in the SPI FALSH.

[0016] Among them, the UART interface circuit includes the K14 pin of the main control chip, the L14 pin of the main control chip, a first resistor and a second resistor. The K14 pin of the main control chip and the first resistor are connected in series to the OUT pin of the MP2144GJ chip, and the L14 pin of the main control chip and the second resistor are connected in series to the OUT pin of the MP2144GJ chip.

[0017] The JTAG burning interface circuit includes a burning interface, a first voltage regulator diode, a second voltage regulator diode, a first NTS0101GW chip and a second NTS0101GW chip. Pin 5 of the burning interface is electrically connected to pin F14 of the main control chip, pin 7 of the burning interface is electrically connected to pin G13 of the main control chip, pin 4 of the burning interface is electrically connected to pin 4 of the NTS0101GW chip, pin 4 of the burning interface is electrically connected to pin 4 of the first NTS0101GW chip, pin 8 of the burning interface is electrically connected to pin 4 of the second NTS0101GW chip, pin 3 of the first NTS0101GW chip is electrically connected to E14 of the main control chip, and pin 3 of the second NTS0101GW chip is electrically connected to F12 of the main control chip.

[0018] In a preferred embodiment of the present invention, the program storage circuit includes an SPI FALSH memory, which is electrically connected to the FlexSPI interface on the main control chip. The FlexSPI interface includes an L3 pin, an L4 pin, a P3 pin, an N4 pin, a P4 pin, and a P5 pin.

[0019] In a preferred embodiment of the present utility model, the startup configuration circuit includes a third resistor, a fourth resistor, a fifth resistor and a sixth resistor, one end of the third resistor and the sixth resistor is electrically connected to the G14 pin of the main control chip, the other end of the third resistor is electrically connected to the OUT pin of the MP2144GJ chip, the other end of the sixth resistor is grounded, one end of the fourth resistor and the fifth resistor is electrically connected to the F11 pin of the main control chip, the other end of the fourth resistor is electrically connected to the OUT pin of the MP2144GJ chip, and the other end of the fifth resistor is grounded.

[0020] In a preferred embodiment of the present invention, the current sampling circuit includes a sampling resistor and an operational amplifier. One end of the sampling circuit is electrically connected to the SD_VCC pin on the SD card component and the positive input terminal of the operational amplifier. The other end of the sampling circuit is electrically connected to the negative input terminal of the operational amplifier. The output terminal of the operational amplifier is connected to the M13 pin of the main control chip.

[0021] In a preferred embodiment of the present invention, the bridge expansion module includes a bridge chip, the bridge chip includes an input interface and multiple output interfaces, the input interface is connected to the host computer through a USB connector, and the output interface is electrically connected to the USB interface, wherein the output interface corresponds one-to-one to the USB interface, and the USB interface includes the M8 pin and L8 pin of the main control chip.

[0022] In a preferred embodiment of the present invention, the bridge chip includes a first bridge chip and multiple second bridge chips, the first bridge chip includes a first input interface and multiple first output interfaces, the second bridge chip includes a second input interface and multiple second output interfaces, the first input interface is connected to the host computer through a USB connector, the first output interface is electrically connected to the corresponding second input interface, and the second output interface is electrically connected to the USB interface, wherein the second output interface corresponds one-to-one to the USB interface.

[0023] The embodiments of the present invention bring the following beneficial effects:

[0024] The embodiment of the utility model provides a multi-channel SD card testing device, which includes a power module, a bridge expansion module and multiple SD card test branches. The bridge expansion module is used to implement one-to-many multi-channel testing, thereby improving testing efficiency.

[0025] Other features and advantages of the present disclosure will be set forth in the following description, or some features and advantages may be inferred or unambiguously determined from the description, or may be learned by practicing the above-mentioned technology of the present disclosure.

[0026] In order to make the above-mentioned objectives, features and advantages of the present disclosure more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific implementation methods or the description of the prior art. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0028] Figure 1 A structural diagram of a multi-channel SD card testing device provided by an embodiment of the utility model;

[0029] Figure 2 A circuit diagram of a main power supply circuit provided in an embodiment of the present utility model;

[0030] Figure 3 A circuit diagram of an interface power supply circuit provided in an embodiment of the present utility model;

[0031] Figure 4 A circuit diagram of an SD card protection circuit provided by an embodiment of the present utility model;

[0032] Figure 5 A circuit diagram of a JTAG programming interface circuit provided by an embodiment of the present utility model;

[0033] Figure 6 This is a structural diagram of a bridge expansion module provided in an embodiment of the present utility model. DETAILED DESCRIPTION

[0034] To make the purpose, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0035] SD3.0 is a new SD protocol that supports higher transmission speeds and a wider capacity range than SD2.0. SD3.0 uses the exFAT (Extended File Allocation Table File System) file system, allowing single files to exceed 4GB in size. SD3.0 boasts a maximum transmission speed of 312MB / s, significantly improving data read and write efficiency and making it more suitable for applications handling large amounts of data. A USB hub, also known as a USB hub, uses a star topology to expand multiple USB interfaces. At its core, the USB hub is a bridge chip that, through hardware and software algorithms, can extend USB upstream port resources to USB downstream ports, effectively improving test efficiency in applications handling large amounts of data.

[0036] Based on this, an embodiment of the present utility model provides a multi-channel SD card testing device.

[0037] To facilitate understanding of this embodiment, a multi-channel SD card testing device disclosed in an embodiment of the present utility model is first introduced in detail.

[0038] Example 1

[0039] The present invention provides a multi-channel SD card testing device. Figure 1 This is a structural diagram of a multi-channel SD card test device provided by an embodiment of the present utility model. Figure 1 As shown, the multi-channel SD card test equipment may include the following structure:

[0040] A power supply module 101, a bridge expansion module 102, and multiple SD card test branches 103. The power supply module 101 is electrically connected to the bridge expansion module 102 and each SD card test branch 103, and each SD card test branch 103 is electrically connected to the bridge expansion module 102. The bridge expansion module 102 is also used to connect to the host computer 104 to receive test information issued by the host computer 104 and send the test information to the SD card test branch 103.

[0041] The SD card test branch 103 includes a main control module 1031 and an SD card assembly 1032. The main control module 1031 is electrically connected to the bridge expansion module 102, and the SD card assembly 1032 is electrically connected to the main control module 1031. The SD card assembly 1032 is used to place the SD card to be tested. The main control module 1031 is used to receive test information and test the SD card to be tested placed in the SD card assembly 1032 according to the test information.

[0042] The main control module 1031 includes a main control chip, a debugging circuit, a program storage circuit, a reset circuit, a startup configuration circuit and a current sampling circuit. The main control chip is electrically connected to the debugging circuit, the program storage circuit, the reset circuit, the startup configuration circuit and the current sampling circuit respectively.

[0043] The SD card assembly 1032 supports SD 3.0 protocol communication with the main control module, with a maximum transmission speed of 208 MB / s. The main control module 1031 supports USB 2.0 protocol communication with the bridge expansion module. The power module is used to provide power to the bridge expansion module 102 and the SD card test branch 103, that is, to provide power to the bridge expansion module 102, the main control module 1031, and the SD card assembly 1032.

[0044] The power module can include the main power supply circuit, main control power supply circuit, interface power supply circuit, SD card protection circuit and surge protection circuit:

[0045] Figure 2 This is a circuit diagram of a total power supply circuit provided by an embodiment of the present utility model. Figure 2As shown, the main power supply circuit includes the MP2144GJ chip. The VIN pin of the MP2144GJ chip is connected to a 5V external power supply. The OUT pin of the MP2144GJ chip is electrically connected to the P12 pin, N14 pin, E6 pin, F5 pin, E9 pin, F10 pin, and J10 pin in the main control chip. The output voltage signal is DCDC_3V3, that is, a 3.3V voltage. Among them, the P12 pin of the main control chip is used to provide the VDD_HIGH_IN_3V3 signal, that is, a high-level power supply signal, to the main control chip. The N14 pin of the main control chip provides voltage to the ADC (digital-to-analog converter) in the main control chip. The E6 pin, F5 pin, E9 pin, F10 pin, and J10 pin of the main control chip are used to provide voltage to the GPIO interface (General Purpose Input Output) of the main control chip to ensure the normal operation of the GPIO interface of the main control chip. The EN pin of the MP2144GJ chip is electrically connected to one end of the enable circuit, and the other end of the enable circuit is electrically connected to the K7 pin in the main control chip. The enable circuit includes an enable resistor R7 and an enable capacitor C33. One end of the enable resistor R7 is electrically connected to the K7 pin in the main control chip, and the other end of the enable resistor R7 is electrically connected to the EN pin of the MP2144GJ chip. One end of the enable capacitor C33 is electrically connected to the EN pin of the MP2144GJ chip, and the other end of the enable capacitor C33 is grounded. The K7 pin (PMIC_ON pin) in the main control chip is used to control the turning on and off of the main power supply circuit. Resistor R2 and light-emitting diode D2 are connected in series to the OUT pin of the MP2144GJ chip. Light-emitting diode D2 is used to indicate the working status of the main power supply circuit. When light-emitting diode D2 is on, it indicates that the main power supply circuit is working normally. When light-emitting diode D2 is off, it indicates that the main power supply circuit is not working or is working abnormally.

[0046] The main control power supply circuit includes an RT9193-30GB chip. The VIN pin of the RT9193-30GB chip is connected to an external power supply, and the VOUT pin of the RT9193-30GB chip is used to electrically connect the M9 pin, L1 pin, L2 pin, K4 pin, and K3 pin in the main control chip.

[0047] Figure 3 This is a circuit diagram of an interface power supply circuit provided by an embodiment of the present utility model. Figure 3As shown, the interface power supply circuit includes the RT9193-18GB chip. The VIN pin of the RT9193-18GB chip is connected to an external power supply, and the VOUT pin of the RT9193-18GB chip is electrically connected to the pin of the SDIO interface on the main control chip. The CE pin of the RT9193-18GB chip is electrically connected to the PG pin of the MP2144GJ chip. The SDIO interface refers to the interface in the GPIO interface of the main control chip that is used for signal connection with the SD card under test.

[0048] The interface power supply circuit also includes the RT9193-33GB chip. The RT9193-33GB chip's VIN pin is connected to an external power source, while the RT9193-33GB chip's VOUT pin is electrically connected to the SDIO interface pin on the main control chip. The RT9193-33GB chip's CE pin is electrically connected to the main control chip's C14 pin. Through the main control chip's C14 pin, the SD0_VSELECT signal can be used to control the SDIO interface to use the voltage output from the RT9193-33GB chip's VOUT pin or the RT9193-18GB chip's VOUT pin, thereby providing the required voltage for the SDIO interface according to actual conditions.

[0049] Figure 4 The circuit diagram of an SD card protection circuit provided by the embodiment of the present utility model is shown in FIG. Figure 4 As shown, the SD card protection circuit includes a TCP16280A / B chip. The IN pin of the TCP16280A / B chip is electrically connected to the OUT pin of the MP2144GJ chip, providing 3.3V to the TCP16280A / B chip. The OUT pin of the TCP16280A / B chip is electrically connected to the SD_VCC pin on the SD card assembly. A resistor R9 and a light-emitting diode D4 are connected in series to the OUT pin of the TCP16280A / B chip. LED D4 indicates the operating status of the SD card protection circuit. When LED D4 is on, the SD card protection circuit is operating normally. When LED D4 is off, the SD card protection circuit is not operating or is operating abnormally. The EN pin of the TCP16280A / B chip is electrically connected to the P2 pin of the main control chip. A resistor R19 with a resistance of 0 can be connected in series between the EN pin of the TCP16280A / B chip and the P2 pin of the main control chip. The P2 pin of the main control chip enables the power supply through the SD_PWR_EN signal, thereby realizing the power-off test of the SD card to be tested.

[0050] This embodiment of the utility model provides a power module: one MP2144GJ provides a 3.3V main power supply for the multi-channel SD test system; one RT9193-30GB provides power to the PMU of the main control chip; one RT9193-18GB provides power to the SDIO interface of the main control chip; and one RT9193-33GB provides optional power to the SDIO interface of the main control chip. This simplifies the power supply design of the main control module, allowing the power module to be powered by a single external 5V power supply. An SD card protection circuit is also provided for the SD card assembly, limiting the current to a maximum of 680mA. The power supply is enabled via the SD_PWR_EN signal, improving the safety of the SD card under test during testing.

[0051] The surge protection circuit includes a first diode, a second diode, a third diode, and a fourth diode. The cathodes of the first and third diodes are connected to an external power supply, the anode of the first and second diodes are connected, the anode of the third and fourth diodes are connected, and the cathodes of the second and fourth diodes are grounded. The surge protection circuit can clamp the voltage of the external power supply to a safe voltage of 5V when it exceeds a threshold, such as 6V. This protects the circuits of the multi-channel SD test equipment and improves the safety and stability of the equipment.

[0052] The debugging circuit includes UART interface circuit, JTAG burning interface circuit and USB interface;

[0053] The UART interface circuit includes the K14 and L14 pins of the main control chip, a first resistor, and a second resistor. The K14 and L14 pins of the main control chip are connected in series with the first resistor to the OUT pin of the MP2144GJ chip, and the L14 and L14 pins of the main control chip are connected in series with the second resistor to the OUT pin of the MP2144GJ chip. The first and second resistors are 10K resistors. The UART interface (Universal Asynchronous Receiver / Transmitter) is used to connect the host computer and the main control module to establish communication between the host computer and the main control module.

[0054] Figure 5 A circuit diagram of a JTAG programming interface circuit provided by an embodiment of the present utility model. Figure 5As shown, the JTAG programming interface circuit includes a programming interface, a first Zener diode D_TVS1, a second Zener diode D_TVS2, a first NTS0101GW chip, and a second NTS0101GW chip. Pin 1 of the programming interface is connected to the cathode of the first Zener diode, while the anode of the first Zener diode is connected to the reset circuit, specifically pin M7 of the main control chip, for receiving the reset signal, namely the POR_B signal. Pin 2 of the programming interface is connected to the cathode of the second Zener diode, while the anode of the second Zener diode is connected to the OUT pin of the MP2144GJ chip. Pin 2 of the programming interface is also electrically connected to the VCCB pin of the first NTS0101GW chip and the VCCB pin of the second NTS0101GW chip. Pin 5 of the programming interface is electrically connected to pin F14 of the main control chip, transmitting the JTAJ_TDO signal to the main control chip. Pin 7 of the programming interface is electrically connected to pin G13 of the main control chip, receiving the JTAJ_TDI signal from the main control chip. Pin 4 of the programming interface is electrically connected to pin 4 of the first NTS0101GW chip, and pin 8 of the programming interface is electrically connected to pin 4 of the second NTS0101GW chip. Pin 3 of the first NTS0101GW chip is electrically connected to pin E14 of the main control chip, sending the JTAJ_TMS_MCU signal to the main control chip. Pin 3 of the second NTS0101GW chip is electrically connected to pin F12 of the main control chip, sending the JTAJ_TCK_MCU signal to the main control chip. The JTAG interface allows connection to an external device, which can be used to store programs used for SD card testing, including read and write test programs and cycle aging test programs, in the program storage circuit in the main control module.

[0055] The program storage circuit includes an SPI FALSH memory, which is electrically connected to the FlexSPI interface on the main control chip. The FlexSPI interface includes pins L3, L4, P3, N4, P4, and P5. The SPI FALSH memory can pre-store programs for testing SD cards, including read-write test programs and cycle aging test programs. It can also store the input current of the SD card component obtained by the current sampling circuit. The SPI FALSH can be used as both program memory and data memory. Specifically, it can store read-write test programs and cycle aging test programs, as well as the input current of the SD card component collected by the current sampling circuit.

[0056] The reset circuit consists of a 10K capacitor and a 10µF resistor in series, connected midway between the capacitor and resistor to pin M7 of the main control chip. Pin M7 of the main control chip receives the reset signal, also known as the POR_B signal. The other end of the capacitor is grounded, and the other end of the resistor is connected to the power module, which provides 3.3V. This reset circuit provides a reset time of more than 30µs for the main control chip.

[0057] The startup configuration circuit includes a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor. One end of the third and sixth resistors is electrically connected to the G14 pin of the main control chip, the other end of the third resistor is electrically connected to the OUT pin of the MP2144GJ chip, and the other end of the sixth resistor is grounded. One end of the fourth and fifth resistors is electrically connected to the F11 pin of the main control chip, the other end of the fourth resistor is electrically connected to the OUT pin of the MP2144GJ chip, and the other end of the fifth resistor is grounded. The startup configuration circuit is used to configure the startup of the main control chip.

[0058] The current sampling circuit includes a sampling resistor and an operational amplifier. One end of the sampling resistor is electrically connected to the SD_VCC pin on the SD card component and the positive input of the operational amplifier, where the SD_VCC pin provides voltage for the circuit sampling circuit. The other end of the sampling resistor is electrically connected to the negative input of the operational amplifier, and the output of the operational amplifier is connected to the M13 pin of the main control chip. The current sampling circuit inputs the voltage across the sampling resistor into the operational amplifier. The operational amplifier amplifies the difference between the voltages across the sampling resistor by 20 times, outputs the amplified voltage from the output of the operational amplifier, and inputs the amplified voltage into the main control chip for sampling by the ADC (digital-to-analog converter) in the main control chip. The current sampling circuit supports a maximum sampling current of 1.65A and a sampling accuracy of 400uA.

[0059] The bridge expansion module includes a bridge chip, which includes an input interface and multiple output interfaces. The input interface is connected to the host computer via a USB connector, and the output interface is electrically connected to the USB interface. The output interface corresponds one-to-one with the USB interface, and the USB interface includes the M8 pin and the L8 pin of the main control chip. Exemplarily, in the present invention, the bridge chip is a USB HUB bridge chip, which has one input interface and four output interfaces. The input interface is connected to the host computer via a USB connector, and the four output interfaces are respectively connected to the USB interfaces in the four main control modules to form four SD card test branches.

[0060] Figure 6 This is a structural diagram of a bridge expansion module provided by an embodiment of the present utility model. Figure 6As shown, the bridge chip includes a first bridge chip and multiple second bridge chips, wherein the first bridge chip is bridge chip 1, and the second bridge chip includes bridge chip 2 and bridge chip 3. The first bridge chip includes a first input interface and multiple first output interfaces, wherein the first output interface of bridge chip 1 includes 1USB1, 1USB2, 1USB3, and 1USB4. The second bridge chip includes a second input interface and multiple second output interfaces. Among them, the second output interface of bridge chip 2 includes 2USB1, 2USB2, 2USB3, and 2USB4, and the second output interface of bridge chip 3 includes 3USB1, 3USB2, 3USB3, and 3USB4. The first input interface is connected to the host computer via a USB connector. The first output interface is electrically connected to the corresponding second input interface, wherein 1USB1 is connected to the second input interface of bridge chip 2, 1USB2 is connected to the second input interface of bridge chip 3, and 1USB3 and 1USB4 can be used as reserved interfaces to connect new bridge chips to form more SD card test branches. The second output interface is electrically connected to the USB interface, wherein the second output interface corresponds to the USB interface one-to-one, that is, 2USB1, 2USB2, 2USB3, 2USB4, 3USB1, 3USB2, 3USB3 and 3USB4 are respectively connected to a main control module, forming a total of 8 SD card test branches. The 8 SD card test branches can test 8 SD cards at the same time and feed back the test results to the host computer, thereby realizing batch testing of SD cards and improving the testing efficiency of SD cards.

[0061] In the embodiment of the present utility model, the working principle of the multi-channel SD card test device is as follows:

[0062] S1: The host computer determines whether there is an SD card to be tested inserted into the SD card component.

[0063] It is understood that when an SD card to be tested is inserted into the SD card assembly, the GPIO (general purpose input / output) pin can be used to monitor changes in the pin level of the SD card assembly to determine whether the SD card to be tested is inserted into the SD card assembly. For example, after the SD card is inserted into the SD card assembly, the GPIO pin detects that the pin level of the SD card assembly changes from a low level to a high level.

[0064] S2: After detecting that the SD card to be tested is inserted, the host computer sends the test information to the main control module in each SD card test branch through the bridge expansion module.

[0065] S3: After receiving the test information, the main control module performs a card opening operation on the SD card to be tested, that is, initializes the SD card to be tested. After the initialization is completed, it enters S4 and S6.

[0066] S4: The main control module runs the read and write test program and performs SD3.0 read and write tests on the SD card. If the test passes, it enters S5. If the test fails, it enters S8.

[0067] S5: The main control module runs the cycle aging test program to perform a cycle aging copy test on the SD card. If the test passes, it enters S6. If the test fails, it enters S8.

[0068] S6: The main control module uses the current sampling circuit to randomly obtain the input current of the SD card component. When the input current is within the current threshold range, the test passes and enters S8. When the input current is outside the current threshold range, the test fails and enters S7.

[0069] S7: The main control module generates an error log and uploads it to the host computer through the bridge expansion module.

[0070] S8: After the test is completed, the main control module generates a test pass log and uploads it to the host computer through the bridge expansion module.

[0071] The multi-channel SD card test equipment provided by the present invention supports the SD 3.0 protocol and utilizes multiple channels to test multiple SD cards simultaneously, improving the efficiency of SD card testing. During the test process, it can support random sampling of the input current of the SD card components and record abnormal current during the test, thereby improving the stability and accuracy of the test equipment.

[0072] Units described as separate components may or may not be physically separate, and components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0073] Finally, it should be noted that the above embodiments are only specific implementation methods of the present invention, which are used to illustrate the technical solutions of the present invention, rather than to limit them. The protection scope of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that any person skilled in the art can modify or easily conceive of changes to the technical solutions described in the above embodiments within the technical scope disclosed by the present invention, or replace some of the technical features therein with equivalents. Such modifications, changes, or replacements do not deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A multi-channel SD card testing device, characterized in that: The device includes a power module, a bridge expansion module, and multiple SD card test branches, wherein the power module is electrically connected to the bridge expansion module and each of the SD card test branches, and each of the SD card test branches is electrically connected to the bridge expansion module. The bridge expansion module is further used to connect to a host computer to receive test information issued by the host computer and send the test information to the SD card test branch. The SD card test branch includes a main control module and an SD card assembly, the main control module is electrically connected to the bridge expansion module, the SD card assembly is electrically connected to the main control module, the SD card assembly is used to place the SD card to be tested, and the main control module is used to receive the test information and test the SD card to be tested placed in the SD card assembly according to the test information; The main control module includes a main control chip, a debugging circuit, a program storage circuit, a reset circuit, a startup configuration circuit and a current sampling circuit. The main control chip is electrically connected to the debugging circuit, the program storage circuit, the reset circuit, the startup configuration circuit and the current sampling circuit respectively.

2. The device according to claim 1, characterized in that The power supply module includes a main power supply circuit, a main control power supply circuit and an interface power supply circuit; The main power supply circuit includes an MP2144GJ chip, the VIN pin of the MP2144GJ chip is connected to an external power supply, and the OUT pin of the MP2144GJ chip is electrically connected to the P12 pin, N14 pin, E6 pin, F5 pin, E9 pin, F10 pin and J10 pin in the main control chip; The main control power supply circuit includes an RT9193-30GB chip, the VIN pin of the RT9193-30GB chip is connected to an external power supply, and the VOUT pin of the RT9193-30GB chip is used to electrically connect the M9 pin, L1 pin, and K3 pin in the main control chip; The interface power supply circuit includes an RT9193-18GB chip, a VIN pin of the RT9193-18GB chip is connected to an external power supply, and a VOUT pin of the RT9193-18GB chip is electrically connected to a pin of the SDIO interface in the main control chip; The interface power supply circuit also includes an RT9193-33GB chip, a VIN pin of the RT9193-33GB chip is connected to an external power supply, and a VOUT pin of the RT9193-33GB chip is electrically connected to a pin of the SDIO interface in the main control chip.

3. The device according to claim 2, characterized in that The power module also includes an SD card protection circuit, which includes a TCP16280A / B chip. The IN pin of the TCP16280A / B chip is electrically connected to the OUT pin of the MP2144GJ chip, and the OUT pin of the TCP16280A / B chip is electrically connected to the SD_VCC pin on the SD card assembly.

4. The device according to claim 2, characterized in that The power supply module also includes a surge protection circuit, which includes a first diode, a second diode, a third diode and a fourth diode, wherein the cathode of the first diode and the cathode of the third diode are connected to the external power supply, the anode of the first diode and the anode of the second diode are connected, the anode of the third diode and the anode of the fourth diode are connected, and the cathode of the second diode and the cathode of the fourth diode are grounded.

5. The device according to claim 2, characterized in that The debugging circuit includes a UART interface circuit, a JTAG burning interface circuit and a USB interface; The UART interface circuit includes the K14 pin of the main control chip, the L14 pin of the main control chip, a first resistor, and a second resistor. The K14 pin of the main control chip and the first resistor are connected in series to the OUT pin of the MP2144GJ chip. The L14 pin of the main control chip and the second resistor are connected in series to the OUT pin of the MP2144GJ chip. The JTAG burning interface circuit includes a burning interface, a first voltage regulator diode, a second voltage regulator diode, a first NTS0101GW chip and a second NTS0101GW chip. Pin 5 of the burning interface is electrically connected to pin F14 of the main control chip, pin 7 of the burning interface is electrically connected to pin G13 of the main control chip, pin 4 of the burning interface is electrically connected to pin 4 of the NTS0101GW chip, pin 4 of the burning interface is electrically connected to pin 4 of the first NTS0101GW chip, pin 8 of the burning interface is electrically connected to pin 4 of the second NTS0101GW chip, pin 3 of the first NTS0101GW chip is electrically connected to E14 of the main control chip, and pin 3 of the second NTS0101GW chip is electrically connected to F12 of the main control chip.

6. The device according to claim 2, characterized in that The program storage circuit includes a SPIFALSH memory, which is electrically connected to the FlexSPI interface on the main control chip. The FlexSPI interface includes an L3 pin, an L4 pin, a P3 pin, an N4 pin, a P4 pin, and a P5 pin.

7. The device according to claim 2, characterized in that The startup configuration circuit includes a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor. One end of the third resistor and the sixth resistor is electrically connected to the G14 pin of the main control chip, the other end of the third resistor is electrically connected to the OUT pin of the MP2144GJ chip, the other end of the sixth resistor is grounded, one end of the fourth resistor and the fifth resistor is electrically connected to the F11 pin of the main control chip, the other end of the fourth resistor is electrically connected to the OUT pin of the MP2144GJ chip, and the other end of the fifth resistor is grounded.

8. The device according to claim 2, characterized in that The current sampling circuit includes a sampling resistor and an operational amplifier. One end of the sampling circuit is electrically connected to the SD_VCC pin on the SD card assembly and the positive input end of the operational amplifier. The other end of the sampling circuit is electrically connected to the negative input end of the operational amplifier. The output end of the operational amplifier is connected to the M13 pin of the main control chip.

9. The device according to claim 5, characterized in that The bridge expansion module includes a bridge chip, which includes an input interface and multiple output interfaces. The input interface is connected to the host computer through a USB connector, and the output interface is electrically connected to the USB interface. The output interface corresponds one-to-one with the USB interface, and the USB interface includes the M8 pin and L8 pin of the main control chip.

10. The device according to claim 9, characterized in that The bridge chip includes a first bridge chip and multiple second bridge chips, the first bridge chip includes a first input interface and multiple first output interfaces, the second bridge chip includes a second input interface and multiple second output interfaces, the first input interface is connected to the host computer through the USB connector, the first output interface is electrically connected to the corresponding second input interface, and the second output interface is electrically connected to the USB interface, wherein the second output interface corresponds to the USB interface one-to-one.

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