Voltage regulation circuit, phase-locked loop circuit and electronic equipment

Abstract

The utility model provides a voltage regulation circuit, a phase-locked loop circuit and electronic equipment, the voltage regulation circuit is connected with an oscillator, the oscillator is configured to output a first signal, and the voltage regulation circuit comprises a loop filtering module and a charging and discharging module. Wherein the loop filtering module is connected with the oscillator, the loop filtering module is configured to output a second signal, and the voltage of the second signal is used for adjusting the current frequency of the first signal; and the charging and discharging module is connected with the loop filtering module and the control module, and the charging and discharging module is configured to charge or discharge a target capacitor in the loop filtering module according to the current frequency and the target frequency of the first signal so as to adjust the voltage of the second signal. According to the mode, the current frequency of the first signal is adjusted through the charging and discharging module, so that the frequency of the first signal quickly reaches the target frequency from the current frequency, and the locking time is effectively shortened.

Description

Technical Field

[0001] The present application relates to the field of electronic circuits, and in particular to voltage regulation circuits, phase-locked loop circuits, and electronic equipment. Background Art

[0002] A PLL (Phase-Locked Loop) includes an oscillator. The locked state of the PLL is a key stage in its operation. When the current frequency of the oscillator is inconsistent with the frequency of the reference signal (target signal), the oscillator will adjust the current frequency according to the frequency of the reference signal until the two frequencies match and the phase is locked. The time required to reach the phase lock state from the current frequency is the lock time.

[0003] Reducing the lock time allows the PLL to more quickly synchronize the output signal's frequency and phase with the reference signal, significantly improving system response speed, enhancing system performance, supporting complex application scenarios, and reducing power consumption. Existing methods for reducing lock time require multiple switching devices and control levels, resulting in large circuit space and high cost. Utility Model Content

[0004] To solve the above problems, the present application provides a voltage regulation circuit, a phase-locked loop circuit and an electronic device, which can effectively reduce the locking time through a small and simple circuit.

[0005] A technical solution adopted in the present application is: providing a voltage regulation circuit, which is connected to an oscillator, and the oscillator is configured to output a first signal. The voltage regulation circuit includes: a loop filter module, connected to the oscillator, the loop filter module is configured to output a second signal, and the voltage of the second signal is used to adjust the current frequency of the first signal; a charge and discharge module, connected to the loop filter module, and the charge and discharge module is configured to charge or discharge the target capacitor in the loop filter module according to the current frequency of the first signal and the target frequency to adjust the voltage of the second signal.

[0006] In one embodiment, the voltage regulation circuit further includes a control module configured to output a control signal according to a current frequency of the first signal and a target frequency.

[0007] In one embodiment, the charge and discharge module includes: a charging switch connected to the loop filter module and the control module, and the charging and discharge module is configured to charge the target capacitor in the loop filter module according to the control signal when the charging switch is turned on; and a discharging switch connected to the loop filter module and the control module, and the charging and discharge module is configured to discharge the target capacitor in the loop filter module according to the control signal when the discharging switch is turned on.

[0008] In one embodiment, the control module is further configured to control the on-time of the charging switch and the discharging switch according to the control signal.

[0009] In one embodiment, the charge and discharge module further includes: a first resistor, wherein the first end of the first resistor is connected to the first output end of the charging switch, and the second end of the first resistor is connected to the first end of the target capacitor; a second resistor, wherein the first end of the second resistor is connected to the second output end of the charging switch; and a diode, wherein the cathode of the diode is connected to the second end of the second resistor, and the anode of the diode is connected to the power supply end of the charging switch.

[0010] In one embodiment, the charge and discharge module further includes: a third resistor, wherein a first end of the third resistor is connected to a first end of the discharge switch, and a second end of the third resistor is connected to a first end of the target capacitor; a fourth resistor, wherein a first end of the fourth resistor is connected to a second end of the discharge switch, and a second end of the fourth resistor is grounded; and a fifth resistor, wherein a first end of the fifth resistor is connected to a control end of the discharge switch, and a second end of the fifth resistor is connected to the control module.

[0011] In one embodiment, the charge and discharge module further includes: a first capacitor, wherein a first end of the first capacitor is connected to the anode of the diode, and a second end of the first capacitor is grounded; a second capacitor, wherein a first end of the second capacitor is connected to the power supply end of the charging switch, and a second end of the second capacitor is grounded; and a third capacitor, wherein a first end of the third capacitor is connected to the control end of the charging switch and the control module, and a second end of the third capacitor is grounded.

[0012] In one embodiment, the charge and discharge module further includes: a fourth capacitor, a first end of the fourth capacitor is connected to the second end of the fifth resistor, and a second end of the fourth capacitor is grounded.

[0013] In one embodiment, the target capacitance is the maximum capacitance in the loop filter module.

[0014] In one embodiment, the voltage regulation circuit further includes: a current regulation module connected to the loop filtering module, the current regulation module is configured to output a third signal, and the loop filtering module regulates the voltage of the second signal according to the third signal.

[0015] Another technical solution adopted in the present application is: providing a phase-locked loop circuit, which includes: an oscillator; a voltage regulation module connected to the oscillator, and the voltage regulation module includes the voltage regulation circuit as described above.

[0016] Another technical solution adopted in the present application is to provide an electronic device, which includes the voltage regulation circuit as described above, or includes the phase-locked loop circuit as described above.

[0017] A technical solution adopted in the present application is: providing a voltage regulation circuit, the voltage regulation circuit is connected to an oscillator, the oscillator is configured to output a first signal, the voltage regulation circuit includes: a loop filter module, connected to the oscillator, the loop filter module is configured to output a second signal, the voltage of the second signal is used to adjust the current frequency of the first signal; a charge and discharge module, connected to the loop filter module, the charge and discharge module is configured to charge or discharge the target capacitor in the loop filter module according to the current frequency and target frequency of the first signal to adjust the voltage of the second signal. In this way, the current frequency of the first signal of the oscillator output signal is adjusted by the charge and discharge module, so that the frequency of the first signal quickly reaches the target frequency from the current frequency, thereby effectively reducing the locking time. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0019] in:

[0020] Figure 1 is a structural diagram of a first embodiment of a voltage regulation circuit provided by the present application;

[0021] Figure 2 is a structural diagram of a second embodiment of a voltage regulation circuit provided by the present application;

[0022] Figure 3 is a structural diagram of a third embodiment of a voltage regulation circuit provided by the present application;

[0023] Figure 4 1 is a schematic structural diagram of an embodiment of a phase-locked loop circuit provided by the present application;

[0024] Figure 5 is a structural diagram of a first embodiment of an electronic device provided by this application;

[0025] Figure 6 It is a structural diagram of the second embodiment of the electronic device provided by this application. DETAILED DESCRIPTION

[0026] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It will be understood that the specific embodiments described herein are only used to explain the present application, rather than to limit the present application. It should also be noted that, for ease of description, only some, rather than all, structures related to the present application are shown in the drawings. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0027] The terms "first," "second," and the like in this application are used to distinguish between different objects, not to describe a particular order. Furthermore, the terms "including," "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements, but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0028] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0029] See Figure 1 , Figure 1 1 is a schematic diagram of the structure of the first embodiment of the voltage regulation circuit provided by the present application. The voltage regulation circuit 100 is connected to an oscillator, which is configured to output a first signal S1. The voltage regulation circuit 100 includes a loop filter module 10 and a charge-discharge module 20.

[0030] Among them, the loop filter module 10 is connected to the oscillator, and the loop filter module 10 is configured to output the second signal S2, and the voltage of the second signal S2 is used to adjust the current frequency of the first signal S1; the charge and discharge module 20 is connected to the loop filter module 10, and the charge and discharge module 20 is configured to charge or discharge the target capacitor C in the loop filter module 10 according to the current frequency and target frequency of the first signal S1 to adjust the voltage of the second signal S2.

[0031] Specifically, the oscillator is a VCO (Voltage Controlled Oscillator). The VCO outputs a variable-frequency oscillation signal whose frequency can be continuously adjusted based on changes in the input voltage. For example, as the input voltage increases, the VCO's output frequency increases; conversely, as the input voltage decreases, the output frequency decreases accordingly.

[0032] In one embodiment, the oscillator outputs a first signal S1, and the loop filter module 10 outputs a second signal S2. The second signal S2 is the input voltage of the oscillator. That is, the voltage of the second signal S2 is used to adjust the current frequency of the first signal S1. When the voltage of the second signal S2 increases, the frequency of the first signal S1 increases, and vice versa, the frequency of the first signal S1 decreases.

[0033] Specifically, the target capacitor C is the capacitor with the largest capacitance in the loop filter module 10, and the voltage of the second signal S2 output by the loop filter module 10 changes with the voltage on the target capacitor C. The voltage on the target capacitor C is adjusted by charging and discharging, thereby adjusting the voltage of the second signal S2.

[0034] In one embodiment, when the current frequency of the first signal S1 is lower than the target frequency (i.e., the frequency of the first signal S1 needs to be increased), the charge-discharge module 20 charges the target capacitor C, the voltage on the target capacitor C increases, and the voltage of the second signal S2 increases accordingly, so that the current frequency of the first signal S1 increases accordingly; or

[0035] When the current frequency of the first signal S1 is greater than the target frequency (i.e., the frequency of the first signal S1 needs to be reduced), the charge and discharge module 20 discharges the target capacitor C, the voltage on the target capacitor C decreases, and the voltage of the second signal S2 decreases accordingly, so that the current frequency of the first signal S1 decreases accordingly.

[0036] It can be understood that the voltage regulation circuit 100 uses the charging and discharging module 20 as the core module, and charges and discharges the target capacitor C in the loop filter module 10 through the charging and discharging module 20 to change the voltage of the second signal S2, so that the first signal S1 can quickly adjust the frequency under the regulation of the second signal S2, thereby reducing the locking time.

[0037] Combine Figure 2 , Figure 2 1 is a schematic diagram of the structure of the second embodiment of the voltage regulation circuit provided by the present application. The voltage regulation circuit 100 is connected to an oscillator, which is configured to output a first signal S1. The voltage regulation circuit 100 includes a loop filter module 10 and a charge-discharge module 20.

[0038] Among them, the loop filter module 10 is connected to the oscillator, and the loop filter module 10 is configured to output the second signal S2, and the voltage of the second signal S2 is used to adjust the current frequency of the first signal S1; the charge and discharge module 20 is connected to the loop filter module 10, and the charge and discharge module 20 is configured to charge or discharge the target capacitor C in the loop filter module 10 according to the current frequency and target frequency of the first signal S1 to adjust the voltage of the second signal S2.

[0039] In some embodiments, the voltage regulation circuit 100 further includes a control module 30 , which is configured to output a control signal CTRL according to the current frequency and the target frequency of the first signal S1 to control the on-time of the charging switch and the discharging switch.

[0040] In one embodiment, the control module 30 is configured to output the first control signal CTRL1 when the current frequency of the first signal S1 is less than the target frequency (i.e., the frequency of the first signal S1 needs to be increased), and at this time, the charge and discharge module 20 charges the target capacitor C according to the first control signal CTRL1, and the voltage on the target capacitor C increases, and the voltage of the second signal S2 increases accordingly, so that the current frequency of the first signal S1 increases accordingly; or when the current frequency of the first signal S1 is greater than the target frequency (i.e., the frequency of the first signal S1 needs to be reduced), output the second control signal CTRL2, and at this time, the charge and discharge module 20 discharges the target capacitor C according to the second control signal CTRL2, and the voltage on the target capacitor C decreases, and the voltage of the second signal S2 decreases accordingly, so that the current frequency of the first signal S1 decreases accordingly.

[0041] In some embodiments, the charge-discharge module 20 includes a charging switch U and a discharging switch Q. The charging switch U is connected to the loop filter module 10 and the control module 30. The charging and discharging module 20 is configured to charge the target capacitance C in the loop filter module 10 when the charging switch U is turned on. The discharging switch Q is connected to the loop filter module 10 and the control module 30. The charging and discharging module 20 is configured to discharge the target capacitance C in the loop filter module 10 when the discharging switch Q is turned on.

[0042] Among them, the control module 30 is configured to output a control signal CTRL according to the current frequency and target frequency of the first signal S1, and control the conduction time of the charging switch U and the discharging switch Q through the control signal CTRL; the charging and discharging module 20 is connected to the loop filter module 10 and the control module 30, and the charging and discharging module 20 is configured to charge or discharge the target capacitor C in the loop filter module 10 according to the control signal CTRL to adjust the voltage of the second signal S2.

[0043] Exemplarily, the charging switch U can be a switch chip, specifically a single-channel analog switch chip, which contains a single-pole single-throw switch. The connection state of the switch is switched by an input control signal (usually a digital signal). For example, when the input control signal is high, the switch is closed, and when the control signal is low, the switch is open. The discharge switch Q can be a MOS transistor, specifically an NMOS transistor, and its working state is controlled by the gate (i.e., control terminal) voltage signal of the NMOS transistor. When the gate voltage signal is high, the NMOS transistor is in the on state, and when the gate voltage signal is low, the NMOS transistor is in the off state. In other embodiments, the discharge switch Q can also be a semiconductor device such as a PMOS tube, a triode, etc., which are not listed here one by one.

[0044] In some embodiments, the charge and discharge module 20 further includes: a first resistor R1, a second resistor R2, and a diode D. A first end of the first resistor R1 is connected to a first output terminal NO of the charging switch U, and a second end of the first resistor R1 is connected to a first end of the target capacitor C; a first end of the second resistor R2 is connected to a second output terminal COM of the charging switch U; a cathode of the diode D is connected to the second end of the second resistor R2, and an anode of the diode D is connected to a power supply terminal V+ of the charging switch U.

[0045] In some embodiments, the charge-discharge module 20 further includes: a first capacitor C1, a second capacitor C2, and a third capacitor C3. A first end of the first capacitor C1 is connected to the anode of the diode D, and a second end of the first capacitor C1 is grounded; a first end of the second capacitor C2 is connected to the power supply terminal V+ of the charging switch U, and a second end of the second capacitor C2 is grounded; a first end of the third capacitor C3 is connected to the control terminal IN of the charging switch U and the control module 30, and a second end of the third capacitor C3 is grounded.

[0046] In some embodiments, the charge and discharge module 20 further includes a magnetic bead F, a first end of which is configured to input a power supply voltage, and a second end of which is connected to the anode of the first capacitor C1 and the power supply terminal V+ of the charging switch U.

[0047] Exemplarily, the first control signal CTRL1 output by the control module 30 is input to the control terminal IN of the charging switch U. When the first control signal CTRL1 is at a high level, the charging switch U is turned on, and the power supply voltage charges the target capacitor C through the charging switch U and the first resistor R1; when the first control signal CTRL1 is at a low level, the charging switch U is disconnected and stops charging the target capacitor C.

[0048] In some embodiments, the charge-discharge module 20 further includes: a third resistor R3, a fourth resistor R4, and a fifth resistor R5. A first end of the third resistor R3 is connected to the first end of the discharge switch Q, and a second end of the third resistor R3 is connected to the first end of the target capacitor C; a first end of the fourth resistor R4 is connected to the second end of the discharge switch Q, and a second end of the fourth resistor R4 is grounded; a first end of the fifth resistor R5 is connected to the control end of the discharge switch Q, and a second end of the fifth resistor R5 is connected to the control module 30.

[0049] In some embodiments, the charge and discharge module 20 further includes: a fourth capacitor C4 , a first end of the fourth capacitor C4 is connected to the second end of the fifth resistor R5 , and a second end of the fourth capacitor C4 is grounded.

[0050] Exemplarily, the second control signal CTRL2 output by the control module 30 is input to the control end of the discharge switch Q through the fifth resistor R5. When the second control signal CTRL2 is at a high level, the discharge switch Q is turned on, and the target capacitor C starts to discharge through the discharge switch Q, the third resistor R3 and the fourth resistor R4; when the second control signal CTRL2 is at a low level, the discharge switch Q is turned off, and discharging the target capacitor C stops.

[0051] It can be understood that by controlling the time that the first control signal CTRL1 and the second control signal CTRL2 maintain a high level, the on-time of the charging switch U and the discharging switch Q can be controlled, thereby controlling the charging time and discharging time of the target capacitor C, thereby reducing the lock-in time. For example, when the current frequency of the first signal S1 is lower than the target frequency, by extending the on-time of the charging switch U, the voltage on the target capacitor C is quickly increased to the target voltage, and the voltage of the second signal S2 is also increased, thereby causing the frequency of the first signal S1 to quickly increase to the target frequency. The time it takes for the first signal S1 to increase to the target frequency is shortened, which reduces the lock-in time.

[0052] See Figure 3 , Figure 2 1 is a schematic diagram of the structure of the second embodiment of the voltage regulation circuit provided by the present application. The voltage regulation circuit 100 is connected to an oscillator, which is configured to output a first signal S1. The voltage regulation circuit 100 includes a loop filter module 10 and a charge-discharge module 20.

[0053] Among them, the loop filter module 10 is connected to the oscillator, and the loop filter module 10 is configured to output the second signal S2, and the voltage of the second signal S2 is used to adjust the current frequency of the first signal S1; the charge and discharge module 20 is connected to the loop filter module 10, and the charge and discharge module 20 is configured to charge or discharge the target capacitor C in the loop filter module 10 according to the current frequency and target frequency of the first signal S1 to adjust the voltage of the second signal S2.

[0054] Figure 3 The voltage regulation circuit 100 shown is Figure 2 The main difference of the voltage regulation circuit 100 shown is that the components added to the loop filter module 10 and the current regulation module 40 are added. Therefore, the following mainly describes the components added to the loop filter module 10 and the current regulation module 40. For other components in the voltage regulation circuit 100, please refer to Figure 2 The relevant description of the illustrated embodiment will not be repeated here.

[0055] In some embodiments, the voltage regulation circuit 100 further includes a current regulation module 40. The current regulation module 40 is connected to the loop filter module 10. The current regulation module 40 is configured to output a third signal S3. The loop filter module 10 is configured to regulate the voltage of the second signal S2 based on the third signal S3. In one embodiment, the current regulation module 40 may be a charge pump.

[0056] Exemplarily, the voltage of the second signal S2 output by the loop filter module 10 is adjusted by adjusting the voltage on the target capacitor C, but this adjustment method cannot obtain more accurate results. The third signal S3 is a current signal, which is used to fine-tune the voltage of the second signal S2. For example, when the current frequency of the first signal S1 needs to be increased, the target capacitor C needs to be charged so that the voltage of the second signal S2 reaches a preset voltage value. Assuming that the preset voltage is 5.2V, when the target capacitor C is charged to 5V, the third signal S3 can be used to make a slight adjustment to adjust the voltage of the second signal S2 to 5.2V. In this way, the voltage of the second signal S2 can be accurately adjusted, thereby accurately adjusting the frequency of the first signal S1.

[0057] In some embodiments, the loop filter module 10 includes: a fifth capacitor C5, a sixth capacitor C6, a sixth resistor R6, a seventh resistor R7, a seventh capacitor C7, and an eighth capacitor C8. The first end of the fifth capacitor C5 is connected to the current regulation module 40, and the second end of the fifth capacitor C5 is grounded; the first end of the sixth capacitor C6 is connected to the first end of the fifth capacitor C5; the first end of the sixth resistor R6 is connected to the first end of the sixth capacitor C6, and the second end of the sixth resistor R6 is connected to the second end of the sixth capacitor C6; the first end of the seventh resistor R7 is connected to the second end of the sixth resistor R6, and the second end of the seventh resistor R7 is connected to the first end of the target capacitor C; the first end of the seventh capacitor C7 is connected to the first end of the target capacitor C, and the second end of the seventh capacitor C7 is grounded; the first end of the eighth capacitor C8 is connected to the first end of the target capacitor C, and the second end of the eighth capacitor C8 is grounded.

[0058] In some embodiments, the loop filter module 10 further includes: an eighth resistor R8, a ninth resistor R9, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a tenth resistor R10, an eleventh resistor R11, and a twelfth capacitor C12. The first end of the eighth resistor R8 is connected to the current regulation module 40; the first end of the ninth resistor R9 is connected to the second end of the eighth resistor R8, and the second end of the ninth resistor R9 is connected to the oscillator; the first end of the ninth capacitor C9 is connected to the second end of the eighth resistor R8, and the second end of the ninth capacitor C9 is connected to the first end of the target capacitor C; the first end of the tenth capacitor C10 is connected to the second end of the ninth resistor R9, and the second end of the tenth capacitor C10 is grounded; the first end of the eleventh capacitor C11 is connected to the first end of the tenth capacitor C10, and the second end of the eleventh capacitor C11 is grounded; the first end of the tenth resistor R10 is connected to the first end of the eleventh capacitor C11; the first end of the eleventh resistor R11 is connected to the second end of the tenth resistor R10; the first end of the twelfth capacitor C12 is connected to the second end of the tenth resistor R10, and the second end of the twelfth capacitor C12 is grounded.

[0059] In one embodiment, when the charging switch U is closed, the charging loop from the power supply voltage E to the target capacitor C is connected, and the following equation can be obtained:

[0060]

[0061] Wherein, ic1 represents the current flowing through the target capacitor C, Co represents the capacitance of the target capacitor C, Uc1 represents the voltage on the target capacitor C, and t1 represents the charging time.

[0062] According to the closed-loop voltage equation: E = ic1 * Rg + Uc1, where Rg represents the resistance through which the current ic1 flows in the charging circuit, substituting the current ic1 and Uc1 into the above equation, the function of the target capacitor C charging process can be obtained:

[0063]

[0064] It can be seen from the above formula that by controlling the charging time t1, the voltage on the target capacitor C can be controlled, that is, the value of Uc1 can be controlled by controlling the closing time of the charging switch U.

[0065] Similarly, when the discharge switch Q is closed, the discharge circuit of the target capacitor C is turned on, and the initial voltage of the target capacitor C is Uc1. The function of the discharge process of the target capacitor C can be obtained:

[0066]

[0067] Where Ro represents the resistance through which the current ic2 flows in the discharge circuit. As can be seen from the above formula, by controlling the discharge time t2, the voltage on the target capacitor C can be controlled. That is, by controlling the closing time of the discharge switch Q, the value of Uc2 can be controlled.

[0068] Let Co*Rg=τ1, and derive the relationship between the charging time t1 through the function of the charging process of the target capacitor C:

[0069]

[0070] Let Co*Ro = τ2, and derive the discharge time t2 from the function of the discharge process of the target capacitance C:

[0071]

[0072] Among them, fo represents the current frequency of the first signal S1, fn represents the target frequency of the first signal S1, Ufo represents the voltage of the second signal S2 corresponding to the current frequency of the first signal S1, and Ufn represents the voltage of the second signal S2 corresponding to the target frequency of the first signal S1.

[0073] In one application scenario: the charge and discharge time of the target capacitor C is calculated according to the voltage fitting curve of the second signal S2.

[0074] From the aforementioned relationship between charging time t1 and discharging time t2, it can be seen that, given the known values ​​of target capacitance C, Rg, and R0, the function of target capacitance C with respect to the closing time of charging switch U and discharging switch Q (i.e., charging time t1 and discharging time t2) can be derived. Given the curve function of the voltage of second signal S2, the voltage of second signal S2 corresponding to each frequency point can be calculated using different frequency points. The specific closing time values ​​of charging switch U and discharging switch Q can then be calculated using the function of the charging and discharging process of target capacitance C.

[0075] In addition, through board-level calibration, the voltage and frequency of the second signal S2 obtained by the test are fitted with a function to obtain a voltage curve of the second signal S2, which can eliminate the inconsistency of the voltage curves of the second signal S2 of different oscillators.

[0076] Refer to Table 1 and Table 2, which are the test data of the voltage regulation circuit provided in this application.

[0077] Table 1

[0078]

[0079] Table 2

[0080]

[0081] Specifically, the power supply voltage E is set to 5V, the current frequency of the first signal S1 is set to 350MHZ, and when the current frequency is less than the target frequency, the target capacitor C is charged, and the locking time of different frequency points from 350MHZ to 410MHZ can be obtained; or the current frequency of the first signal S1 is set to 410MHZ, and when the current frequency is greater than the target frequency, the target capacitor C is discharged, and the locking time of different frequency points from 410MHZ to 350MHZ can be obtained.

[0082] Among them, Table 1 is the original locking time, and Table 2 is the locking time after optimization by the voltage regulation circuit 100. By comparing Table 1 and Table 2, it can be seen that the locking time is effectively reduced, and when quickly locking other frequency points of any frequency interval from any frequency point, the locking time can be guaranteed to meet <4ms.

[0083] In another application scenario: the charge and discharge time of the target capacitor C is fixed according to the frequency interval between the current frequency of the first signal S1 and the target frequency.

[0084] Refer to Table 3, Table 4 and Table 5, which are other test data of the voltage regulation circuit provided in this application.

[0085] Table 3

[0086]

[0087] Table 4

[0088]

[0089] Table 5

[0090]

[0091] Table 3 shows the fixed charge and discharge times corresponding to different frequency intervals, Table 4 shows the original lock times, and Table 5 shows the lock times optimized by voltage regulation circuit 100. Comparing Tables 4 and 5, it can be seen that the lock times between different frequency points are effectively reduced between 350 MHz and 410 MHz. Furthermore, when quickly locking from any frequency point to another frequency point at any frequency interval, the lock time is guaranteed to be <4 ms.

[0092] See Figure 4 , Figure 4 1 is a schematic diagram of the structure of an embodiment of a phase-locked loop circuit provided in the present application. The phase-locked loop circuit 1000 includes: an oscillator 200; a voltage regulation module 300 connected to the oscillator 200. The voltage regulation module 300 includes the voltage regulation circuit 100 as described above, which will not be repeated here.

[0093] See Figure 5 , Figure 5 2 is a schematic structural diagram of a first embodiment of an electronic device provided in the present application. The electronic device 2000 includes a voltage regulating circuit 100. The voltage regulating circuit 100 is as described in the above embodiments and will not be described in detail here.

[0094] See Figure 6 , Figure 6 2 is a schematic structural diagram of a second embodiment of an electronic device provided in the present application. The electronic device 2000 includes a phase-locked loop circuit 1000. The phase-locked loop circuit 1000 is as described in the above embodiments and will not be described in detail here.

[0095] In the several embodiments provided in this application, it should be understood that the disclosed methods and devices can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules or units is merely a logical functional division. In actual implementation, other division methods may be used, such as combining or integrating multiple units or components into another system, or ignoring or not implementing certain features.

[0096] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of this embodiment.

[0097] In addition, each functional unit in each embodiment of the present application may be integrated into a processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. The above-mentioned integrated units may be implemented in the form of hardware or software functional units.

[0098] The above description is only an implementation method of the present application and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the description and drawings of this application, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A voltage regulating circuit, characterized in that: The voltage regulating circuit is connected to an oscillator, and the oscillator is configured to output a first signal. The voltage regulating circuit includes: a loop filtering module connected to the oscillator, the loop filtering module being configured to output a second signal, wherein a voltage of the second signal is used to adjust a current frequency of the first signal; A charging and discharging module is connected to the loop filtering module, and is configured to charge or discharge the target capacitor in the loop filtering module according to the current frequency and the target frequency of the first signal to adjust the voltage of the second signal.

2. The voltage regulating circuit according to claim 1, wherein: The voltage regulating circuit further includes: a control module configured to output a control signal according to a current frequency and a target frequency of the first signal; and / or The charge and discharge module includes: a charging switch, connecting the loop filter module and the control module, wherein the charging and discharging module is configured to charge the target capacitor in the loop filter module according to the control signal when the charging switch is turned on; a discharge switch, connecting the loop filter module and the control module, wherein the charge and discharge module is configured to discharge the target capacitor in the loop filter module according to the control signal when the discharge switch is turned on; The control module is further configured to control the on-time of the charging switch and the discharging switch according to the control signal.

3. The voltage regulating circuit according to claim 2, wherein: The charging and discharging module further includes: a first resistor, wherein a first end of the first resistor is connected to the first output end of the charging switch, and a second end of the first resistor is connected to the first end of the target capacitor; a second resistor, wherein a first end of the second resistor is connected to the second output end of the charging switch; A diode, wherein a cathode of the diode is connected to the second end of the second resistor, and an anode of the diode is connected to the power supply end of the charging switch.

4. The voltage regulating circuit according to claim 2, wherein: The charging and discharging module further includes: a third resistor, wherein a first end of the third resistor is connected to the first end of the discharge switch, and a second end of the third resistor is connected to the first end of the target capacitor; a fourth resistor, wherein a first end of the fourth resistor is connected to the second end of the discharge switch, and a second end of the fourth resistor is grounded; a fifth resistor, wherein a first end of the fifth resistor is connected to the control end of the discharge switch, and a second end of the fifth resistor is connected to the control module.

5. The voltage regulating circuit according to claim 3, wherein: The charging and discharging module further includes: a first capacitor, wherein a first end of the first capacitor is connected to the anode of the diode, and a second end of the first capacitor is grounded; a second capacitor, wherein a first end of the second capacitor is connected to the power supply end of the charging switch, and a second end of the second capacitor is grounded; A third capacitor, wherein a first end of the third capacitor is connected to the control end of the charging switch and the control module, and a second end of the third capacitor is grounded.

6. The voltage regulating circuit according to claim 4, wherein: The charge and discharge module further includes: a fourth capacitor, a first end of the fourth capacitor is connected to the second end of the fifth resistor, and a second end of the fourth capacitor is grounded.

7. The voltage regulating circuit according to claim 1, wherein: The target capacitance is the maximum capacitance in the loop filter module.

8. The voltage regulating circuit according to claim 1, wherein: The voltage regulation circuit further includes: a current regulation module connected to the loop filtering module, the current regulation module is configured to output a third signal, and the loop filtering module regulates the voltage of the second signal according to the third signal.

9. A phase-locked loop circuit, characterized in that: The phase-locked loop circuit comprises: Oscillator; A voltage regulating module is connected to the oscillator, and the voltage regulating module includes the voltage regulating circuit according to any one of claims 1 to 8.

10. An electronic device, characterized in that: The electronic device includes the voltage regulating circuit according to any one of claims 1 to 8, or includes the phase-locked loop circuit as shown in claim 9.

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