Circuit board
By designing a shielding structure of absorbing materials and metal materials on the circuit substrate, the problem of excessive electromagnetic radiation is solved, and the signal integrity and stability in overclocking environments are improved.
Patent Information
- Application Number
- CN202422847169.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2024-08-21
- Filing Date
- 2024-11-21
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2034-11-21
AI Technical Summary
How to effectively control electromagnetic radiation to comply with international regulatory safety standards and improve memory stability and signal integrity in overclocking environments.
A circuit substrate is designed, which includes a substrate, an interface structure and a shielding structure. A shielding layer composed of absorbing material and metal material is used to cover the circuit structure, thereby reducing the intensity of electromagnetic wave radiation through reflection and absorption.
Effectively reduces electromagnetic radiation signal strength, complies with relevant safety regulations, and improves the integrity of memory control signals and stability in overclocking environments.
Smart Images
Figure CN223452154U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to an electronic assembly, in particular to a circuit substrate. BACKGROUND
[0002] Electronic products such as desktop computers are configured with central processing units (CPUs), graphics processing units (GPUs), memories and other electronic assemblies on the motherboard, and these electronic assemblies are electrically connected through circuit structures for signal communication.
[0003] However, when signal current is transmitted along the circuit structure, the circuit structure will generate electromagnetic wave radiation. Therefore, how to control electromagnetic wave radiation within the safety specification limit of international regulations and standards, and maintain good performance, is one of the goals of the field. SUMMARY
[0004] The utility model discloses a circuit substrate to solve at least one of the above problems.
[0005] The utility model provides a circuit substrate can reduce the signal intensity of electromagnetic wave radiation, make its radiation intensity meet relevant safety specification, improve the completeness of memory control signal and the shielding performance of electromagnetic radiation caused by signal, and can further increase the stability of memory in the overclocking environment.
[0006] The utility model provides a circuit substrate, including a substrate, a first interface structure, a second interface structure, a circuit structure and two shielding structures. The substrate has a first surface and a second surface opposite to each other. The first interface structure is arranged on the first surface of the substrate. The second interface structure is arranged on the first surface of the substrate. The circuit structure is formed on the first surface, the second surface or between the first surface and the second surface of the substrate, and is connected between the first interface structure and the second interface structure. The circuit structure includes a first part, and the first part includes a control bus bar and an address bus bar. The two shielding structures are attached to the first surface and the second surface of the substrate respectively to cover the first part of the circuit structure.
[0007] According to one embodiment of the utility model, the coverage areas of the two shielding structures on the substrate are the same.
[0008] According to one embodiment of the utility model, the circuit structure further includes a second part, the second part includes a clock pulse bus bar, a data bus bar and a data selection pulse, and each shielding structure further covers the second part of the circuit structure.
[0009] According to one of the embodiments of the present application, the second part of the circuit structure covers the substrate within the coverage of the two shielding structures.
[0010] According to one of the embodiments of the present application, each shielding structure includes a first shielding layer and a first connecting layer, the first shielding layer is arranged on the circuit structure, the first connecting layer is connected between the substrate and the first shielding layer, and the first shielding layer includes a wave-absorbing material or a metal material.
[0011] According to one of the embodiments of the present application, each shielding structure further includes an appearance layer and a second connecting layer, the appearance layer is arranged on the first shielding layer, and the second connecting layer is connected between the first shielding layer and the appearance layer.
[0012] According to one of the embodiments of the present application, the appearance layer completely overlaps the first shielding layer in the stacking direction.
[0013] According to one of the embodiments of the present application, each shielding structure further includes a second shielding layer and a third connecting layer, the second shielding layer is arranged between the first shielding layer and the appearance layer, the second connecting layer is connected between the second shielding layer and the appearance layer, and the third connecting layer is connected between the first shielding layer and the second shielding layer.
[0014] According to one of the embodiments of the present application, one of the first shielding layer and the second shielding layer is a wave-absorbing material, and the other of the first shielding layer and the second shielding layer is a metal material.
[0015] According to one of the embodiments of the present application, the second shielding layer completely overlaps the first shielding layer in the stacking direction.
[0016] According to one of the embodiments of the present application, the thickness of the wave-absorbing material is greater than or equal to 0.05 mm and less than or equal to 10.0 mm.
[0017] According to one of the embodiments of the present application, the wave-absorbing material has a relative magnetic permeability, the real part of the relative magnetic permeability in the range of 1 MHz to 200 MHz is between 25 and 180, and the imaginary part of the relative magnetic permeability in the range of 1 MHz to 200 MHz is between 1 and 15.
[0018] According to one of the embodiments of the present application, the first interface structure and the second interface structure are a central processing unit socket and a memory socket, respectively.
[0019] Therefore, by the shielding structure configuration and covering the circuit structure, the signal strength of the electromagnetic wave radiation generated by the circuit structure can be reduced, and the radiation strength of the circuit substrate conforms to the relevant safety specifications, thereby improving the integrity of the memory control signal and the shielding performance of the electromagnetic radiation caused by the signal. In addition, the stability of the memory in the overclocking environment can be further increased.
[0020] In order to make the above features and advantages of the present application more obvious and easy to understand, the following embodiments are described in detail below, and the accompanying drawings are described in detail as follows. BRIEF DESCRIPTION OF DRAWINGS
[0021] Figure 1 The circuit substrate of an embodiment of the present application is shown in a perspective view.
[0022] Figure 2 The circuit substrate of the present application is shown in a front view. Figure 1
[0023] Figure 3 The circuit substrate of the present application is shown in another perspective view. Figure 1
[0024] Figure 4 The circuit substrate of the present application is shown in a back view. Figure 1
[0025] Figure 5 The shielding structure of the circuit substrate of the present application is shown in a range diagram. Figure 1
[0026] The shielding structure of the circuit substrate of the present application is shown in a cross-sectional view of the substrate. Figure 6 Figure 1 The relative permeability curve of the shielding structure is shown in a schematic diagram.
[0027] Figure 7 Figure 6 The working principle of the shielding structure is shown in a schematic diagram.
[0028] Figure 8 The shielding structure of the present application is shown in a schematic diagram. Figure 6
[0029] The high-frequency electromagnetic field radiation curve of the circuit substrate of the present application is shown in a schematic diagram. Figure 9A Figure 9B Figure 1 The high-frequency electromagnetic field radiation curve of the circuit substrate of the present application is shown in a schematic diagram.
[0030] Figure 10 The shielding structure of the present application is shown in a cross-sectional view of the substrate.
[0031] Figure 11 The shielding structure of the present application is shown in a cross-sectional view of the substrate.
[0032] Figure 12 A perspective view of a circuit substrate according to another embodiment of the present application.
[0033] Figure 13 A perspective view of a circuit substrate according to another embodiment of the present application. Figure 12 A front view of a circuit substrate according to another embodiment of the present application.
[0034] Figure 14 A perspective view of a circuit substrate according to another embodiment of the present application. Figure 12 A perspective view of a circuit substrate according to another embodiment of the present application.
[0035] Figure 15 A perspective view of a circuit substrate according to another embodiment of the present application. Figure 12 A back view of a circuit substrate according to another embodiment of the present application.
[0036] Figure 16 A perspective view of a circuit substrate according to another embodiment of the present application. Figure 12 A perspective view of a circuit substrate according to another embodiment of the present application.
[0037] Reference signs are as follows:
[0038] 100, 100A: circuit substrate
[0039] 110: substrate
[0040] 120: first interface structure
[0041] 130: second interface structure
[0042] 140: circuit structure
[0043] 142: first portion
[0044] 144: second portion
[0045] 150, 150A to 150C: shielding structure
[0046] 151: first shielding layer
[0047] 152: first connection layer
[0048] 153: appearance layer
[0049] 154: second connection layer
[0050] 155: second shielding layer
[0051] 156: third connection layer
[0052] 200 to 204: line segment
[0053] A1: first face
[0054] A2: second face
[0055] C: signal current
[0056] S0: electromagnetic wave radiation
[0057] S11: reflection loss
[0058] S12: absorption loss
[0059] S2: transmission radiation DETAILED DESCRIPTION
[0060] Figure 1 Fig. 1 is a perspective view of a circuit board according to an embodiment of the present application. Figure 2 Fig. 2 is a front view of the circuit board of Fig. 1. Figure 1 Fig. 3 is another perspective view of the circuit board of Fig. 1. Figure 3 Fig. 4 is a back view of the circuit board of Fig. 1. Figure 1 Fig. 5 is a schematic diagram of a circuit board according to another embodiment of the present application. Figure 4 Fig. 6 is a front view of the circuit board of Fig. 5. Figure 1 Fig. 7 is a back view of the circuit board of Fig. 5. Figures 1 to 4 The present embodiment provides a circuit board 100, such as a motherboard, which is applied in a computer device as a main circuit board and is used to support components such as a central processing unit, a memory, other kinds of chipsets and storage units, and allow them to communicate with each other.
[0061] The circuit board 100 includes a substrate 110, a first interface structure 120, a second interface structure 130, a circuit structure 140 and two shielding structures 150. The substrate 110, such as a printed circuit board (PCB), is used to carry chips, electronic components and form circuits. The substrate 110 has a first surface A1 and a second surface A2.
[0062] The first interface structure 120 is disposed on the first surface A1 of the substrate 110, and the second interface structure 130 is disposed on the first surface A1 of the substrate 110. In the present embodiment, the first interface structure 120 is, for example, a central processing unit socket used to carry a central processing unit. The present application does not limit the type of central processing unit socket and the central processing unit carried thereby. The second interface structure 130 is, for example, a memory socket used to carry a memory. The present application does not limit the type of memory socket and the memory carried thereby. In the present embodiment, the number of second interface structures 130 is, for example, four, i.e. four memory sockets, but the present application is not limited thereto.
[0063] The circuit structure 140 is formed on the substrate 110 and is connected between the first interface structure 120 and the second interface structure 130 to electrically connect the electronic components carried by the first interface structure 120 and the second interface structure 130. In different embodiments, the circuit structure 140 can be formed on the first surface Al, the second surface A2, between the first surface Al and the second surface A2, or any combination of the above of the substrate 110, and the present application is not limited thereto. The circuit structure 140 includes different buses to perform specific communication functions between the first interface structure 120 and the second interface structure 130. For example, in the present embodiment, the circuit structure 140 includes a first portion 142 and a second portion 144, wherein the first portion 142 includes a control bus and an address bus, and the second portion 144 includes a clock bus, a data bus, and a data strobe bus. In the present embodiment, the control bus and the address bus are formed between the clock bus and the data bus, but the present application is not limited thereto.
[0064] Figure 5 For Figure 1 the scope of the shielding structure of the circuit substrate. Please refer to Figures 1 to 5 The two shielding structures 150 are attached to the first surface Al and the second surface A2 of the substrate 110 to cover the first portion 142 of the circuit structure 140 to shield the electromagnetic wave radiation generated by the circuit structure 140. Specifically, the coverage of the first portion 142 of the circuit structure 140 on the substrate 110 is within the coverage of the two shielding structures 150 on the substrate 110. In the present embodiment, the coverage areas of the two shielding structures 150 on the substrate 110 are the same. In other words, in the direction perpendicular to the substrate 110, the two shielding structures 150 completely overlap, as shown in Figures 1 to 4
[0065] Figure 6 For Figure 1 the shielding structure configuration of the circuit substrate is shown in the cross-sectional view of the substrate. Figure 7 For Figure 6 the relative permeability curve of the shielding structure. Please refer to Figure 6 and Figure 7 For convenience of description, Figure 6 The shielding structure 150 is shown on only one side of the substrate 110. In this embodiment, each shielding structure 150 includes a first shielding layer 151 and a first connecting layer 152. The first shielding layer 151 is disposed on the circuit structure 140, and the first connecting layer 152 is connected between the substrate 110 and the first shielding layer 151. The first connecting layer 152 is, for example, a connecting adhesive layer, and the present invention does not limit the type and specifications of the connecting adhesive layer. The first shielding layer 151 includes an absorbing material or a metal material, which can be selected depending on the electromagnetic radiation of the circuit structure 140. For example, in an environment with high magnetic field radiation intensity, the first shielding layer 151 is, for example, an absorbing material layer with high magnetic permeability and high impedance characteristics to block the electromagnetic wave radiation generated by the circuit structure 140. In a preferred embodiment, the thickness of the absorbing material is greater than or equal to 0.05 mm and less than or equal to 10.0 mm. In addition, the absorbing material has a relative magnetic permeability (i.e., the ratio of the magnetic permeability of the material to the magnetic permeability of a vacuum), and in a preferred embodiment, the absorbing material has a real part magnetic permeability value (e.g., Figure 7 The line segment 200 shown is between 25 and 180 and the imaginary permeability value (such as Figure 7 The material of the line segment 201 shown is between 1 and 15. In addition to the aforementioned connection method, in another embodiment, shielding structure 150 can be formed by coating the absorbing material onto the surface of any circuit board formed in substrate 110. The coating range may be, for example, the inner surfaces of two adjacent inner-layer circuit boards of circuit structure 140, but the present invention is not limited to this. Alternatively, in environments with high electric field radiation intensity, first shielding layer 151 may be a metal patch, for example.
[0066] Figure 8 for Figure 6 Schematic diagram of the working principle of the shielding structure. Please refer to Figure 8 Specifically, when the signal current C is transmitted along the circuit structure 140, the circuit structure 140 generates electromagnetic wave radiation S0. Therefore, by covering the first shielding layer 151 including the absorbing material, the electromagnetic wave S0 radiated by the circuit structure 140 can be transmitted to the first shielding layer 151, and the intensity of the electromagnetic wave radiation S0 is attenuated by the reflection and absorption of the first shielding layer 151. Specifically, a portion of the electromagnetic wave radiation S0 is attenuated by the reflection of the first shielding layer 151, such as Figure 8 In a preferred embodiment, the reflection loss S11 is greater than 1 dB. In addition, the absorption effect of the first shielding layer 151 (for example, the eddy current generated by the material generates an offset effect) attenuates another part of the electromagnetic radiation S0, such as Figure 8The absorption loss S12 is shown. In a preferred embodiment, the absorption loss S12 is greater than 10 db. Thus, the electromagnetic wave radiation S0 generated by the circuit structure 140 is shielded by the first shielding layer 151 to form the transmission radiation S2. The signal strength of the transmission radiation S2 is the signal strength of the electromagnetic wave radiation S0 generated by the circuit structure 140 minus the reflection loss S11 and the absorption loss S12. In this way, by configuring and covering the shielding structure 150 on the circuit structure 140, the signal strength of the electromagnetic wave radiation S0 generated by the circuit structure 140 can be reduced, thereby making the radiation strength of the circuit substrate 100 comply with the relevant safety specifications, thereby improving the integrity of the memory control signal and the shielding effectiveness of the electromagnetic radiation caused by the signal. In addition, the stability of the memory in the overclocking environment can be further improved.
[0067] Figure 9A and Figure 9B are known technologies and Figure 1 the high-frequency electromagnetic field radiation curve of the circuit substrate of the embodiment. Please refer to Figure 9A and Figure 9B In Figure 9A and Figure 9B The curve shown in the line segment 202 is the safety specification limit value complying with the international regulation standard. Thus, the difference between the line segment 203 shown by Figure 9A (i.e. the signal strength distribution of the electromagnetic wave radiation generated by the circuit structure 140 without configuring the shielding structure 150) and the line segment 204 shown by Figure 9B (i.e. the signal strength distribution of the electromagnetic wave radiation generated by the circuit structure 140 after configuring the shielding structure 150) can know that the signal strength of the electromagnetic wave radiation S0 can be effectively reduced after configuring the shielding structure 150, especially the signal strength of 2.4 GHz, 4.8 GHz and 7.2 GHz frequencies can be effectively reduced to comply with the limit value of the international regulation standard.
[0068] Figure 10 is a cross-sectional view of the shielding structure of another embodiment of the utility model configured on the substrate. Please refer to Figure 10 The shielding structure 150A shown in this embodiment is similar to Figure 6The shielding structure 150 shown. The difference between the two is that, in this embodiment, the shielding structure 150A also includes an appearance layer 153 and a second connection layer 154. Among them, the appearance layer 153 is configured on the first shielding layer 151. The appearance layer 153 is, for example, a Mylar insulating patch or other types of plastic patches, which are used to cover and protect the first shielding layer 151. The second connection layer 154 is connected between the first shielding layer 151 and the appearance layer 153. Similar to the first connection layer 152, the second connection layer 154 is, for example, a connecting adhesive layer, but the present invention does not limit the type and specification of the connecting adhesive layer. In this embodiment, the first shielding layer 151 can be selected according to the electromagnetic radiation situation of the circuit structure 140, including absorbing materials or metal materials. The shielding structure 150A of this embodiment can replace Figures 1 to 4 At least one shielding structure 150 is shown in FIG. 1 , but the present invention is not limited thereto.
[0069] Figure 11 This is a cross-sectional view of another embodiment of the present invention wherein the shielding structure is disposed on a substrate. Figure 11 The shielding structure 150B shown in this embodiment is similar to Figure 10 Shielding structure 150A is shown. The difference between the two is that, in this embodiment, shielding structure 150B also includes a second shielding layer 155 and a third connecting layer 156. The second shielding layer 155 is disposed between the first shielding layer 151 and the exterior layer 153. In this embodiment, the second shielding layer 155 completely overlaps the first shielding layer 151 in the stacking direction. Similar to the first shielding layer 151, the second shielding layer 155 includes an absorbing material or a metal material, which can be selected based on the electromagnetic radiation of the circuit structure 140. In a preferred embodiment, one of the first shielding layer 151 and the second shielding layer 155 is an absorbing material, while the other is a metal material. For example, in an environment with high magnetic field radiation intensity, the first shielding layer 151, which is closer to the circuit structure 140, can be made of an absorbing material, while the second shielding layer 155, which is farther away from the circuit structure 140, can be made of a metal material, thereby optimizing shielding effectiveness. Similarly, in an environment with a high electric field radiation intensity, the first shielding layer 151 closer to the circuit structure 140 can be made of metal material, while the second shielding layer 155 farther from the circuit structure 140 can be made of absorbing material, thereby optimizing the shielding performance. The second connecting layer 154 is connected between the second shielding layer 155 and the appearance layer 153, and the third connecting layer 156 is connected between the first shielding layer 151 and the second shielding layer 155. Similar to the first connecting layer 152 and the second connecting layer 154, the third connecting layer 156 is, for example, a connecting adhesive layer, but the present invention does not limit the type and specification of the connecting adhesive layer. The shielding structure 150B of this embodiment can replace Figures 1 to 4At least one shielding structure 150 shown in the embodiment of the present application, but the utility model is not limited to this.
[0070] Figure 12 The circuit substrate of another embodiment of the present application. Figure 13 The circuit substrate of another embodiment of the present application. Figure 12 The circuit substrate of another embodiment of the present application. Figure 14 The circuit substrate of another embodiment of the present application. Figure 12 The circuit substrate of another embodiment of the present application. Figure 15 The circuit substrate of another embodiment of the present application. Figure 12 The circuit substrate of another embodiment of the present application. Figure 16 The circuit substrate of another embodiment of the present application. Figure 12 The shielding structure in the circuit substrate of another embodiment of the present application. Figures 12 to 16 The circuit substrate 100A of the embodiment of the present application is similar to the circuit substrate 100 shown in the embodiment of the present application. Figures 1 to 4 The difference between the two is that in the present embodiment, each shielding structure 150C also covers the second part 144 of the circuit structure 140. Among them, the coverage of the second part 144 of the circuit structure 140 on the substrate 110 is within the coverage of the two shielding structures 150C on the substrate 110. In this way, by arranging and covering the shielding structure 150C on the circuit structure 140, the signal strength of the electromagnetic wave radiation generated by the circuit structure 140 can be reduced, thereby making the radiation intensity of the circuit substrate 100 comply with the relevant safety specifications, thereby improving the integrity of the memory control signal and the shielding performance of the electromagnetic radiation caused by the signal. In addition, the stability of the memory in the overclocking environment can be further increased. In addition, any number of shielding structures 150C of the present embodiment can be replaced by the shielding structure 150A shown in the embodiment of the present application or the shielding structure 150B shown in the embodiment of the present application, and the utility model is not limited to this. Figure 10 Figure 11
[0071] In summary, in the circuit substrate of the present application, the circuit substrate includes a substrate, a first interface structure, a second interface structure, a circuit structure, and two shielding structures. Among them, the circuit structure is connected between the first interface structure and the second interface structure, and the two shielding structures are respectively attached to the first surface and the second surface of the substrate to cover the first part of the circuit structure. In this way, by arranging and covering the shielding structure on the circuit structure, the signal strength of the electromagnetic wave radiation generated by the circuit structure can be reduced, thereby making the radiation intensity of the circuit substrate comply with the relevant safety specifications, thereby improving the integrity of the memory control signal and the shielding performance of the electromagnetic radiation caused by the signal. In addition, the stability of the memory in the overclocking environment can be further increased.
[0072] Although the utility model has disclosed as above with the embodiment, however it is not used to limit the utility model, the technical personnel in this field can make some change and adornment without departing from the spirit and scope of the utility model, therefore the protection scope of the utility model should be accurate as defined by the accompanying claims.
Claims
1. A circuit substrate, characterized in that: include: A substrate having a first surface and a second surface opposite to each other; a first interface structure disposed on the first surface of the substrate; a second interface structure disposed on the first surface of the substrate; a circuit structure formed on the first surface, the second surface, or between the first and second surfaces of the substrate and connected between the first interface structure and the second interface structure, the circuit structure comprising a first portion including a control bus and an address bus; as well as Two shielding structures are respectively attached to the first surface and the second surface of the substrate to cover the first portion of the circuit structure.
2. The circuit substrate according to claim 1, wherein The two shielding structures cover the same area on the substrate.
3. The circuit substrate according to claim 1, wherein The circuit structure further includes a second part, which includes a clock pulse bus, a data bus and a data selection pulse, and each shielding structure also covers the second part of the circuit structure.
4. The circuit substrate according to claim 3, wherein: The coverage area of the second part of the circuit structure on the substrate is located within the coverage areas of the two shielding structures on the substrate.
5. The circuit substrate according to claim 1, wherein Each of the shielding structures includes a first shielding layer and a first connecting layer. The first shielding layer is configured on the circuit structure. The first connecting layer is connected between the substrate and the first shielding layer. The first shielding layer includes absorbing material or metal material.
6. The circuit substrate according to claim 5, wherein: Each of the shielding structures further includes an appearance layer and a second connection layer. The appearance layer is configured on the first shielding layer, and the second connection layer is connected between the first shielding layer and the appearance layer.
7. The circuit substrate according to claim 6, wherein: The appearance layer completely overlaps with the first shielding layer in the stacking direction.
8. The circuit substrate according to claim 6, wherein: Each shielding structure also includes a second shielding layer and a third connecting layer. The second shielding layer is arranged between the first shielding layer and the appearance layer, the second connecting layer is connected between the second shielding layer and the appearance layer, and the third connecting layer is connected between the first shielding layer and the second shielding layer.
9. The circuit substrate according to claim 8, wherein: One of the first shielding layer and the second shielding layer is made of a wave absorbing material, and the other one of the first shielding layer and the second shielding layer is made of a metal material.
10. The circuit substrate according to claim 8, wherein The second shielding layer completely overlaps with the first shielding layer in the stacking direction.
11. The circuit substrate according to claim 5, wherein The thickness of the absorbing material is greater than or equal to 0.05 mm and less than or equal to 10.0 mm.
12. The circuit substrate according to claim 5, wherein The absorbing material has a relative magnetic permeability, wherein a real magnetic permeability value of the relative magnetic permeability in the range of 1 MHz to 200 MHz is between 25 and 180, and an imaginary magnetic permeability value of the relative magnetic permeability in the range of 1 MHz to 200 MHz is between 1 and 15.
13. The circuit substrate according to claim 1, wherein The first interface structure and the second interface structure are respectively a CPU socket and a memory socket.