Harmonic suppression circuit of frequency converter protection device

Abstract

The utility model relates to the field of frequency converter protection devices, in particular to a harmonic suppression circuit of a frequency converter protection device, which comprises a signal acquisition circuit which is electrically connected with an alternating current power grid to receive power supply, has an output end as a power supply end, and is also used for acquiring current and voltage to obtain and output an acquisition signal; the compensation module is used for receiving the acquisition signal, calculating to obtain a harmonic suppression signal and outputting the harmonic suppression signal; and the frequency converter comprises an inversion module, the frequency converter receives power supplied by the output end of the signal acquisition circuit, and the inversion module receives the harmonic suppression signal to perform harmonic compensation. The method has the effect of suppressing harmonic waves.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of frequency converter protection device, in particular to a kind of harmonic suppression circuit of frequency converter protection device. BACKGROUND

[0002] As a kind of power conversion device, frequency converter has been widely applied in industrial production and daily life, especially mine frequency converter as a independent, complete function speed-regulating power supply equipment, can ensure the safe, stable operation of equipment under mine.

[0003] But mine frequency converter will generate a large number of harmonics in the working process, these harmonics not only can influence the power quality of power supply network in coal mine, also can cause damage to mine frequency converter itself and other electrical equipment in coal mine.Once mine frequency converter or other electrical equipment in coal mine cannot work normally, it will cause serious threat to the safety of personnel in mine, therefore, need to design an effective harmonic suppression circuit to solve this problem. CONTENT OF THE INVENTION

[0004] In order to improve the problem that mine frequency converter will generate a large number of harmonics in the working process, the present application provides a kind of harmonic suppression circuit of frequency converter protection device.

[0005] The present application provides a kind of harmonic suppression circuit of frequency converter protection device, adopt the following technical scheme:

[0006] A kind of harmonic suppression circuit of frequency converter protection device, comprising:

[0007] Signal acquisition circuit, with AC power grid electric connection to accept power supply, output end as power supply end, also for collecting current, voltage, obtain acquisition signal and output;

[0008] Compensation module, receives the acquisition signal, and obtains harmonic suppression signal after calculation and exports;

[0009] Frequency converter, the frequency converter includes inverter module, the frequency converter receives the power supply of output end of the signal acquisition circuit, and the inverter module receives the harmonic suppression signal to carry out harmonic compensation.

[0010] By adopting the above technical scheme, the input of AC power grid is collected and receives power supply by signal acquisition circuit, then the high-order harmonic in input is removed by compensation module through filtering, then direct current is converted into alternating current output by inverter module, so that the harmonics generated by mine frequency converter is effectively suppressed, the power quality of coal mine power grid is improved, and the normal operation of mine frequency converter and other electrical equipment is protected.

[0011] Optionally, the signal acquisition circuit includes:

[0012] The acquisition signal includes a voltage signal and a current signal.

[0013] A voltage transformer is configured to receive and acquire a voltage input from an AC power grid, to obtain the voltage signal and output the voltage signal.

[0014] A current transformer is configured to receive and acquire a current input from the AC power grid, to obtain the current signal and output the current signal.

[0015] By using the above technical solution, the voltage and the current are acquired simultaneously, so that the data acquisition is more comprehensive.

[0016] Optionally, the compensation module includes:

[0017] A signal processing circuit is configured to receive the acquisition signal, to obtain a processing signal by calculating the acquisition signal, and to output the processing signal.

[0018] An FPGA is configured to receive the processing signal, to obtain the harmonic suppression signal by calculating the processing signal, and to output the harmonic suppression signal.

[0019] A harmonic compensation circuit is configured to receive the harmonic suppression signal, to filter the harmonic suppression signal, and to output the filtered harmonic suppression signal to the frequency converter.

[0020] By using the above technical solution, the input is filtered, the harmonic is suppressed, and the circuit quality is improved.

[0021] Optionally, the signal processing circuit includes a voltage signal conditioning circuit and an AD sampling circuit, the voltage signal conditioning circuit includes an operational amplifier U1, a same-phase input end of the operational amplifier U1 is electrically connected to a secondary coil of the voltage transformer, an opposite-phase input end of the operational amplifier U1 is electrically connected to an output end of the operational amplifier U1, the output end of the operational amplifier U1 is electrically connected to the AD sampling circuit, and the AD sampling circuit samples to obtain a voltage acquisition signal.

[0022] By using the above technical solution, in the voltage signal conditioning circuit, the voltage signal output by the voltage transformer is conditioned by the operational amplifier U1, and an appropriate value is output, so that the AD sampling circuit can be conveniently sampled.

[0023] Optionally, the signal processing circuit further comprises a current signal conditioning circuit, the current signal conditioning circuit comprises an operational amplifier U2 and an operational amplifier U3, the inverting input terminal of the operational amplifier U2 and the inverting input terminal of the operational amplifier U3 are electrically connected to the secondary coil of the current transformer, the inverting input terminal of the operational amplifier U2 is electrically connected to the output terminal of the operational amplifier U2, the output terminal of the operational amplifier U2 is electrically connected to the non-inverting input terminal of the operational amplifier U3, the inverting input terminal of the operational amplifier U3 is electrically connected to the output terminal of the operational amplifier U3, and the output terminal of the operational amplifier U3 is electrically connected to the AD sampling circuit, and the AD sampling circuit samples a current collection signal.

[0024] By adopting the technical scheme, the current signal output by the current transformer is conditioned by the current conditioning circuit composed of the operational amplifier U2 and the operational amplifier U3, and a suitable value is output, facilitating sampling of the AD sampling circuit.

[0025] Optionally, the harmonic compensation circuit comprises a resistor R11, a resistor R13, a resistor R14, a capacitor C5, a capacitor C6, and a capacitor C7, one end of the inverter module is electrically connected to the FPGA to receive the harmonic suppression signal, the resistor R11, the resistor R13, and the capacitor C6 are connected in series at the other end of the inverter module, the other end of the inverter module is connected in parallel to the FPGA, the capacitor C7 and the resistor R14 are connected in parallel between the resistor R13 and the capacitor C6, and the capacitor C5 is connected in parallel to the resistor R13 and the resistor R14.

[0026] By adopting the technical scheme, the harmonic compensation circuit composed of the resistor R11-R14 and the filter capacitors C5-C7 performs harmonic compensation on the inverter module of the frequency converter through the harmonic suppression signal output by the FPGA, the harmonic compensation circuit performs harmonic compensation on the frequency converter, the harmonic suppression effect is achieved, the safety of the frequency converter is ensured, and the safety of the mine is improved.

[0027] Optionally, a protection circuit electrically connected to the inverter module is further included, the protection circuit receives the collection signal, and the protection circuit comprises an operational amplifier A and a triode Q1, the non-inverting input terminal of the operational amplifier A is electrically connected to the secondary coil of the voltage transformer, and the output terminal of the operational amplifier A and the non-inverting input terminal of the operational amplifier A are electrically connected to the inverter module through the triode Q1.

[0028] By adopting the technical scheme, overvoltage protection is achieved, the frequency converter is protected against overvoltage, and the comprehensiveness of the protection of the frequency converter is improved.

[0029] Optionally, the protection circuit further comprises an optoelectronic coupler OC, a transistor Q3, a transistor Q4 and a bidirectional trigger diode D3, the light receiver of the optoelectronic coupler OC is electrically connected to the secondary coil of the current transformer, the anode of the light source of the optoelectronic coupler OC is electrically connected to the collector of the transistor Q3, the cathode of the light source of the optoelectronic coupler OC is grounded, the emitter and the base of the transistor Q3 are electrically connected, the base of the transistor Q3 and the collector of the transistor Q4 are electrically connected to the inverter module through the bidirectional trigger diode D3, the base of the transistor Q4 is electrically connected to the collector of the transistor Q3, and the emitter of the transistor Q4 is grounded.

[0030] By adopting the above technical scheme, overcurrent protection is realized, the frequency converter is protected from overcurrent, and the comprehensiveness of the protection of the frequency converter is improved.

[0031] Optionally, the frequency converter comprises a temperature management circuit, the temperature management circuit is configured to detect the temperature of the frequency converter to obtain a temperature detection signal, and then calculate the temperature detection signal and a preset temperature threshold to determine whether to cool the frequency converter.

[0032] By adopting the above technical scheme, the frequency converter can be protected from overtemperature by components such as temperature sensors, temperature controllers and cooling fans in the temperature management circuit, and the comprehensiveness of the protection of the frequency converter is improved.

[0033] Optionally, the protection circuit further comprises:

[0034] The current-limiting thermal relay is electrically connected to the signal acquisition circuit to receive power supply and output a corresponding on-off control signal.

[0035] The contactor receives the on-off control signal and is electrically connected to the output end of the frequency converter to perform on-off control.

[0036] By adopting the above technical scheme, the current-limiting thermal relay and the contactor can protect the frequency converter from overload, and the comprehensiveness of the protection of the frequency converter is improved.

[0037] In summary, the present application has at least one of the following beneficial technical effects:

[0038] 1. The harmonics generated by the mine frequency converter are effectively suppressed, the power quality of the coal mine power grid is improved, and the normal operation of the mine frequency converter and other electrical equipment is protected.

[0039] 2. The frequency converter is compensated by the harmonic compensation circuit to achieve harmonic suppression effect, ensure the safe operation of the frequency converter, and improve the safety of the mine. BRIEF DESCRIPTION OF DRAWINGS

[0040] Figure 1is a module schematic diagram of a harmonic suppression circuit of a frequency converter protection device in embodiments of the present application.

[0041] Figure 2 is a circuit schematic diagram of a highlight voltage signal conditioning circuit.

[0042] Figure 3 is a circuit schematic diagram of a highlight current signal conditioning circuit.

[0043] Figure 4 is a circuit schematic diagram of a highlight harmonic compensation circuit.

[0044] Figure 5 is a circuit schematic diagram of a highlight protection circuit.

[0045] Figure 6 is a circuit schematic diagram of a highlight protection circuit.

[0046] BRIEF DESCRIPTION OF DRAWINGS: 1, signal acquisition circuit; 11, voltage transformer; 12, current transformer; 2, compensation module; 21, signal processing circuit; 211, voltage signal conditioning circuit; 212, AD sampling circuit; 213, current signal conditioning circuit; 22, FPGA; 23, harmonic compensation circuit; 3, frequency converter; 31, inverter module; 32, temperature management circuit; 4, protection circuit; 5, current limiting thermal relay; 51, contactor. DETAILED DESCRIPTION

[0047] The following will be described in detail below Figures 1-6 The present application is further described in detail.

[0048] Embodiments of the present application disclose a harmonic suppression circuit of a frequency converter protection device. Referring to Figure 1 , the harmonic suppression circuit of the frequency converter protection device includes a signal acquisition circuit 1, a compensation module 2, a frequency converter 3, a protection circuit 4, a current limiting thermal relay 5, and a contactor 51. The signal acquisition circuit 1 is electrically connected to an AC power grid to acquire voltage and current input by the AC power grid and obtain an acquisition signal. The compensation module 2 receives the acquisition signal, then processes and calculates data of the received acquisition signal to obtain a corresponding harmonic suppression signal. The frequency converter 3 is connected in parallel to the signal acquisition circuit 1 to receive power supply of the AC power grid. The frequency converter 3 includes an inverter module 31 and a temperature management circuit 32. The inverter module 31 receives the harmonic suppression signal to compensate for harmonics of the frequency converter 3.

[0049] Referring to Figure 1 and Figure 2The signal acquisition circuit 1 includes a voltage transformer 11 and a current transformer 12. The collected signal includes a voltage signal collected by the voltage transformer 11 and a current signal collected by the current transformer 12. The voltage transformer 11 and the current transformer 12 are used to collect and detect the voltage and current input to the AC power grid.

[0050] Reference Figure 1 and Figure 2 and Figure 3 The compensation module 2 includes a signal processing circuit 21, an FPGA device 22, and a harmonic compensation circuit 23. The signal processing circuit 21 receives the voltage signal and the current signal collected by the voltage transformer 11 and the current transformer 12, and processes the voltage signal and the current signal to obtain a processed signal and output it to the FPGA device 22. The FPGA device 22 calculates the harmonics of the processed signal to obtain a harmonic suppression signal and outputs it to the harmonic compensation circuit 23. The harmonic compensation circuit 23 filters the signal and outputs it to the inverter module 31 of the converter 3.

[0051] Reference Figure 1 and Figure 2 The signal processing circuit 21 includes a voltage signal conditioning circuit 211 and an AD sampling circuit 212. The voltage signal conditioning circuit 211 includes an operational amplifier U1, a resistor R1, a resistor R2, a capacitor C1, and a capacitor C2. The resistor R1 is connected in series between the non-inverting input terminal of the operational amplifier U1 and the secondary coil of the voltage transformer 11. One end of the capacitor C1 is connected in parallel between the resistor R1 and the non-inverting input terminal of the operational amplifier U1. The other end of the capacitor C1 is connected in parallel to the secondary coil of the voltage transformer 11, and the other end of the capacitor C1 is connected in parallel to the secondary coil of the voltage transformer 11. One end is connected in parallel to the ground, the inverting input end of the operational amplifier U1 is connected in parallel to the output end of the operational amplifier U1, the eighth pin of the operational amplifier U1 is electrically connected to the +12V power supply end, the fourth pin of the operational amplifier U1 is electrically connected to the -12V power supply end, the resistor R2 is connected in series between the output end of the operational amplifier U1 and the AD sampling circuit 212, one end of the capacitor C2 is connected in parallel between the resistor R2 and the AD sampling circuit 212, and the other end of the capacitor C2 is grounded. The AD sampling circuit 212 samples to obtain a voltage acquisition signal.

[0052] Reference Figure 1 and Figure 3, the signal processing circuit 21 includes a current signal conditioning circuit 213, the current signal conditioning circuit 213 includes operational amplifier U2, operational amplifier U3, resistance R3, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8, resistance R9, resistance R10, capacitor C3, capacitor C4, diode D1, diode D2, resistance R3 is connected in series between the inverting input terminal of operational amplifier U2 and the secondary coil of current transformer 12, the other end of the secondary coil of current transformer 12 is grounded, resistance R4 and resistance R6 are electrically connected between the inverting input terminal of operational amplifier U2 and the inverting input terminal of operational amplifier U3, resistance R5 and resistance R7 are electrically connected between the inverting input terminal of operational amplifier U2 and the non-inverting input terminal of operational amplifier U3, the non-inverting input terminal of operational amplifier U2 is grounded, the inverting input terminal of operational amplifier U2 is electrically connected on the output terminal of operational amplifier U2, the negative pole of diode D1 is connected in parallel on the output terminal of operational amplifier U2, the positive pole of diode D1 is connected in parallel between resistance R4 and resistance R6, the positive pole of diode D2 is connected in parallel on the output terminal of operational amplifier U2, the negative pole of diode D2 is connected in parallel between resistance R5 and resistance R7, resistance R10 and capacitor C4 are connected in series between the output terminal of operational amplifier U3 and the ground terminal GND, one end of resistance R8 is connected in parallel on the output terminal of operational amplifier U3, the other end of resistance R8 is connected in parallel between resistance R6 and resistance R4, one end of resistance R9 is connected in parallel between the output terminal of operational amplifier U3 and resistance R8, the other end of resistance R9 is electrically connected on the AD sampling circuit 212 to sample the current collection signal, one end of capacitor C3 is connected in parallel between resistance R9 and AD sampling circuit 212, the other end of capacitor C3 is grounded.

[0053] With reference to Figure 4 , the harmonic compensation circuit 23 includes resistance R11, resistance R12, resistance R13, resistance R14, capacitor C5, capacitor C6, capacitor C7, one end of inverter module 31 is electrically connected on FPGA 22 to receive harmonic suppression signal, the other end of inverter module 31 is connected in parallel through resistance R11, resistance R12, resistance R13, capacitor C6 in series between FPGA 22 and one end of inverter module 31, one end of resistance R14 is connected in parallel between resistance R13 and capacitor C6, the other end of resistance R14 is electrically connected on one end of capacitor C7, the other end of capacitor C7 is connected in parallel between capacitor C6 and resistance R13, one end of capacitor C5 is connected in parallel between resistance R12 and resistance R13, the other end of capacitor C5 is connected in parallel between resistance R14 and capacitor C7.

[0054] With reference to Figure 5The protection circuit 4 further comprises an operational amplifier A, a transistor Q1, a transistor Q2, a resistor R15, and a capacitor C8. The non-inverting input of the operational amplifier A is electrically connected to the secondary coil of the voltage transformer 11. The first end of the transistor Q1 is connected in parallel to the non-inverting input of the operational amplifier A. The second end of the transistor Q1 is electrically connected to the output of the operational amplifier A. The third end of the transistor Q1 is electrically connected to the first end of the transistor Q2. The second end of the transistor Q2 is connected in parallel between the transistor Q1 and the output of the operational amplifier A. The third end of the transistor Q2 is grounded. One end of the resistor R15 is connected in parallel between the transistor Q1 and the transistor Q2. The other end of the resistor R15 is electrically connected to the inverter module 31. One end of the capacitor C8 is connected in parallel between the resistor R15 and the inverter module 31. The other end of the capacitor C8 is grounded.

[0055] With reference to Figure 6 The protection circuit 4 further comprises an optical coupler OC, a transistor Q3, a transistor Q4, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor R20, a resistor R21, a diode D3, and a diode D4. One end of the light receiver of the optical coupler OC is electrically connected to the secondary coil of the current transformer 12. The other end of the light receiver of the optical coupler OC is grounded. The positive electrode of the light source of the optical coupler OC is electrically connected to one end of the resistor R18. The other end of the resistor R18 is electrically connected to the collector of the transistor Q3. The negative electrode of the light source of the optical coupler OC is grounded. The resistor R16 and the resistor R17 are connected in series between the emitter of the transistor Q3 and the inverter module 31. One end of the resistor R19 is connected in parallel to the base of the transistor Q3. One end of the diode D3 is electrically connected to the other end of the resistor R19. The other end of the diode D3 is connected in parallel between the resistor R16 and the inverter module 31. One end of the capacitor C9 is connected in parallel between the emitter of the transistor Q3 and the resistor R17. The other end of the capacitor C9 is connected in parallel between the resistor R16 and the inverter module 31. The base of the transistor Q4 is connected in parallel between the resistor R18 and the collector of the transistor Q3. The collector of the transistor Q4 is connected in parallel between the base of the transistor Q3 and the resistor R19. The emitter of the transistor Q4 is electrically connected to one end of the resistor R20. The other end of the resistor R20 is connected in parallel to the negative electrode of the light source of the optical coupler OC. The negative electrode of the diode D4 is connected in parallel between the resistor R16 and the inverter module 31. The positive electrode of the diode D4 is electrically connected to one end of the resistor R21. The other end of the resistor R21 is connected in parallel to the negative electrode of the light source of the optical coupler OC.

[0056] With reference to Figure 1The frequency converter 3 comprises a temperature management circuit 32, which can comprise a temperature sensor, a temperature controller and a cooling fan. The temperature sensor is used to detect the temperature of the frequency converter 3, and outputs a temperature detection signal to the temperature controller. Then, the temperature controller calculates the temperature detection signal with a preset temperature threshold value, and determines whether the frequency converter 3 needs to be cooled. If the frequency converter 3 needs to be cooled, the cooling fan is controlled to work.

[0057] With reference to Figure 1 The current-limiting thermal relay 5 is electrically connected to the signal acquisition circuit 1 to receive power supply and output corresponding on-off control signals. The contactor 51 receives the on-off control signals and is electrically connected to the output end of the frequency converter 3 to perform on-off control.

[0058] The implementation principle of the harmonic suppression circuit of the frequency converter protection device in the embodiment of the present application is as follows: the signal acquisition circuit 1 acquires the input of the AC power grid and receives power supply, then the compensation module 2 filters the input to remove high-order harmonics, and then the inverter module 31 inverses the DC into AC to output, thereby suppressing the harmonics generated by the mine-used frequency converter.

[0059] The above are preferred embodiments of the present application, and are not intended to limit the protection scope of the present application. Therefore, any equivalent changes made according to the structure, shape and principle of the present application shall be covered within the protection scope of the present application.

Claims

1. A harmonic suppression circuit for a frequency converter protection device, characterized by The application relates to a harmonic compensation device for an alternating current power grid, which comprises the following parts: a signal acquisition circuit (1) which is electrically connected to an alternating current power grid to receive power supply, and which is used for acquiring current and voltage to obtain acquisition signals and output the acquisition signals; a compensation module (2) which receives the acquisition signals, and which is used for calculating the acquisition signals to obtain harmonic suppression signals and output the harmonic suppression signals; a frequency converter (3) which comprises an inverter module (31), and which receives power supply from the output end of the signal acquisition circuit (1), and which receives the harmonic suppression signals to perform harmonic compensation.

2. A harmonic suppression circuit for a frequency converter protection device according to claim 1, characterized in that The signal acquisition circuit (1) comprises the following parts: the acquisition signals comprise voltage signals and current signals; a voltage transformer (11) which is used for receiving and acquiring voltage input by an alternating current power grid to obtain the voltage signals and output the voltage signals; a current transformer (12) which is used for receiving and acquiring current input by an alternating current power grid to obtain the current signals and output the current signals.

3. A harmonic suppression circuit for a frequency converter protection device according to claim 2, characterized in that The compensation module (2) comprises the following parts: a signal processing circuit (21) which receives the acquisition signals, and which is used for calculating the acquisition signals to obtain processing signals; an FPGA device (22) which receives the processing signals, and which is used for calculating the processing signals to obtain the harmonic suppression signals and output the harmonic suppression signals; a harmonic compensation circuit (23) which receives the harmonic suppression signals, and which is used for filtering the harmonic suppression signals to output the harmonic suppression signals to the frequency converter (3).

4. The harmonic suppression circuit of a frequency converter protection device according to claim 3, characterized in that: The signal processing circuit (21) comprises a voltage signal conditioning circuit (211) and an AD sampling circuit (212), the voltage signal conditioning circuit (211) comprises an operational amplifier U1, the non-inverting input end of the operational amplifier U1 is electrically connected to a secondary coil of the voltage transformer (11), the inverting input end of the operational amplifier U1 is electrically connected to the output end of the operational amplifier U1, the output end of the operational amplifier U1 is electrically connected to the AD sampling circuit (212), and the AD sampling circuit (212) samples voltage acquisition signals.

5. A harmonic suppression circuit for a frequency converter protection device according to claim 4, characterized in that: The signal processing circuit (21) further comprises a current signal conditioning circuit (213), the current signal conditioning circuit (213) comprises an operational amplifier U2 and an operational amplifier U3, the inverting input end of the operational amplifier U2 and the inverting input end of the operational amplifier U3 are both electrically connected to a secondary coil of the current transformer (12), the inverting input end of the operational amplifier U2 is electrically connected to the output end of the operational amplifier U2, the output end of the operational amplifier U2 is electrically connected to the non-inverting input end of the operational amplifier U3, the inverting input end of the operational amplifier U3 is electrically connected to the output end of the operational amplifier U3, the output end of the operational amplifier U3 is electrically connected to the AD sampling circuit (212), and the AD sampling circuit (212) samples current acquisition signals.

6. The harmonic suppression circuit of a frequency converter protection device according to claim 3, characterized in that: The harmonic compensation circuit (23) comprises resistors R11, R13, R14, capacitors C5, C6, C7, one end of the inverter module (31) is electrically connected to the FPGA (22) to receive the harmonic suppression signal, the resistor R11, the resistor R13, and the capacitor C6 are connected in series on the other end of the inverter module (31), and the other end of the inverter module (31) is connected in parallel to the FPGA (22), the capacitor C7 and the resistor R14 are connected in series and connected in parallel between the resistor R13 and the capacitor C6, and the capacitor C5 is connected in parallel to the resistor R13 and the resistor R14.

7. The harmonic suppression circuit of a frequency converter protection device of claim 2, wherein: The protection circuit (4) is also connected to the inverter module (31) and receives the collected signal, and the protection circuit (4) comprises an operational amplifier A and a transistor Q1, the non-inverting input of the operational amplifier A is electrically connected to the secondary coil of the voltage transformer (11), and the output of the operational amplifier A and the non-inverting input of the operational amplifier A are electrically connected to the inverter module (31) through the transistor Q1.

8. A harmonic suppression circuit for a frequency converter protection device according to claim 7, characterized in that: The protection circuit (4) further comprises an optoelectronic coupler OC, a transistor Q3, a transistor Q4, and a bidirectional trigger diode D3, the light receiver of the optoelectronic coupler OC is electrically connected to the secondary coil of the current transformer (12), the anode of the light source of the optoelectronic coupler OC is electrically connected to the collector of the transistor Q3, the cathode of the light source of the optoelectronic coupler OC is grounded, the emitter and the base of the transistor Q3 are electrically connected, the base of the transistor Q3 and the collector of the transistor Q4 are electrically connected to the inverter module (31) through the bidirectional trigger diode D3, the base of the transistor Q4 is electrically connected to the collector of the transistor Q3, and the emitter of the transistor Q4 is grounded.

9. The harmonic suppression circuit of a frequency converter protection device of claim 1, wherein: The frequency converter (3) comprises a temperature management circuit (32) for detecting the temperature of the frequency converter (3) to obtain a temperature detection signal, and then calculating the temperature detection signal with a preset temperature threshold to determine whether to cool the frequency converter (3).

10. The harmonic suppression circuit of a frequency converter protection device of claim 1, wherein, Further comprising: A current-limiting thermal relay (5) is electrically connected to the signal collection circuit (1) to receive power supply and output a corresponding on-off control signal; A contactor (51) receives the on-off control signal and is electrically connected to the output end of the frequency converter (3) to control the on-off.

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