Self-locking circuit on computer mainboard

By designing a self-locking circuit on the computer motherboard that includes a PNP transistor, an NPN transistor, an N-channel MOSFET, and a signal isolation circuit, the problems of stability and reliability of self-locking circuits are solved, and a simple and efficient self-locking function is achieved.

CN223463002UActive Publication Date: 2025-10-21HEFEI ZHUOYI HENGTONG INFORMATION SECURITY CO LTD
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Patent Information

Application Number
CN202422143674.9
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-09-02
Publication Date
2025-10-21
Estimated Expiration
2034-09-02

AI Technical Summary

Technical Problem

The existing self-locking circuits on computer motherboards are insufficient in terms of stability and reliability, and are easily interfered with, making it difficult to meet the requirements of different application scenarios and loads.

Method used

It adopts a self-locking circuit structure consisting of a first PNP transistor, an NPN transistor, a second PNP transistor, an N-channel MOSFET, a signal isolation circuit, and multiple resistors. It achieves a stable and reliable self-locking function through signal isolation and resistor voltage division.

Benefits of technology

It achieves stability and reliability of the self-locking circuit on the computer motherboard, avoids false triggering, and has a simple structure and high integration.

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Abstract

The utility model relates to a self-locking circuit on a computer mainboard. A trigger signal is input into an input end of a signal isolation circuit, and a self-locking signal is output from an output end; the output end of the signal isolation circuit is electrically connected with the base electrode of a first PNP type triode and the collector electrode of an NPN type triode, the emitter electrode of the NPN type triode is grounded, the base electrode of the NPN type triode is electrically connected with the collector electrode of the first PNP type triode and is grounded through a second resistor, the emitter electrode of the first PNP type triode is electrically connected with the base electrode of a second PNP type triode, and the emitter electrode of the second PNP type triode is electrically connected with the collector electrode of the NPN type triode. An emitter of the second PNP type triode is electrically connected with a 5V standby power supply of the mainboard through a first resistor, and a collector of the second PNP type triode is grounded through a third resistor and a fourth resistor which are connected in series; and the grid electrode of the N-channel MOS tube is electrically connected between the third resistor and the fourth resistor, the source electrode is grounded, and the drain electrode outputs a power supply control signal. The utility model has the advantages of stability, reliability, simple structure and high integration level.
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Description

TECHNICAL FIELD

[0001] The utility model relates to electronic computer technical field especially, it relates to a self locking circuit on computer mainboard. BACKGROUND

[0002] The self locking circuit is a kind of circuit, once press switch, circuit can be automatically kept continuous power supply until other switch is pressed and it is disconnected for stopping.But in the usual circuit, press switch, circuit is powered on;Release switch, circuit is disconnected.

[0003] At present in the electronic technical field, with the continuous development of integrated circuit, the realization mode of self locking circuit is more and more diversified and miniaturization, so that it is widely applied in various electronic equipment.From the technical point of view, the design of self locking circuit needs to consider the stability, reliability, anti-interference ability and multiple factors of circuit.Meanwhile, according to different application scenarios and load requirements, appropriate electrical elements and parameters are selected, so that the circuit can not be mis-triggered, and can be stably and reliably latched in locking state.

[0004] There are various circuits on computer mainboard, and self locking circuit is also indispensable.Therefore, developing stable and reliable self locking circuit suitable for computer mainboard is the long-term demand in the field. SUMMARY

[0005] Therefore, the purpose of the utility model is to provide a stable and reliable self locking circuit on computer mainboard.

[0006] To achieve the above object, the utility model provides a self locking circuit on computer mainboard, comprising: first PNP type triode, NPN type triode, second PNP type triode, N channel MOS tube, signal isolation circuit, first resistance, second resistance, third resistance and fourth resistance;Low-level trigger signal is input to the input end of signal isolation circuit, and after being converted into low-level self locking signal, it is output from the output end of signal isolation circuit;The output end of signal isolation circuit is electrically connected with the base of first PNP type triode and the collector of NPN type triode, the emitter of NPN type triode is grounded, the base of NPN type triode is electrically connected with the collector of first PNP type triode and grounded via second resistance, the emitter of first PNP type triode is electrically connected with the base of second PNP type triode, the emitter of second PNP type triode is electrically connected with the 5V standby power supply of mainboard via first resistance, the collector of second PNP type triode is grounded via the third resistance and fourth resistance in series;The gate of N channel MOS tube is electrically connected between third resistance and fourth resistance, the source is grounded, and the drain outputs power supply control signal.

[0007] The signal isolation circuit comprises LMBT3904DW1T1G; the No.5 pin of LMBT3904DW1T1G is used as the input end of the signal isolation circuit, the No.6 pin is used as the output end of the signal isolation circuit, the No.1 and No.4 pins are grounded, and the No.2 and No.3 pins are electrically connected to the 3.3V power supply on the mainboard through the fifth resistor.

[0008] The fifth resistor is 10000 ohms.

[0009] The first PNP type triode and the second PNP type triode are LDTB114ELT1G.

[0010] The NPN type triode is LMBT3904LT1G.

[0011] The N channel MOS tube is L2N7002WT1G.

[0012] The first resistor is 1000 ohms, and the second resistor is 20000 ohms.

[0013] The third resistor is 1000 ohms, and the fourth resistor is 100000 ohms.

[0014] In conclusion, the self-locking circuit on the computer mainboard is stable and reliable, has a simple structure and high integration. BRIEF DESCRIPTION OF DRAWINGS

[0015] The technical scheme and other beneficial effects of the present application will be apparent from the following detailed description of the specific embodiments of the present application with reference to the accompanying drawings. In the drawings,

[0016] Figure 1 It is a circuit diagram of a preferred embodiment of the self-locking circuit on the computer mainboard. DETAILED DESCRIPTION

[0017] Referring to Figure 1It is the circuit diagram of the self-locking circuit of the computer mainboard of the utility model a preferable embodiment. The self-locking circuit in this preferable embodiment can be applied to the computer mainboard and mainly comprises: PNP triode PQ13, NPN triode PQ15, PNP triode PQ12, N-channel MOS tube PQ14, signal isolation circuit PQ3, resistance PR21, resistance PR25, resistance PR22 and resistance PR26; the input end of the signal isolation circuit PQ3 is input with the trigger signal TS_OVER # of low level, and after being converted into the self-locking signal SHDN_LOCK # of low level, it is output from the output end of the signal isolation circuit PQ3; the output end of the signal isolation circuit PQ3 is electrically connected with the base of the PNP triode PQ13 and the collector of the NPN triode PQ15, the emitter of the NPN triode PQ15 is grounded, the base of the NPN triode PQ15 is electrically connected with the collector of the PNP triode PQ13 and grounded via the resistance PR25, the emitter of the PNP triode PQ13 is electrically connected with the base of the PNP triode PQ12, the emitter of the PNP triode PQ12 is electrically connected with the 5V standby power supply P5VSB of the mainboard via the resistance PR21, the collector of the PNP triode PQ12 is grounded via the resistance PR22 and the resistance PR26 connected in series; the gate of the N-channel MOS tube PQ14 is electrically connected between the resistance PR22 and the resistance PR26, the source is grounded, and the drain outputs the power supply control signal ATX_PSON.

[0018] In this preferable embodiment, the signal isolation circuit PQ3 comprises LMBT3904DW1T1G; the No.5 pin of LMBT3904DW1T1G is used as the input end of the signal isolation circuit PQ3, the No.6 pin is used as the output end of the signal isolation circuit PQ3, the No.1 and No.4 pins are grounded, and the No.2 and No.3 pins are electrically connected with the 3.3V power supply P3V3 on the mainboard via the resistance PR4. The specific size of the resistance PR4 can be 10000 ohms.

[0019] In this preferable embodiment, the PNP triode PQ13 and the PNP triode PQ12 are specifically LDTB114ELT1G. The NPN triode PQ15 is specifically LMBT3904LT1G. The N-channel MOS tube PQ14 is specifically L2N7002WT1G.

[0020] The utility model discloses a circuit design, adopt a PNP triode PQ13 and a NPN triode PQ15 to realize self-locking. PQ3 plays a signal isolation role, and the self-locking signal SHDN_LOCK needs to be specially prevented from being interfered with to avoid false triggering. PQ12 plays a switch tube role. PQ14 plays an isolation role and flips a signal. Trigger signal TS_OVER is low effective, and after the self-locking of TS_OVER low pulse trigger, power supply control signal ATX_PSON is locked to low level to be used to shut off the total power supply of the mainboard.

[0021] In this preferred embodiment, the voltage division at pin 3 of PQ13 needs to exceed 0.7V, which is divided by PR21+PQ12 internal resistance and PR25, and the typical value of R1 and R2 integrated in LDTB114ELT1G triode is 10000 ohms, thus, the resistance PR21 is specifically 1000 ohms, and the resistance PR25 is specifically 20000 ohms.

[0022] In this preferred embodiment, the voltage division at pin 1 of PQ14 needs to exceed 2.5V and be within the Vgs of PQ14, which is divided by PR21+PR22 and PR26, thus, the resistance PR22 is specifically 1000 ohms, and the resistance PR26 is specifically 100000 ohms.

[0023] In conclusion, the self-locking circuit on the computer mainboard is stable and reliable, simple in structure, and high in integration.

[0024] The above description is for the ordinary skilled in the art, and various corresponding changes and deformations can be made according to the technical scheme and technical concept of the utility model, and all the changes and deformations shall belong to the protection scope of the appended claims of the utility model.

Claims

1. A self-locking circuit on a computer motherboard, characterized by, The signal isolation circuit (PQ3) includes LMBT3904DW1T1G; the No. 5 pin of LMBT3904DW1T1G is used as the input end of the signal isolation circuit (PQ3), the No. 6 pin is used as the output end of the signal isolation circuit (PQ3), the No. 1 and No. 4 pins are grounded, and the No. 2 and No. 3 pins are electrically connected to the 3.3V power supply (P3V3) on the mainboard through the fifth resistor (PR4). The fifth resistor (PR4) is 10000 ohms.

2. The self-latching circuit of claim 1, wherein, The first PNP transistor (PQ13) and the second PNP transistor (PQ12) are LDTB114ELT1G.

3. The self-latching circuit of claim 2, wherein, The NPN transistor (PQ15) is LMBT3904LT1G.

4. The self-latching circuit of claim 1, wherein, The N-channel MOS tube (PQ14) is L2N7002WT1G.

5. The self-latching circuit of claim 1, wherein, The first resistor (PR21) is 1000 ohms, and the second resistor (PR25) is 20000 ohms.

6. The self-latching circuit of claim 1, wherein, The third resistor (PR22) is 1000 ohms, and the fourth resistor (PR26) is 100000 ohms.

7. The self-latching circuit of claim 4, wherein, ​ 8. The self-latching circuit of claim 1, wherein, ​