Photodetector device

Abstract

Various embodiments of the utility model relate to an optical detector device, which can comprise an absorption area, and the absorption area is formed to have an increased depth (or thickness) in a direction approximately parallel to the direction of incident light to be projected onto the absorption area. The increasing depth of the absorption region in a direction substantially parallel to the direction of the incident light enables the incident light to be more uniformly distributed along the length of the absorption region in the direction substantially parallel to the direction of the incident light. This reduces the likelihood that a particular region of the absorption region reaches optical saturation, so that the photodetector device can be enabled to operate with persistent high photodetector sensitivity and / or persistent high photodetection performance, etc.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to a photodetector device. BACKGROUND

[0002] A photodetector is a semiconductor device configured to receive incoming photons of light and convert the photons to an electrical signal. The electrical signal can include, among other examples, a current (referred to as photocurrent) and / or a voltage. The photons generate electron / hole pairs in an absorption region of the photodetector. The electrons and holes are separated and collected at opposite doped collection regions. SUMMARY

[0003] An aspect of the present application provides a photodetector device. The photodetector device includes a waveguide and a photodetector coupled to the waveguide. The photodetector includes an intrinsic semiconductor substrate including a first semiconductor material, a first type doped collection region in the intrinsic semiconductor substrate, a second type doped collection region in the intrinsic semiconductor substrate, and an absorption region including a second semiconductor material in the semiconductor substrate between the first type doped collection region and the second type doped collection region. The absorption region includes a stepped profile or a tapered profile in a direction substantially parallel to a direction in which the photodetector receives incoming light from the waveguide.

[0004] Another aspect of the present application provides a photodetector device. The photodetector device includes a waveguide and a photodetector coupled to the waveguide. The photodetector includes an intrinsic semiconductor substrate including a first semiconductor material, a first type doped collection region in the intrinsic semiconductor substrate, a second type doped collection region in the intrinsic semiconductor substrate, and an absorption region including a second semiconductor material in the semiconductor substrate between the first type doped collection region and the second type doped collection region. The absorption region includes a tapered profile in a direction substantially parallel to a direction in which the photodetector receives incoming light from the waveguide.

[0005] Yet another aspect of the present application provides a method of forming a photodetector device. The method includes forming a mask layer over a substrate. The method also includes forming a pattern in the mask layer, where the pattern includes a plurality of regions of the mask layer having different heights. The method also includes etching the substrate in an etching operation based on the pattern to form a recess in the substrate, and the recess has segments in the substrate having different depths. The method also includes forming an absorption region of a photodetector in the recess.

[0006] In order to make the above features and advantages of the present application more apparent, the following embodiments are described in detail, and the accompanying drawings are described as follows. BRIEF DESCRIPTION OF DRAWINGS

[0007] FIG. 1is a diagram of an example environment in which systems and / or methods, as set forth herein, can be implemented.

[0008] FIGS. 2A-2E is a diagram of an example implementation of a light detector as set forth herein.

[0009] FIGS. 3A-3C is a diagram of an example implementation of a light detector device as set forth herein.

[0010] FIGS. 4A-4W is a diagram of an example implementation of a light detector device as set forth herein.

[0011] FIGS. 5A-5F is a diagram of an example implementation of a light detector device as set forth herein.

[0012] FIGS. 6A-6S is a diagram of an example implementation of a light detector device as set forth herein.

[0013] FIGS. 7A-7C is a diagram of an example implementation of a light detector device as set forth herein.

[0014] FIGS. 8A-8C is a diagram of an example implementation of a light detector device as set forth herein.

[0015] FIG. 9 is a diagram of an example component of a device as set forth herein.

[0016] FIG. 10 is a flow diagram of an example process related to forming a light detector device as set forth herein. DETAILED DESCRIPTION

[0017] The present disclosure provides many different embodiments or instances for implementing various features of the provided subject matter. These are not meant to be exhaustive or limiting. The following description is presented in terms of specific embodiments. However, each of the embodiments can be achieved and practiced in a variety of ways. For example, the description of the first feature being formed on or over the second feature in the following description can include embodiments where the first feature is formed directly contacting the second feature, and can also include embodiments where additional features can be formed between the first feature and the second feature such that the first feature and the second feature can not be directly contacting. Additionally, the present disclosure can repeat reference numerals and / or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and / or configurations discussed.

[0018] Moreover, spatially relative terms, such as "beneath", "below", "lower", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The devices can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0019] Photodetectors have many use cases, including light detection, ranging (e.g., lidar), optical communication, and cameras, among others. Germanium (Ge) is sometimes used for the absorption region of a photodetector. Relative to other types of absorption materials (e.g., silicon (Si)), germanium can provide faster carrier collection, lower dark current, and / or increased bandwidth, and enable effective integration with silicon-based circuitry. Moreover, germanium has a direct bandgap of approximately 0.8 electron volts (eV), making it particularly suitable for absorbing light in the near-infrared (NIR) spectrum. Thus, germanium can be used in photodetectors to achieve excellent low- visible light performance.

[0020] Within the range of the absorption region of a photodetector, the light power distribution of incident light on the photodetector can be non-uniform. Non-uniform distribution of light power across the range of the absorption region can cause certain areas of the absorption region to reach optical saturation, while other areas of the absorption region do not reach optical saturation. Optical saturation can occur when too many charge carriers (e.g., electrons and holes) shield the built-in electric field in the absorption region. Optical saturation limits further absorption of light, which means that once optical saturation is reached, the photodetector cannot detect increasing levels of light power. Optical saturation can cause reduced sensitivity of the photodetector and reduced light detection performance of the photodetector, among other examples.

[0021] In some implementations set forth herein, a photodetector can include an absorption region between doped collection regions. The absorption region is formed to have an increasing depth (or thickness) in a direction that is approximately parallel to a direction of incident light to be projected onto the absorption region. The increasing depth of the absorption region can be implemented in a stepped profile (e.g., the thickness of the absorption region increases in a discontinuous step), a tapered profile (e.g., the thickness of the absorption region increases along a continuous gradient), and / or can be implemented in another profile.

[0022] The increased depth of the absorption region in the direction generally parallel to the direction of the incident light enables the incident light to be more evenly distributed along the length of the absorption region in the direction generally parallel to the direction of the incident light (e.g., relative to an absorption region having a single thickness). This reduces the likelihood of certain areas of the absorption region reaching optical saturation, which can enable the photodetector to operate with sustained high photodetector sensitivity and / or sustained high photodetector performance, among other possibilities.

[0023] Furthermore, the photodetector can be formed to include multiple absorption regions, each having a different region of increasing thickness in the direction generally parallel to the direction of the incident light. The absorption regions can be configured to absorb photons of a particular wavelength range of light, which can further reduce the likelihood of optical saturation and / or can enable the photodetector to operate as a wavelength separator or filter.

[0024] FIG. 1 is a diagram of an example environment 100 in which the systems and / or methods described herein can be implemented. As shown in FIG. 1 The environment 100 can include a plurality of semiconductor processing tools 102-114 and a wafer / die transport tool 116, as shown in The plurality of semiconductor processing tools 102-114 can include a deposition tool 102, an exposure tool 104, a development tool 106, an etching tool 108, a planarization tool 110, a plating tool 112, an ion implantation tool 114, and / or another type of semiconductor processing tool. The tools included in the example environment 100 can be included in a semiconductor cleanroom, a semiconductor foundry, a semiconductor processing facility, and / or a manufacturing facility, among other possibilities.

[0025] Deposition tool 102 is a semiconductor processing tool including a semiconductor processing chamber and one or more devices capable of depositing various types of materials onto a substrate. In some embodiments, deposition tool 102 includes a spin-on tool capable of depositing a photoresist layer on a substrate (e.g., a wafer). In some embodiments, deposition tool 102 includes a chemical vapor deposition (CVD) tool, such as a plasma-enhanced CVD (PECVD) tool, a low-pressure CVD (LPCVD) tool, a high-density plasma CVD (HDP-CVD) tool, a sub-atmospheric CVD (SACVD) tool, an atomic layer deposition (ALD) tool, a plasma-enhanced atomic layer deposition (PEALD) tool, or another type of CVD tool. In some embodiments, deposition tool 102 includes a physical vapor deposition (PVD) tool, such as a sputtering tool or another type of PVD tool. In some embodiments, exemplary environment 100 includes multiple types of deposition tools 102.

[0026] Exposure tool 104 is a semiconductor processing tool capable of exposing a photoresist layer to a source of radiation, such as an ultraviolet (UV) light source (e.g., a deep UV light source, an extreme UV (EUV) light source, and / or the like), an x-ray source, an electron beam (e-beam) source, and / or the like. Exposure tool 104 can expose a photoresist layer to a source of radiation to transfer a pattern from a mask to the photoresist layer. The pattern can include one or more semiconductor device layer patterns for forming one or more semiconductor devices, can include a pattern for forming one or more structures of a semiconductor device, can include a pattern for etching various portions of a semiconductor device, and / or the like. In some embodiments, exposure tool 104 includes a scanner, a stepper, or a similar type of exposure tool.

[0027] The developing tool 106 is a semiconductor processing tool capable of developing a photoresist layer that has been exposed to a radiation source to develop a pattern transferred to the photoresist layer from the exposure tool 104. In some implementations, the developing tool 106 develops the pattern by removing unexposed portions of the photoresist layer. In some implementations, the developing tool 106 develops the pattern by removing exposed portions of the photoresist layer. In some implementations, the developing tool 106 develops the pattern by dissolving exposed or unexposed portions of the photoresist layer using a chemical developer.

[0028] The etching tool 108 is a semiconductor processing tool capable of etching various types of materials of a substrate, wafer, or semiconductor device. For example, the etching tool 108 can include a wet etching tool, a dry etching tool, and / or the like. In some implementations, the etching tool 108 includes a chamber filled with an etchant, and a substrate is placed in the chamber for a particular period of time to remove a particular amount of one or more portions of the substrate. In some implementations, the etching tool 108 can etch one or more portions of a substrate using plasma etching or plasma-assisted etching, which can involve using ionized gas to isotropically or directionally etch the one or more portions. In some implementations, the example environment 100 includes multiple types of etching tools 108.

[0029] The planarization tool 110 is a semiconductor processing tool capable of grinding or planarizing various layers of a wafer or semiconductor device. For example, the planarization tool 110 can include a chemical mechanical planarization (CMP) tool that grinds or planarizes a layer or surface of deposited or plated material, and / or another type of planarization tool. The planarization tool 110 can utilize a combination of chemical and mechanical forces (e.g., chemical etching and free abrasive polishing) to grind or planarize a surface of a semiconductor device. The planarization tool 110 can utilize abrasive and corrosive chemical slurries in conjunction with a polishing pad and retaining ring (e.g., typically having a larger diameter than the semiconductor device). The polishing pad and semiconductor device can be pressed together by a dynamic polishing head and held in place by the retaining ring. The dynamic polishing head can be rotated using different axes of rotation to remove material and level any irregularities of the semiconductor device, thereby flattening or planarizing the semiconductor device. In some implementations, the example environment 100 includes multiple types of planarization tools 110 (e.g., CMP tools, wafer grinding tools).

[0030] The plating tool 112 is a semiconductor processing tool capable of plating a substrate (e.g., a wafer, a semiconductor device, and / or the like) or a portion thereof with one or more metals. For example, the plating tool 112 can include a copper electroplating device, an aluminum electroplating device, a nickel electroplating device, a tin electroplating device, a compound material or alloy (e.g., tin-silver, tin-lead, and / or the like) electroplating device, and / or an electroplating device for one or more other types of conductive materials, metals, and / or similar types of materials.

[0031] The ion implantation tool 114 is a semiconductor processing tool capable of implanting ions into a substrate. The ion implantation tool 114 can generate ions from a source material, such as a gas or a solid, in an arc chamber. The source material can be provided into the arc chamber, and an arc voltage discharges between a cathode and an electrode to generate a plasma containing ions of the source material. One or more extraction electrodes can be used to extract ions from the plasma within the arc chamber and accelerate the ions to form an ion beam. The ion beam can be directed toward a substrate such that the ions are implanted beneath a surface of the substrate.

[0032] The wafer / die transport tool 116 can be included in a cluster tool or another type of tool including multiple processing chambers, and can be configured to transport substrates and / or semiconductor devices between the multiple processing chambers, between a processing chamber and a buffer region, between a processing chamber and an interface tool (e.g., an equipment front end module (EFEM)), between a processing chamber and a transport carrier (e.g., a front opening unified pod (FOUP)), and / or the like. In some embodiments, the wafer / die transport tool 116 can be included in the multi-chamber (or cluster) deposition tool 102, which can include a pre-clean processing chamber (e.g., for cleaning or removing oxides, oxidation, and / or other types of contaminants or byproducts from a substrate and / or semiconductor device) and multiple types of deposition processing chambers (e.g., processing chambers for depositing different types of materials, processing chambers for carrying out different types of deposition operations).

[0033] In some embodiments, one or more of the semiconductor processing tools 102-114 and / or the wafer / die transport tool 116 may perform one or more semiconductor processing operations described herein. For example, one or more of the semiconductor processing tools 102-114 and / or the wafer / die transport tool 116 may form a mask layer over a substrate; may form a pattern in the mask layer, wherein the pattern includes a plurality of regions of the mask layer having different heights; may etch the substrate based on the pattern in an etching operation to form a recess in the substrate having sections of different depths in the substrate; and / or may form an absorption region of a light detector in the recess. In some embodiments, one or more of the semiconductor processing tools 102-114 and / or the wafer / die transport tool 116 may perform a combination of FIGS. 4A-4W 、 FIGS. 6A-6S , and / or FIG. 10 One or more semiconductor processing operations described above.

[0034] FIG. 1 The number and arrangement of the devices shown in are provided as one or more examples. FIG. 1 In the apparatus shown in , there may be additional apparatuses, fewer apparatuses, different apparatuses, or apparatuses arranged differently. FIG. 1 Two or more of the devices shown in FIG may be implemented in a single device, or FIG. 1 A single device shown in the example environment 100 may be implemented as multiple distributed devices. Additionally, or alternatively, one or more devices of the example environment 100 may implement one or more functions described as being implemented by another device of the example environment 100.

[0035] FIGS. 2A-2E is a diagram of an exemplary embodiment of a photodetector 200 described herein. Photodetector 200 includes a semiconductor device configured to generate a current, a voltage, and / or another type of output based on absorbed photons of light. Photodetector 200 can be a standalone device or can be included in another device, such as a photodetector device including a waveguide configured to direct incident light toward photodetector 200.

[0036] like FIG. 2AAs shown in the exemplary embodiment of the photodetector 200, the photodetector 200 can include a p-doped collection region 202 and an n-doped collection region 204. The p-doped collection region 202 can include a portion of a semiconductor substrate 206 doped with one or more p-type dopants (e.g., boron (B) and / or indium (In), among others). The n-doped collection region 204 can include a portion of the semiconductor substrate 206 doped with one or more n-type dopants (e.g., phosphorus (P) and / or arsenic (As), among others). The semiconductor substrate 206 can be an intrinsic semiconductor substrate, as the semiconductor substrate 206 can include an undoped semiconductor material, such as undoped silicon (Si), undoped germanium (Ge), undoped indium phosphide (InP), and / or undoped gallium arsenide (GaAs), among others.

[0037] An absorption region 208 of the photodetector 200 can be included in the semiconductor substrate 206 between the p-doped collection region 202 and the n-doped collection region 204. The absorption region 208 can be configured to absorb photons of the incident light 210. The photons interact with electron-hole pairs in the absorption region 208. This interaction causes electrons 212 and holes 214 to separate and migrate through the semiconductor substrate 206 to the opposite collection regions, resulting in the creation of an electric field (e.g., a built-in electric field). The p-doping of the p-doped collection region 202 causes the holes 214 to be collected at the p-doped collection region 202, while the n-doping of the n-doped collection region 204 causes the electrons 212 to be collected at the n-doped collection region 204.

[0038] The accumulation of the holes 214 at the p-doped collection region 202 and the accumulation of the electrons 212 at the n-doped collection region 204 results in the generation of a photocurrent at an output 216 of the photodetector 200. The magnitude of the current can be directly proportional to the amount of photons collected in the absorption region 208. Thus, the current generated at the output 216 can be representative of the intensity of the incident light 210.

[0039] The absorption region 208 can include a semiconductor material. The semiconductor material of the absorption region 208 can be the same as the semiconductor material of the semiconductor substrate 206. Additionally and / or alternatively, the semiconductor material of the absorption region 208 and the semiconductor material of the semiconductor substrate 206 can be different semiconductor materials. Examples of semiconductor materials for the absorption region 208 include germanium (Ge), germanium tin (GeSn), silicon germanium (SiGe), indium gallium arsenide (InGaAs), and / or gallium arsenide (GaAs), among others.

[0040] In FIG. 2AIn the exemplary embodiment of photodetector 200 shown, p-doped collection region 202, n-doped collection region 204, and absorption region 208 comprise elongated layers extending in substantially parallel planes. Electric fields generated in photodetector 200 can be substantially perpendicular to p-doped collection region 202, n-doped collection region 204, and absorption region 208, and substantially parallel to the direction of migration of electrons 212 and holes 214.

[0041] In FIG. 2B In another exemplary embodiment of photodetector 200 shown, absorption region 208 is substantially perpendicular to p-doped collection region 202 and n-doped collection region 204. Electric fields are substantially parallel to absorption region 208, and substantially perpendicular to p-doped collection region 202 and n-doped collection region 204.

[0042] In FIG. 2C In another exemplary embodiment of photodetector 200 shown, p-doped collection region 202 and n-doped collection region 204 can each comprise an approximately U-shaped region separated by semiconductor base 206. Absorption region 208 can be located between p-doped collection region 202 and n-doped collection region 204. Intrinsicon semiconductor layer 218 can be included over absorption region 208. The profile of the top surface of absorption region 208 can be adjusted for various applications and / or use cases. In some embodiments, the profile of the top surface of absorption region 208 is substantially planar and flat. In some embodiments, the profile of the top surface of absorption region 208 is curved. Further, adjustment regions 220 where absorption region 208 overlaps with p-doped collection region 202 and / or where absorption region 208 overlaps with n-doped collection region 204 can provide further adjustment of photodetector 200, as the amount of overlap in adjustment regions 220 can be selected based on photolithography alignment tolerances and / or to achieve one or more performance parameters of photodetector 200.

[0043] In FIG. 2D In another exemplary embodiment of photodetector 200 shown, semiconductor base 206 is fully doped and corresponds to p-doped collection region 202. Absorption region 208 can be recessed in p-doped collection region 202, intrinsicon semiconductor layer 218 can be included over absorption region 208, and n-doped collection region 204 can be included over intrinsicon semiconductor layer 218.

[0044] In FIG. 2E In another exemplary embodiment of photodetector 200 shown, absorption region 208 can be recessed in semiconductor base 206, and p-doped collection region 202 and n-doped collection region 204 can be included over absorption region 208.

[0045] As noted above, photodetector 200 can be used in a variety of applications and / or use cases.FIGS. 2A-2E As examples. Other examples can differ in different aspects. FIGS. 2A-2E As described herein.

[0046] FIGS. 3A-3C is a diagram of an exemplary embodiment of a photodetector device 300 described herein. As shown in a top view of the photodetector device 300, FIG. 3A As shown in a top view of the photodetector device 300, the photodetector device 300 can include a waveguide 302 and a photodetector 200 coupled with the waveguide 302. The waveguide 302 is configured to direct incident light 210 toward the photodetector 200 and / or otherwise provide the incident light 210 to the photodetector 200. The waveguide 302 can include a portion of the semiconductor substrate 206 and can include an elongated structure configured to confine the incident light 210 tightly or loosely within the semiconductor substrate 206. The waveguide 302 can extend in a direction (e.g., the z-direction) that is generally parallel to a direction of transmission of the incident light 210 (e.g., the z-direction) in the photodetector device 300.

[0047] As shown in a top view of the photodetector device 300, the photodetector device 300 can include a waveguide 302 and a photodetector 200 coupled with the waveguide 302. The waveguide 302 is configured to direct incident light 210 toward the photodetector 200 and / or otherwise provide the incident light 210 to the photodetector 200. The waveguide 302 can include a portion of the semiconductor substrate 206 and can include an elongated structure configured to confine the incident light 210 tightly or loosely within the semiconductor substrate 206. The waveguide 302 can extend in a direction (e.g., the z-direction) that is generally parallel to a direction of transmission of the incident light 210 (e.g., the z-direction) in the photodetector device 300. FIG. 3A As further shown, the photodetector 200 can include a p-type doped collection region 202 in the semiconductor substrate 206, an n-type doped collection region 204 in the semiconductor substrate 206, and an absorption region 208 in the semiconductor substrate 206 between the p-type doped collection region 202 and the n-type doped collection region 204. The absorption region 208 can include an elongated region that extends in a direction (e.g., the z-direction) that is generally parallel to a direction of transmission of the incident light 210 (e.g., the z-direction) in the photodetector device 300.

[0048] FIG. 3A The various reference sections shown are for use in one or more of the figures described herein. Section A-A is in a plane along a direction of transmission of the incident light 210 in the z-direction and in a plane along the absorption region 208. Section B-B is in a plane intersecting the absorption region 208 in the y-direction, where the absorption region 208 is generally parallel to the direction of transmission of the incident light 210.

[0049] FIG. 3B The figure is a section of the photodetector 200 along section A-A in an x-z plane of the photodetector device 300. FIG. 3B The figure illustrates a section profile of the absorption region 208. As shown, FIG. 3BAs shown, the absorption region 208 includes a stepped profile in the z-direction (e.g., in a direction generally parallel to a direction in which the light detector 200 receives the incident light 210 from the waveguide 302). The stepped profile includes a plurality of stepped segments 304a-304n along the z-direction, where the x-direction depth (or x-direction thickness) of the stepped segments 304a-304n increases along the z-direction. In some implementations, a regrowth region 306 is included below the absorption region 208 in the semiconductor substrate 206. The regrowth region 306 provides a substrate for epitaxial growth of the absorption region 208.

[0050] The stepped profile enables absorption of photons of the incident light 210 to be distributed throughout different z-direction depths in the absorption region, thereby reducing the likelihood of any particular portion of the absorption region 208 reaching optical saturation. For example, a stepped segment 304a of the absorption region 208 can absorb photons of a portion 210a of the incident light 210 at a first z-direction depth in the absorption region 208, a stepped segment 304b of the absorption region 208 can absorb photons of a portion 210b of the incident light 210 at a second z-direction depth in the absorption region 208, a stepped segment 304c of the absorption region 208 can absorb photons of a portion 210c of the incident light 210 at a third z-direction depth in the absorption region 208, and so on. The stepped profile of the absorption region 208 enables the absorption region 208 to achieve a gradient absorption profile 308 in which absorption of photons of the incident light 210 is distributed throughout the absorption region 208 in a generally uniform manner along the z-direction depth.

[0051] The number of stepped segments 304a-304n, the dimensions (e.g., depth, thickness, and / or width) of the stepped segments 304a-304n, and / or the shape of the stepped segments 304a-304n can be based on the beam width (corresponding to the dimension D1 in FIG. 3B the x-direction thickness of the semiconductor substrate 206, the z-direction depth of the absorption region 208, and / or the light intensity of the incident light 210, among other possibilities. Additionally and / or alternatively, the number of stepped segments 304a-304n can be selected to achieve a particular gradient absorption profile 308 without unduly increasing the manufacturing cost of the light detector 200.

[0052] Each stepped segment 304a-304n can have an x-direction depth (or thickness) and a z-direction width (or depth). In some embodiments, the top surface of the absorption region 208 can be substantially planar in the z-direction. Thus, the x-direction depth of the stepped segments 304a-304n in the z-direction can correspond to the x-direction thickness of the stepped segments 304a-304n. For example, the stepped segment 304a can have a dimension D2 corresponding to the x-direction depth (or thickness) of the stepped segment 304a, the stepped segment 304b can have a dimension D3 corresponding to the x-direction depth (or thickness) of the stepped segment 304b, and the stepped segment 304c can have a dimension D4 corresponding to the x-direction depth (or thickness) of the stepped segment 304c. The dimension D4 can be selected to be at least the same as or greater than the beam width (dimension Dl) of the incident light 210 (e.g., D4 > Dl) to provide photon absorption across the entire beam width of the incident light. The dimension D3 can be selected to be about one-half of the beam width of the incident light 210 (e.g., D3 « x*Dl, where x can be included in a range of about 1 / 3 to about 2 / 3), and the dimension D2 can be selected to be about 1 / 6 of the beam width of the incident light 210 (e.g., D2 « y*Dl, where y can be included in a range of about 1 / 8 to about 1 / 4) to facilitate uniform distribution of photon absorption along the z-direction depth in the absorption region 208. However, other values for the dimensions D2-D4 are within the scope of the present disclosure. In some embodiments, the ratio of D3 to D2 can be included in a range of about 2: 1 to about 4: 1. However, other values of this range are within the scope of the present disclosure. The x-direction thickness of the regrowth region 306 (corresponding to dimension D5) can be greater than about 5 nanometers, and can be selected to provide sufficient lattice foundation for crystal growth of the absorption region 208. However, other values are within the scope of the present disclosure.

[0053] In some implementations, the difference in the x-direction depth (or x-direction thickness) between adjacent stepped sections of the stepped sections 304a-304n can be based on optical confinement parameters associated with the absorption region 208. For example, the difference in the x-direction depth (or x-direction thickness) between the stepped section 304a and the stepped section 304b can be determined based on a product of an optical confinement to be achieved by the stepped section 304a and a z-direction width of the stepped section 304a (corresponding to the dimension D6) and a product of an optical confinement to be achieved by the stepped section 304b and a z-direction width of the stepped section 304b (corresponding to the dimension D7). The difference in the x-direction depth (or x-direction thickness) between the stepped section 304a and the stepped section 304b can be obtained by subtracting the product of the optical confinement to be achieved by the stepped section 304b and the z-direction width of the stepped section 304b from the product of the optical confinement to be achieved by the stepped section 304a and the z-direction width of the stepped section 304a. In general, the z-direction widths (e.g., the dimension D6, the dimension D7, the dimension D8, etc.) of the stepped sections 304a-304n can be based on a resolution of a pattern used to form the stepped recesses in which the absorption region 208 can be epitaxially grown.

[0054] FIG. 3C A cross-section of the photodetector 200 along the cross-section B-B in the x-y plane of the photodetector device 300 is illustrated. FIG. 3C A cross-sectional profile of the light intensity of the incident light 210 on the absorption region 208 is illustrated. The light intensity of the incident light 210 can generally be maximum near a beam center of the incident light 210 and can decrease radially outward from the beam center of the incident light 210. The stepped profile of the absorption region 208 in the z-direction enables the light intensity of the incident light 210 to be distributed in the x-direction along the x-direction thickness of the absorption region 208 across the stepped sections 304a-304c, where each of the stepped sections 304a-304c is located at a different z-direction depth in the absorption region 208 (e.g., as viewed into the page). This enables the light power distribution profile 310 of the optical power 312 (and / or the photocurrent) that satisfies the optical power threshold 314 to be achieved in each of the stepped sections 304a-304c of the absorption region 208. The optical power threshold 314 can correspond to an optical power at which the absorption region 208 reaches optical saturation. Thus, the stepped sections 304a-304c of the absorption region 208 enable the light power distribution profile 310 of the absorption region 208 such that the likelihood of optical saturation in the absorption region 208 is reduced. FIG. 3C

[0055] As noted above, the stepped sections 304a-304n of the absorption region 208 can be provided as an example. Other examples can differ from what is described with respect to the FIGS. 3A-3C FIGS. 3A-3C

[0056] FIGS. 4A-4W ​​​is a diagram of an exemplary embodiment 400 of the photodetector device 300 described herein. In some embodiments, a combination of FIG. 1 One or more of the semiconductor processing tools 102-116 described herein may be used to implement the combined FIGS. 4A-4W In some embodiments, one or more other semiconductor processing tools may be used to perform the combined FIGS. 4A-4W One or more of the described semiconductor processing operations.

[0057] like FIG. 4A As shown in the top view of FIG. 4 , a substrate 402 may be provided. The substrate 402 may be combined to implement the combination FIGS. 4A-4W One or more of the semiconductor processing operations described. FIGS. 4A-4W One or more of the semiconductor processing operations described may be performed in FIG. 4A The cross-sections are shown in one or more of the cross-sections shown (eg, cross-section AA, cross-section BB, cross-section CC in the y-direction, and / or cross-section DD in the y-direction).

[0058] like FIG. 4B As shown in the xy cross-sectional view along section BB in FIG, substrate 402 may include a silicon-on-insulator (SOI) substrate including a carrier substrate 404 (e.g., a silicon (Si) substrate and / or another type of carrier substrate), a dielectric layer 406 (e.g., a buried oxide or bottom oxide (BOX) layer and / or another type of insulator layer) on and / or on the carrier substrate 404, and a semiconductor substrate 206 (e.g., a silicon (Si) layer and / or another type of semiconductor layer) located on and / or on the dielectric layer 406. Alternatively, carrier substrate 404 may be provided as a semiconductor wafer, and dielectric layer 406 may be formed on and / or on carrier substrate 404 using deposition tool 102, and semiconductor substrate 206 may be formed on and / or on dielectric layer 406 using deposition tool 102. The dielectric layer 406 may be formed using a deposition tool 102 using CVD, PVD, oxidation (e.g., thermal oxidation), and / or another type of deposition technique. The semiconductor substrate 206 may be formed using a deposition tool 102 using CVD, PVD, epitaxial, and / or another type of deposition technique.

[0059] like FIG. 4C As shown in the top view of FIG, portions of the substrate 402 may be removed to form the waveguide 302 and define an area of ​​the semiconductor substrate 206 for the photodetector 200. FIG. 4DAs shown in a cross-sectional view along the x-y plane of the cross-section B-B, removing certain portions of the base 402 can cause recesses 408 to be formed in the semiconductor substrate 206.

[0060] In some implementations, a pattern in a photoresist layer is used to etch the semiconductor substrate 206 to form the recesses 408, thereby forming the waveguides 302 and defining regions of the semiconductor substrate 206 for the photodetector 200. In these implementations, the deposition tool 102 can be used to form the photoresist layer on the semiconductor substrate 206. The exposure tool 104 can be used to expose the photoresist layer to a source of radiation to pattern the photoresist layer. The development tool 106 can be used to develop and remove certain portions of the photoresist layer to expose the pattern. The etching tool 108 can be used to etch the semiconductor substrate 206 based on the pattern to form the recesses 408, thereby forming the waveguides 302 and defining regions of the semiconductor substrate 206 for the photodetector 200. In some implementations, the etching operation includes a plasma etching operation, a wet chemical etching operation, and / or another type of etching operation. In some implementations, a photoresist removal tool can be used to remove remaining portions of the photoresist layer (e.g., using a chemical stripper, a plasma ashing, and / or another technique). In some implementations, a hard mask layer is used as an alternative technique to etch the semiconductor substrate 206 based on the pattern.

[0061] As shown in FIG. 3, the semiconductor substrate 206 can include a plurality of waveguides 302. In some implementations, the waveguides 302 can be formed by etching the semiconductor substrate 206 to form recesses 408 in the semiconductor substrate 206. In some implementations, the waveguides 302 can be formed by depositing a material on the semiconductor substrate 206 to form the waveguides 302. In some implementations, the waveguides 302 can be formed by depositing a material on the semiconductor substrate 206 to form the waveguides 302 and etching the semiconductor substrate 206 to form recesses 408 in the semiconductor substrate 206. FIG. 4D Further shown, the semiconductor substrate 206 can have one or more dimensions, such as a dimension D9, a dimension D10, a dimension D11, and / or a dimension D12, among others. The dimension D9 can correspond to a y-direction width of the recesses 408. The dimension D10 can correspond to an x-direction thickness of the semiconductor substrate 206 below the recesses 408. The dimension D11 can correspond to a y-direction width of the semiconductor substrate 206 between the recesses 408. The dimension D12 can correspond to an x-direction thickness of the semiconductor substrate 206 between the recesses 408. In some implementations, for single-mode operation of the photodetector 200, a ratio of the dimension D11 to the dimension D12 (D11:D12 or D11 / D12) can be selected to satisfy the following equation:

[0062]

[0063] where r can be greater than about 0.5 and can be selected to be

[0064]

[0065] However, other values of the ratio of the dimension D11 to the dimension D12 are within the scope of the present disclosure.

[0066] In some implementations, for single-mode operation of the photodetector 200, the dimension D9 can be selected to satisfy the following equation:

[0067]

[0068] In other words, the dimension D9 may be selected so that the optical power expansion (P total ) is less than about 0.01%. For multimode operation of the optical detector 200, the dimension D9 may be selected so that the optical power expansion (P total ) is less than about 0.05%. However, other values ​​of dimension D9 are also within the scope of the present disclosure.

[0069] like FIG. 4E , portions of the semiconductor substrate 206 in the photodetector 200 can be doped to form a p-type doped collection region 202 and an n-type doped collection region 204. For example, an ion implantation tool 114 (e.g., using ion implantation techniques and / or another type of doping technique) can be used to implant one or more portions of the semiconductor substrate 206 to dope the one or more portions of the semiconductor substrate 206 with p-type ions to form the p-type doped collection region 202. As another example, an ion implantation tool 114 (e.g., using ion implantation techniques and / or another type of doping technique) can be used to implant one or more portions of the semiconductor substrate 206 to dope the one or more portions of the semiconductor substrate 206 with n-type ions to form the n-type doped collection region 204.

[0070] like FIG. 4F As shown in the xy cross-sectional view along section BB in FIG, a portion of the p-type doped collection region 202 may be further doped with p-type ions (e.g., using ion implantation tool 114) to form a p-type contact region 410. A portion of the n-type doped collection region 204 may be further doped with n-type ions (e.g., using ion implantation tool 114) to form an n-type contact region 412. The p-type dopant concentration in the p-type contact region 410 may be greater than the p-type dopant concentration in the p-type doped collection region 202. The n-type dopant concentration in the n-type contact region 412 may be greater than the n-type dopant concentration in the n-type doped collection region 204.

[0071] like FIG. 4G , a mask layer 414 can be formed over the waveguide 302 and over the photodetector 200 of the photodetector arrangement 300. In some embodiments, the mask layer 414 can include a photoresist layer, and the deposition tool 102 can be used to deposit the mask layer 414 using a spin coating technique and / or another type of deposition technique. In some embodiments, the mask layer 414 can include a hard mask layer, and the deposition tool 102 can deposit the mask layer 414 using a CVD technique, a PVD technique, an ALD technique, and / or another suitable deposition technique.

[0072] like FIG. 4HAs shown in the xy cross-sectional view along the cross-sectional plane BB in FIG, the mask layer 414 may fill the recess 408 in the semiconductor substrate 206. In addition, a hard mask layer 416 may be formed on the semiconductor substrate 206 before forming the mask layer 414. The mask layer 414 may be formed on the hard mask layer 416. The hard mask layer 416 may include silicon nitride (Si x N y , such as Si3N4), silicon oxynitride (SiON) and / or another suitable hard mask layer material. The deposition tool 102 can be used in PVD operation, ALD operation, CVD operation, oxidation operation, combination FIG. 1 The hard mask layer 416 is deposited in another type of deposition operation as described and / or in another suitable deposition operation.

[0073] like FIG. 4I As shown in the top view in FIG, a stair-like pattern 418 can be formed in the mask layer 414 above the photodetector 200. Specifically, the stair-like pattern 418 can be formed in the mask layer 414 between the p-type doped collection region 202 and the n-type doped collection region 204. The stair-like pattern 418 can include a plurality of regions 418a-418d of the mask layer 414 having different x-direction heights. The different x-direction heights of the regions 418a-418d of the mask layer 414 enable the semiconductor substrate 206 to be etched to different depths, thereby facilitating the formation of a stair-like profile of the absorption region 208 to be formed between the p-type doped collection region 202 and the n-type doped collection region 204.

[0074] FIGS. 4J-4M Various cross-sectional views of a stair-shaped pattern 418 formed in a mask layer 414 are shown.

[0075] FIG. 4J The figure shows an xz cross-sectional view along section AA. FIG. 4K The figure shows an xy cross-sectional view along the section DD.

[0076] FIG. 4L The figure shows an xy cross-sectional view along section BB. FIG. 4M The figure shows an xy cross-sectional view along section CC.

[0077] like FIG. 4J As shown, the x-direction heights of regions 418a-418d of the mask layer 414 may decrease along the z-direction (e.g., in a direction along a propagation path of incident light 210 to be received by the light detector 200) from region 418a to region 418d. FIG. 4K As shown, in region 418d, mask layer 414 may be completely removed such that region 418d includes an opening through mask layer 414. FIG. 4L and FIG. 4MAs shown, region 418c and region 418b each include a remaining portion of mask layer 414 over semiconductor substrate 206.

[0078] In some embodiments, stepped pattern 418 can be formed by partially exposing (e.g., using exposure tool 104) and / or partially developing (e.g., using development tool 106) mask layer 414 in regions 418a-418d such that mask layer 414 is not completely removed from regions 418a-418d except for region 418d, where mask layer 414 is completely removed. In some embodiments, a stepped mask is used to form stepped pattern 418 in mask layer 414.

[0079] FIGS. 4N-4Q Various cross-sectional views of stepped recess 420 formed in semiconductor substrate 206 using stepped pattern 418 formed in mask layer 414 are illustrated. FIG. 4N An x-z cross-sectional view along section A-A is illustrated. FIG. 4O An x-y cross-sectional view along section D-D is illustrated. FIG. 4P An x-y cross-sectional view along section B-B is illustrated. FIG. 4Q An x-y cross-sectional view along section C-C is illustrated.

[0080] As FIGS. 4N-4Q As shown, due to etching semiconductor substrate 206 based on stepped pattern 418 (e.g., using etching tool 108), segments 420a-420d of stepped recess 420 can have different x-direction depths in semiconductor substrate 206. In particular, the x-direction depths of segments 420a-420d increase from segment 420a to segment 420d along the z-direction (e.g., in a direction along a propagation path through which incident light 210 to be received by photodetector 200 travels). This occurs because the etchant used to etch semiconductor substrate 206 based on stepped pattern 418 is in contact with semiconductor substrate 206 for the longest duration in region 418d of stepped pattern 418 (e.g., because mask layer 414 is completely removed in region 418d), resulting in the largest etch depth of semiconductor substrate 206 in segment 420d. The height of mask layer 414 in region 418c can be the next smallest, resulting in the second largest etch depth of semiconductor substrate 206 in segment 420c, and so on. Mask layer 414 is consumed during the etching operation to form stepped recess 420 in semiconductor substrate 206, which causes semiconductor substrate 206 to be continuously further exposed in each of region 418c, region 418b, and region 418a as mask layer 414 is consumed. Thus, the etchant is in contact with semiconductor substrate 206 for the longest duration in segment 420d and for the shortest duration in segment 420a.

[0081] FIG. 4R A top view of the photodetector device 300 is shown after the absorption region 208 is formed in the stepped recess 420 . FIGS. 4S-4V Various cross-sectional views of the stepped profile of the absorbent region 208 are illustrated. FIG. 4S The figure shows an xz cross-sectional view along section AA. FIG. 4T The figure shows an xy cross-sectional view along the section DD. FIG. 4U The figure shows an xy cross-sectional view along section BB. FIG. 4V The figure shows an xy cross-sectional view along section CC.

[0082] like FIGS. 4R-4V As shown, the absorption region 208 can be formed in a stepped recess 420. The stepped recess 420 causes the absorption region 208 to include segments 304a-304d having an x-direction depth (or x-direction thickness) along the z-direction. In some embodiments, the deposition tool 102 is used to epitaxially grow the absorption region 208 in the stepped recess 420. In some embodiments, the deposition tool 102 is used to epitaxially grow the absorption region 208 in the stepped recess 420. FIG. 1 Another type of deposition operation, and / or yet another suitable deposition operation, is described in which the absorbing region 208 is deposited in the stepped recess 420. In some embodiments, the planarization tool 110 planarizes the absorbing region 208 after depositing the absorbing region 208.

[0083] like FIG. 4W As shown in the xy cross-sectional view along the cross-sectional plane DD in FIG, the dielectric layer 422 may be formed on the p-type doped collection region 202, on the n-type doped collection region 204, and / or on the absorption region 208. The deposition tool 102 may be used in PVD operations, ALD operations, CVD operations, epitaxial operations, oxidation operations, bonding operations, etc. FIG. 1 Dielectric layer 422 is deposited in another type of deposition operation as described, and / or in yet another suitable deposition operation. In some embodiments, planarization tool 110 can be used to planarize dielectric layer 422 after dielectric layer 422 is deposited.

[0084] like FIG. 4WFurther shown, contacts 424 and 426 can be formed. Contacts 424 can be formed such that contacts 424 are electrically coupled and / or physically coupled with p-type contact region 410 and / or p-type doped collection region 202. Contacts 426 can be formed such that contacts 426 are electrically coupled and / or physically coupled with n-type contact region 412 and / or n-type doped collection region 204. Etching tool 108 can be used to remove certain portions of dielectric layer 422 to expose p-type contact region 410 and n-type contact region 412 through dielectric layer 422. Deposition tool 102 can deposit contacts 424 on p-type contact region 410 and contacts 426 on n-type contact region 412 through recesses formed by the removal of certain portions of dielectric layer 422.

[0085] Deposition tool 102 and / or plating tool 112 can be used to deposit contacts 424 and 426 in a CVD operation, a PVD operation, an ALD operation, a plating operation, another deposition operation as set forth above in connection with FIG. 1 Deposition tool 102 and / or plating tool 112 can be used to deposit contacts 424 and 426 in a CVD operation, a PVD operation, an ALD operation, a plating operation, another deposition operation as set forth above in connection with

[0086] As noted above, the provision of contacts 424 and 426 is provided as an example. Other examples can differ from those set forth above in connection with FIGS. 4A-4W the light detector device 300 as set forth above in connection with FIGS. 4A-4W the light detector device 300 as set forth above in connection with

[0087] FIGS. 5A-5F is a diagram of an exemplary embodiment of a light detector device 500 as set forth herein. As FIGS. 5A-5F indicated, FIGS. 5A-5F the exemplary embodiment of the light detector device 500 as set forth above in connection with FIGS. 3A-3C the exemplary embodiment of the light detector device 300 as set forth above in connection with FIGS. 5A-5F the exemplary embodiment of the light detector device 500 as set forth above in connection with FIGS. 5B-5F the exemplary embodiment of the light detector device 500 as set forth above in connection with FIGS. 5A-5FThe tapering profile of the absorption region 208 in the exemplary embodiment of the light detector device 500 can further improve uniformity of the photon absorption distribution along the z-direction depth in the absorption region 208. However, the stepped profile of the absorption region 208 in the light detector device 300 can be less costly and less complex to manufacture.

[0088] As FIG. 5B As shown in the exemplary embodiment of the tapering profile of the absorption region 208, the absorption region 208 can include a flat-bottom section 504a, a flat-bottom section 504b, and a sloped section 504c between the flat-bottom section 504a and the flat-bottom section 504b. The flat-bottom section 504a includes a substantially flat bottom surface 506a that is substantially parallel to the z-direction and substantially parallel to a substantially flat bottom surface 506b of the flat-bottom section 504b. The sloped section 504c includes a sloped bottom surface 506c that transitions between an x-direction depth (corresponding to dimension D13) of the flat bottom surface 506a of the flat-bottom section 504a and an x-direction depth (corresponding to dimension D14) of the flat bottom surface 506b of the flat-bottom section 504b. The x-direction depth of the flat bottom surface 506b can be greater than the x-direction depth of the flat bottom surface 506a, and thus the sloped bottom surface 506c of the sloped section 504c can be sloped downward such that the x-direction depth of the sloped section 504c increases from the flat-bottom section 504a to the flat-bottom section 504b.

[0089] The flat-bottom section 504a can be configured to receive and absorb photons of the portion 210a of the incident light 210, and the sloped section 504c can be configured to receive and absorb photons of the portion 210b of the incident light 210. The tapering profile enables the photon absorption of the incident light 210 to be distributed across a more gradual z-direction depth in the absorption region, thereby further reducing the likelihood of any particular portion of the absorption region 208 reaching optical saturation. The angle of the sloped bottom surface 506c of the sloped section 504c can be selected to achieve a particular gradient absorption profile and / or to achieve a particular optical confinement profile of the light detector 200.

[0090] FIG. 5C The tapering profile of the absorption region 208 in the exemplary embodiment of the light detector device 500 can further improve uniformity of the photon absorption distribution along the z-direction depth in the absorption region 208. However, the stepped profile of the absorption region 208 in the light detector device 300 can be less costly and less complex to manufacture. FIG. 5Cpages in the website).

[0091] FIG. 5D Another example implementation of the icon photodetector device 500, in which the flat bottom section 504a is omitted. In this implementation, the flat portion 508 of the tilted section 504c is configured to receive and absorb photons of the portion 210a of the incident light 210. The x-direction depth of the tilted bottom surface 506c of the tilted section 504c transitions between the x-direction depth of the flat portion 508 (corresponding to dimension D13) and the x-direction depth of the flat bottom surface 506b of the flat bottom section 504b (corresponding to dimension D14).

[0092] FIG. 5E Another example implementation of the icon photodetector device 500, in which the flat bottom section 504a and the flat portion 508 are omitted. In this implementation, the tilted section 504c is configured to receive and absorb photons of the entire beam width of the incident light 210. The x-direction depth of the tilted bottom surface 506c gradually increases toward the x-direction depth of the flat bottom surface 506b of the flat bottom section 504b (corresponding to dimension D14).

[0093] FIG. 5F Another example implementation of the icon photodetector device 500, in which the flat bottom section 504b is omitted. In this implementation, the tilted bottom surface 506c of the tilted section 504c transitions between the x-direction depth of the flat bottom section 504a (corresponding to dimension D13) and the x-direction depth of the tilted bottom surface 506c on the opposite side of the tilted section 504c (corresponding to dimension D14).

[0094] As noted above, providing FIGS. 5A-5F as examples. Other examples can differ from what is described with respect to FIGS. 5A-5F as set forth.

[0095] FIGS. 6A-6S is a diagram of an example implementation 600 of the photodetector device 500 set forth herein. In some implementations, one or more of the semiconductor processing tools 102-116 set forth in connection with FIG. 1 may be performed using one or more other semiconductor processing tools. FIGS. 6A-6S In some implementations, one or more of the semiconductor processing operations set forth in connection with FIGS. 6A-6S may be performed using one or more other semiconductor processing tools.

[0096] As shown in FIG. 6A and FIG. 6B may be performed in connection with FIGS. 4A-4FSemiconductor processing operations similar to those described are performed to form a p-type doped collection region 202 in the semiconductor substrate 206 of the substrate 602 above the carrier substrate 604 and above the dielectric layer 606, to form an n-type doped collection region 204 in the semiconductor substrate 206, to form a recess 608 in the semiconductor substrate 206, to form a p-type contact region 610 in the p-type doped collection region 202, and / or to form an n-type contact region 612 in the n-type doped collection region 204.

[0097] like FIG. 6C As shown in the top view of FIG, a mask layer 614 can be formed over the waveguide 502 and over the photodetector 200 of the photodetector device 500. In some embodiments, the mask layer 614 can include a photoresist layer, and the deposition tool 102 can be used to deposit the mask layer 614 using a spin coating technique and / or another type of deposition technique. In some embodiments, the mask layer 614 can include a hard mask layer, and the deposition tool 102 can deposit the mask layer 614 using a CVD technique, a PVD technique, an ALD technique, and / or another suitable deposition technique.

[0098] like FIG. 6D As shown in the xy cross-sectional view along the cross-sectional plane BB in FIG, the mask layer 614 may fill the recess 608 in the semiconductor substrate 206. In addition, a hard mask layer 616 may be formed on the semiconductor substrate 206 before forming the mask layer 614. The mask layer 614 may be formed on the hard mask layer 616. The hard mask layer 616 may include silicon nitride (Si x N y , such as Si3N4), silicon oxynitride (SiON) and / or another suitable hard mask layer material. The deposition tool 102 can be used in PVD operation, ALD operation, CVD operation, oxidation operation, combination FIG. 1 The hard mask layer 616 is deposited in another type of deposition operation as described and / or in another suitable deposition operation.

[0099] like FIG. 6E As shown in the top view of FIG, a gradient pattern 618 can be formed in the mask layer 614 above the photodetector 200. Specifically, the gradient pattern 618 can be formed in the mask layer 614 between the p-type doped collection region 202 and the n-type doped collection region 204. The gradient pattern 618 can include a plurality of regions 618a and 618b of the mask layer 614 having different x-direction heights. The different x-direction heights of the regions 618a and 618b of the mask layer 614 enable the semiconductor substrate 206 to be etched to different depths, thereby facilitating the formation of a tapered profile of the absorption region 208 to be formed between the p-type doped collection region 202 and the n-type doped collection region 204.

[0100] FIGS. 6F-6IVarious cross-sectional views of a gradient pattern 618 formed in a mask layer 614 are shown. FIG. 6F The figure shows an xz cross-sectional view along section AA. FIG. 6G The figure shows an xy cross-sectional view along the section DD.

[0101] FIG. 6H The figure shows an xy cross-sectional view along section BB. FIG. 6I The figure shows an xy cross-sectional view along section CC.

[0102] like FIG. 6F As shown, the x-direction heights of regions 618a and 618b of the mask layer 614 may decrease from region 618a to region 618b along the z-direction (e.g., in a direction along a propagation path of incident light 210 to be received by the light detector 200). In addition, region 618a may have a sloped top surface, resulting in a decrease in the x-direction height within region 618a. FIG. 6G As shown, in region 618b, mask layer 614 may be completely removed such that region 618b includes an opening through mask layer 614. FIG. 6H and FIG. 6I As shown, region 618 a includes the remaining portion of mask layer 614 that is located above semiconductor substrate 206 .

[0103] In some embodiments, the gradient pattern 618 can be formed by using a gradient mask to gradually increase the exposure of the mask layer 614 in the region 618a and the region 618b (for example, using the exposure tool 104), so that the mask layer 614 is not completely removed from the region 618a, and so that the mask layer 614 is completely removed from the region 618b.

[0104] FIGS. 6J-6M Various cross-sectional views are shown of an oblique recess 620 formed in the semiconductor substrate 206 using a gradient pattern 618 formed in the mask layer 614 . FIG. 6J The figure shows an xz cross-sectional view along section AA. FIG. 6K The figure shows an xy cross-sectional view along the section DD. FIG. 6L The figure shows an xy cross-sectional view along section BB. FIG. 6M The figure shows an xy cross-sectional view along section CC.

[0105] like FIGS. 6J-6MAs shown, due to etching the semiconductor substrate 206 based on the gradient pattern 618 (e.g., using the etching tool 108), the segments 620a-620c of the oblique recess 620 can have different x-direction depths in the semiconductor substrate 206. Specifically, the x-direction depths of the segments 620a-620c increase along the z-direction (e.g., in the direction along the propagation path of the incident light 210 to be received by the light detector 200) from the segment 620a (e.g., a flat segment) to the segment 620b (e.g., another flat segment). The x-direction depth of the segment 620c (e.g., an oblique segment) can gradually increase from the segment 620a to the segment 620b. This occurs because the etchant used to etch the semiconductor substrate 206 based on the gradient pattern 618 remains in contact with the semiconductor substrate 206 for the longest time in region 618 b of the gradient pattern 618 (e.g., because the mask layer 614 in region 618 b is completely removed), resulting in the greatest etching depth of the semiconductor substrate 206 in section 620 b. The sloped top surface of region 618 a of the gradient pattern 618 causes the mask layer 614 to be gradually etched away in region 618 a, thereby generating the sloped bottom surface of section 620 c.

[0106] FIG. 6N A top view of the photodetector device 500 is shown after forming the absorption region 208 in the oblique recess 620 . FIGS. 6O-6R Various cross-sectional views of the stepped profile of the absorbent region 208 are illustrated. FIG. 6O The figure shows an xz cross-sectional view along section AA. FIG. 6P The figure shows an xy cross-sectional view along the section DD. FIG. 6Q The figure shows an xy cross-sectional view along section BB. FIG. 6R The figure shows an xy cross-sectional view along section CC.

[0107] like FIGS. 6N-6R As shown, the absorption region 208 can be formed in an oblique recess 620. The oblique recess 620 causes the absorption region 208 to include segments 504a-504c having an x-direction depth (or x-direction thickness) along the z-direction, and the oblique segment 504c has an oblique bottom surface. In some embodiments, the deposition tool 102 is used to epitaxially grow the absorption region 208 in the oblique recess 620. In some embodiments, the deposition tool 102 is used to epitaxially grow the absorption region 208 in the oblique recess 620. FIG. 1 Another type of deposition operation, and / or yet another suitable deposition operation, is described in which the absorbing region 208 is deposited in the oblique recess 620. In some embodiments, the planarization tool 110 planarizes the absorbing region 208 after depositing the absorbing region 208.

[0108] like FIG. 6SAs shown in the xy cross-sectional view along the cross-sectional plane DD in FIG, the dielectric layer 622 may be formed on the p-type doped collection region 202, on the n-type doped collection region 204, and / or on the absorption region 208. The deposition tool 102 may be used in PVD operations, ALD operations, CVD operations, epitaxial operations, oxidation operations, bonding operations, etc. FIG. 1 The dielectric layer 622 is deposited in another type of deposition operation as described, and / or in yet another suitable deposition operation. In some embodiments, the planarization tool 110 can be used to planarize the dielectric layer 622 after the dielectric layer 622 is deposited.

[0109] like FIG. 6S As further shown, contacts 624 and 626 can be formed. Contact 624 can be formed such that contact 624 is electrically and / or physically coupled to p-type contact region 610 and / or p-type doped collector region 202. Contact 626 can be formed such that contact 626 is electrically and / or physically coupled to n-type contact region 612 and / or n-type doped collector region 204. Etching tool 108 can be used to remove portions of dielectric layer 622 to expose p-type contact region 610 and n-type contact region 612 through dielectric layer 622. Deposition tool 102 can deposit contact 624 on p-type contact region 610 and contact 626 on n-type contact region 612 by forming a recess through dielectric layer 622 formed by removing portions of dielectric layer 622.

[0110] The deposition tool 102 and / or the electroplating tool 112 may be used in a CVD operation, a PVD operation, an ALD operation, an electroplating operation, or a combination thereof. FIG. 1 Contacts 624 and 626 are deposited in another deposition operation as described, and / or in another suitable deposition operation. In some embodiments, a seed layer is deposited first, and contacts 624 and / or contacts 626 are deposited on the seed layer. In some embodiments, planarization tool 110 can be used to planarize contacts 624 and / or contacts 626 after they are deposited.

[0111] As noted above, providing FIGS. 6A-6S As an example. Other examples can be compared with FIGS. 6A-6S Different from what is described.

[0112] FIGS. 7A-7C is a diagram of an exemplary embodiment of a light detector arrangement 700 as described herein. FIGS. 7A-7C As shown, FIGS. 7A-7C The exemplary embodiment of the light detector arrangement 700 shown in FIG. 7 may include FIGS. 3A-3C Component combinations and / or component arrangements similar to the exemplary embodiment of the light detector device 300 shown in FIG. FIGS. 7A-7CThe exemplary embodiment of the photodetector device 700 shown in FIG may include a waveguide 702, a photodetector 200 coupled to the waveguide 702, a p-type doped collection region 202 in a semiconductor substrate 206, an n-type doped collection region 204 in the semiconductor substrate 206, and an absorption region 208 between the p-type doped collection region 202 and the n-type doped collection region 204 in the semiconductor substrate 206. However, as FIGS. 7A-7C As shown, in FIGS. 7A-7C In the exemplary embodiment of the photodetector device 700 shown, the photodetector 200 includes multiple absorption regions 208a-208d. The absorption regions 208a-208d can each be coupled to the p-type doped collection region 202 and the n-type doped collection region 204 so that a single photocurrent is generated and provided to the output 216.

[0113] like FIG. 7B As shown, each absorption region 208a-208d can be configured to absorb photons within a corresponding wavelength range of incident light 210. For example, within electromagnetic spectrum 704, absorption region 208a can be configured to absorb photons within wavelength range 706a, absorption region 208b can be configured to absorb photons within wavelength range 706b, absorption region 208c can be configured to absorb photons within wavelength range 706c, and / or absorption region 208d can be configured to absorb photons within wavelength range 706d. This can increase the optical bandwidth of photodetector 200. Furthermore, this can further reduce the likelihood of optical saturation in photodetector 200 because the optical power of incident light 210 is distributed across multiple absorption regions 208a-208d.

[0114] In some embodiments, one or more of the wavelength ranges 706a-706d may correspond to different colors in the visible spectrum of the electromagnetic spectrum 704. For example, wavelength range 706a may correspond to blue light, wavelength range 706b may correspond to green light, and so on. In some embodiments, a subset of wavelength ranges 706a-706d may correspond to different colors in the visible spectrum, and another subset of wavelength ranges 706a-706d may correspond to one or more non-visible spectrum ranges. For example, one or more of wavelength ranges 706a-706d may correspond to an infrared wavelength range and / or a near-infrared wavelength range.

[0115] In some embodiments, two or more of the absorption regions 208a-208d may include the same semiconductor material and / or the same combination of semiconductor materials. In some embodiments, two or more of the absorption regions 208a-208d may include different semiconductor materials and / or different combinations of semiconductor materials. For example, the absorption region 208a may include silicon (Si), the absorption region 208b may include germanium (Ge), and so on. As another example, the absorption region 208a may include silicon germanium (SiGe) where x is 0.1. x Ge x-1 ) compound, the absorption region 208b may include silicon germanium (Si x Ge x-1 ) compounds, and so on. This allows the quantum efficiency of the absorbing regions 208a-208d to be tuned for the specific wavelength range 706a-706d that the absorbing regions 208a-208d are intended to absorb.

[0116] like FIG. 7B As further shown, the absorbent regions 208a-208d may be formed to include a stepped profile (e.g., similar to FIG. 3B The absorption zone 208 in FIG. FIG. 7C As shown, the absorption regions 208a-208d may be formed to include a tapered profile (e.g., similar to FIG. 5B and / or FIGS. 5D-5F In some embodiments, the absorbent regions 208a-208d can be formed such that one subset of the absorbent regions 208a-208d includes a stepped profile and another subset of the absorbent regions 208a-208d includes a tapered profile.

[0117] As noted above, providing FIGS. 7A-7C As an example. Other examples can be compared with FIGS. 7A-7C Different from what is described.

[0118] FIGS. 8A-8C is a diagram of an exemplary embodiment of a light detector arrangement 800 as described herein. FIGS. 8A-8C As shown, FIGS. 8A-8C The exemplary embodiment of the light detector arrangement 800 shown may include FIGS. 3A-3C The exemplary embodiment of the light detector device 300 shown in FIG. 3 may include a similar combination of components and / or arrangement of components. For example, FIGS. 8A-8CThe exemplary embodiment of the photodetector device 800 shown in FIG. 8 can include the waveguide 802, the photodetector 200 coupled with the waveguide 802, the p-type doped collection region 202 in the semiconductor substrate 206, the n-type doped collection region 204 in the semiconductor substrate 206, and the absorption region 208 between the p-type doped collection region 202 and the n-type doped collection region 204 in the semiconductor substrate 206. However, as shown in FIGS. 8A-8C FIG. 9, the exemplary embodiment of the photodetector device 800 shown in FIG. 8 can include a plurality of photodetectors 200a-200d. Each of the photodetectors 200a-200d can be coupled with a respective one of the waveguides 802a-802d. Each of the photodetectors 200a-200d can include a respective one of the p-type doped collection regions 202a-202d, a respective one of the n-type doped collection regions 204a-204d, and a respective one of the absorption regions 208a-208d. This can enable the photodetector device 800 to function as a wavelength separator, a wavelength splitter, a wavelength filter, a wavelength sensor, and / or the like. FIGS. 8A-8C As shown in FIG. 10, each of the absorption regions 208a-208d can be configured to absorb photons of a corresponding wavelength range of the incident light 210. For example, in the electromagnetic spectrum 804, the absorption region 208a can be configured to absorb photons in the wavelength range 806a, the absorption region 208b can be configured to absorb photons in the wavelength range 806b, the absorption region 208c can be configured to absorb photons in the wavelength range 806c, and / or the absorption region 208d can be configured to absorb photons in the wavelength range 806d. This can enable the optical bandwidth of the photodetector 200 to be increased. Furthermore, this can further reduce the likelihood of optical saturation in the photodetector 200, as the optical power distribution of the incident light 210 is spread across the plurality of absorption regions 208a-208d.

[0119] FIG. 8B In some embodiments, one or more of the wavelength ranges 806a-806d can correspond to different colors in the visible spectrum on the electromagnetic spectrum 804. For example, the wavelength range 806a can correspond to blue light, the wavelength range 806b can correspond to green light, and so on. In some embodiments, one subset of the wavelength ranges 806a-806d can correspond to different colors in the visible spectrum, and another subset of the wavelength ranges 806a-806d can correspond to one or more non-visible spectral ranges. For example, one or more of the wavelength ranges 806a-806d can correspond to an infrared wavelength range and / or a near-infrared wavelength range.

[0120] In some embodiments, one or more of the wavelength ranges 806a-806d can correspond to different colors in the visible spectrum on the electromagnetic spectrum 804. For example, the wavelength range 806a can correspond to blue light, the wavelength range 806b can correspond to green light, and so on. In some embodiments, one subset of the wavelength ranges 806a-806d can correspond to different colors in the visible spectrum, and another subset of the wavelength ranges 806a-806d can correspond to one or more non-visible spectral ranges. For example, one or more of the wavelength ranges 806a-806d can correspond to an infrared wavelength range and / or a near-infrared wavelength range.

[0121] ​In some implementations, two or more of the absorption regions 208a-208d can include the same semiconductor material and / or the same combination of semiconductor materials. In some implementations, two or more of the absorption regions 208a-208d can include different semiconductor materials and / or different combinations of semiconductor materials. For example, the absorption region 208a can include silicon (Si), the absorption region 208b can include germanium (Ge), and so on. As another example, the absorption region 208a can include a silicon germanium (Si x Ge x-1 ) compound where x is 0.1, the absorption region 208b can include a silicon germanium (Si x Ge x-1 ) compound where x is 0.8, and so on. This enables the quantum efficiency of the absorption regions 208a-208d to be tuned for the particular wavelength range 806a-806d that the absorption regions 208a-208d are to absorb.

[0122] As FIG. 8B further shown, the absorption regions 208a-208d can be formed to include a stepped profile (e.g., similar to the absorption regions 208 in FIG. 3B . As FIG. 8C shown, the absorption regions 208a-208d can be formed to include a tapered profile (e.g., similar to the absorption regions 208 in FIG. 5B and / or FIGS. 5D-5F . In some implementations, the absorption regions 208a-208d can be formed such that one subset of the absorption regions 208a-208d includes a stepped profile and another subset of the absorption regions 208a-208d includes a tapered profile.

[0123] As noted above, the FIGS. 8A-8C is provided as an example. Other examples can differ from what is described with regard to FIGS. 8A-8C .

[0124] FIG. 9 is a diagram of example components of a device 900 illustrated herein. In some implementations, one or more of the semiconductor processing tools 102-114 and / or the wafer / die transport tool 116 can include one or more devices 900 and / or one or more components of the device 900. As FIG. 9 shown in , the device 900 can include a bus 910, a processor 920, a memory 930, an input component 940, an output component 950, and / or a communication component 960.

[0125] FIG. 9 The bus 910 can include one or more components that enable wired and / or wireless communication between components of the device 900. The bus 910 can interconnect the above components of the device 900.Two or more components of the system 900 can be coupled via, for example, an operational coupling, a communicative coupling, an electronic coupling, and / or an electrical coupling. For example, the bus 910 can include electrical connections (e.g., wires, traces, and / or leads) and / or a wireless bus. The processor 920 can include a central processing unit, a graphics processing unit, a microprocessor, a controller, a microcontroller, a digital signal processor, a field programmable gate array, an application specific integrated circuit, and / or another type of processing component. The processor 920 can be implemented in hardware, firmware, or a combination of hardware and software. In some implementations, the processor 920 can include one or more processors that can be programmed to perform one or more operations or processes set forth elsewhere herein.

[0126] The memory 930 can include volatile memory and / or non-volatile memory. For example, the memory 930 can include random access memory (RAM), read only memory (ROM), hard disk drives, and / or another type of memory (e.g., flash memory, magnetic memory, and / or optical memory). The memory 930 can include internal memory (e.g., RAM, ROM, or a hard drive) and / or removable memory (e.g., removable via a universal serial bus connection). The memory 930 can be a non-transitory computer-readable medium. The memory 930 can store information related to operations of the device 900, one or more instructions, and / or software (e.g., one or more software applications). In some implementations, the memory 930 can include one or more memories coupled (e.g., communicatively coupled) to one or more processors (e.g., the processor 920) via, for example, the bus 910. The communicative coupling between the processor 920 and the memory 930 can enable the processor 920 to read and / or process information stored in the memory 930 and / or store information in the memory 930.

[0127] The input component 940 can enable the device 900 to receive input, such as user input and / or sensed input. For example, the input component 940 can include a touch screen, a keyboard, a keypad, a mouse, a button, a microphone, a switch, a sensor, a global positioning system sensor, a global navigation satellite system sensor, an accelerometer, a gyroscope, and / or an actuator. The output component 950 can enable the device 900 to provide output, such as via a display, a speaker, and / or a light emitting diode. The communication component 960 can enable the device 900 to communicate with other devices via wired and / or wireless connections. For example, the communication component 960 can include a receiver, a transmitter, a transceiver, a modem, a network adapter, and / or an antenna.

[0128] The device 900 may perform one or more operations or processes described herein. For example, a non-transitory computer-readable medium (e.g., memory 930) may store a set of instructions (e.g., one or more instructions or codes) for execution by the processor 920. The processor 920 may execute the set of instructions to perform one or more operations or processes described herein. In some embodiments, execution of the set of instructions by the one or more processors 920 causes the one or more processors 920 and / or the device 900 to perform one or more operations or processes described herein. In some embodiments, hardwired circuitry may be used in place of or in combination with the instructions to perform one or more operations or processes described herein. Additionally and / or alternatively, the processor 920 may be configured to perform one or more operations or processes described herein. Thus, the embodiments described herein are not limited to any specific combination of hardwired circuitry and software.

[0129] FIG. 9 The number and arrangement of components shown in are provided as examples. FIG. 9 , device 900 may include additional components, fewer components, different components, or components arranged differently. Additionally and / or alternatively, one set of components (e.g., one or more components) of device 900 may perform one or more functions described as being performed by another set of components of device 900.

[0130] FIG. 10 is a flow chart of an exemplary process 1000 associated with forming the photodetector devices described herein. In some embodiments, FIG. 10 One or more process blocks are shown as being performed using one or more semiconductor processing tools (e.g., one or more semiconductor processing tools 102-114). Additionally and / or alternatively, FIG. 10 One or more process blocks may be implemented using one or more components of apparatus 900 (eg, processor 920 , memory 930 , input component 940 , output component 950 , and / or communication component 960 ).

[0131] like FIG. 10 As shown in FIG, process 1000 may include forming a mask layer over a substrate (block 1010). For example, a mask layer (e.g., mask layer 414, mask layer 614) may be formed over a substrate (e.g., semiconductor substrate 206) using one or more semiconductor processing tools 102-114, as described herein.

[0132] like FIG. 10As further shown, process 1000 can include forming a pattern in the mask layer (block 1020). For example, the pattern (e.g., stepped pattern 418, gradient pattern 618) can be formed in the mask layer using one or more semiconductor processing tools 102-114, as described herein. In some embodiments, the pattern includes a plurality of regions of the mask layer having different heights (e.g., regions 418a-418d, regions 618a and / or regions 618b).

[0133] As further shown, process 1000 can include forming a pattern in the mask layer (block 1020). For example, the pattern (e.g., stepped pattern 418, gradient pattern 618) can be formed in the mask layer using one or more semiconductor processing tools 102-114, as described herein. In some embodiments, the pattern includes a plurality of regions of the mask layer having different heights (e.g., regions 418a-418d, regions 618a and / or regions 618b). FIG. 10 As further shown, process 1000 can include etching the substrate in the etching operation based on the pattern to form a recess in the substrate having segments of different depths in the substrate (block 1030). For example, the substrate can be etched in the etching operation based on the pattern to form a recess (e.g., stepped recess 420, slanted recess 620) in the substrate having segments (e.g., segments 420a-420d, segments 620a-620c) of different depths in the substrate using one or more semiconductor processing tools 102-114, as described herein.

[0134] As further shown, process 1000 can include etching the substrate in the etching operation based on the pattern to form a recess in the substrate having segments of different depths in the substrate (block 1030). For example, the substrate can be etched in the etching operation based on the pattern to form a recess (e.g., stepped recess 420, slanted recess 620) in the substrate having segments (e.g., segments 420a-420d, segments 620a-620c) of different depths in the substrate using one or more semiconductor processing tools 102-114, as described herein. FIG. 10 As further shown, process 1000 can include forming an absorption region of a photodetector in the recess (block 1040). For example, the absorption region 208 of the photodetector can be formed in the recess using one or more semiconductor processing tools 102-114, as described herein.

[0135] Process 1000 can include additional embodiments, such as any single embodiment or any combination of embodiments set forth below and / or in connection with one or more other processes described elsewhere herein.

[0136] In a first embodiment, forming a pattern in the mask layer includes forming a gradient pattern 618 in the mask layer.

[0137] In a second embodiment, alone or in combination with the first embodiment, forming a pattern in the mask layer includes forming a stepped pattern 418 in the mask layer.

[0138] In a third embodiment, alone or in combination with one or more of the first and second embodiments, the pattern in the mask layer is consumed in the etching operation, resulting in openings in the mask layer that gradually increase in size, wherein the substrate is etched through the openings.

[0139] In a fourth embodiment, alone or in combination with one or more of the first through third embodiments, the plurality of regions of the mask layer includes a region in which the mask layer is completely removed, exposing the substrate through the mask layer (e.g., region 418d, region 618b).

[0140] In a fifth embodiment, alone or in combination with one or more of the first to fourth embodiments, a plurality of regions are arranged in a pattern such that different heights decrease toward the region where the mask layer is completely removed.

[0141] although FIG. 10 Exemplary blocks of process 1000 are shown, but in some embodiments, FIG. 10 The process 1000 may include additional blocks, fewer blocks, different blocks, or blocks arranged differently than those shown in FIG. Additionally, or alternatively, two or more of the blocks of the process 1000 may be performed in parallel.

[0142] In this manner, a photodetector can include an absorption region formed to have an increasing depth (or thickness) in a direction generally parallel to the direction of incident light projected onto the absorption region. The increased depth of the absorption region in a direction generally parallel to the direction of the incident light enables the incident light to be more evenly distributed along the length of the absorption region in a direction generally parallel to the direction of the incident light. This reduces the likelihood that a particular region of the absorption region will reach optical saturation, thereby enabling the operation of the photodetector with, among other things, consistently high photodetector sensitivity and / or consistently high light detection performance.

[0143] As described in greater detail above, some embodiments described herein provide a photodetector device. The photodetector device includes a waveguide. The photodetector device includes a photodetector coupled to the waveguide. The photodetector includes: an intrinsic semiconductor substrate including a first semiconductor material; a first-type doped collection region in the intrinsic semiconductor substrate; a second-type doped collection region in the intrinsic semiconductor substrate; and an absorption region in the semiconductor substrate between the first-type doped collection region and the second-type doped collection region. The absorption region includes the second semiconductor material. The absorption region includes a stepped or tapered profile in a direction substantially parallel to the direction in which the photodetector receives incident light from the waveguide.

[0144] In some embodiments, the absorption region comprises a stepped profile, and the stepped profile comprises a plurality of segments that increase in depth in a direction in which the light detector receives the incident light. In some embodiments, the plurality of segments comprises: a first segment configured to receive a first portion of the incident light; a second segment configured to receive a second portion of the incident light; and a third segment configured to receive a third portion of the incident light. In some embodiments, a difference in depth between the first segment and the second segment of the plurality of segments is based on an optical confinement parameter associated with the absorption region. In some embodiments, the absorption region is a first absorption region configured to absorb photons of a first wavelength range of the incident light; and the light detector further comprises a second absorption region configured to absorb photons of a second wavelength range of the incident light, wherein the first-type doped collection region and the second-type doped collection region are electrically coupled with the first absorption region and the second absorption region. In some embodiments, the second absorption region comprises a third semiconductor material, wherein the first semiconductor material, the second semiconductor material, and the third semiconductor material are different semiconductor materials. In some embodiments, the absorption region is a first absorption region configured to absorb photons of a first wavelength range of the incident light; the first-type doped collection region and the second-type doped collection region are electrically coupled with the first absorption region; and the light detector further comprises: a third-type doped collection region in the intrinsic semiconductor substrate; a fourth-type doped collection region in the intrinsic semiconductor substrate; and a second absorption region in the semiconductor substrate between the third-type doped collection region and the fourth-type doped collection region, the second absorption region configured to absorb photons of a second wavelength range of the incident light, wherein the third-type doped collection region and the fourth-type doped collection region are electrically coupled with the second absorption region.

[0145] As set forth in greater detail above, some embodiments set forth herein provide a light detector device. The light detector device includes a waveguide. The light detector device includes a light detector coupled with the waveguide. The light detector includes: an intrinsic semiconductor substrate comprising a first semiconductor material; a first-type doped collection region in the intrinsic semiconductor substrate; a second-type doped collection region in the intrinsic semiconductor substrate; and an absorption region in the semiconductor substrate between the first-type doped collection region and the second-type doped collection region. The absorption region comprises a second semiconductor material. The absorption region comprises a tapered profile in a direction substantially parallel to a direction in which the light detector receives incident light from the waveguide.

[0146] In some embodiments, the depth of the sloped floor of the absorption region in the sloped section increases from a first depth to a second depth in a direction in which the light detector receives the incoming light. In some embodiments, the sloped section is located between the first flat-bottom section and the second flat-bottom section in a direction in which the light detector receives the incoming light. In some embodiments, the absorption region is a first absorption region configured to absorb photons of a first wavelength range of the incoming light; and the light detector further comprises a second absorption region configured to absorb photons of a second wavelength range of the incoming light, wherein the first absorption region is adjacent to the second absorption region in a direction in which the light detector receives the incoming light, and wherein the first-type doped collection region and the second-type doped collection region are electrically coupled to the first absorption region and the second absorption region. In some embodiments, the second absorption region comprises another tapered profile. In some embodiments, the absorption region is a first absorption region configured to absorb photons of a first wavelength range of the incoming light; the first-type doped collection region and the second-type doped collection region are electrically coupled to the first absorption region; and the light detector further comprises: a third-type doped collection region in the intrinsic semiconductor substrate; a fourth-type doped collection region in the intrinsic semiconductor substrate; and a second absorption region in the semiconductor substrate between the third-type doped collection region and the fourth-type doped collection region, the second absorption region configured to absorb photons of a second wavelength range of the incoming light, wherein the first absorption region is adjacent to the second absorption region in a direction in which the light detector receives the incoming light, wherein the second absorption region comprises another tapered profile, and wherein the third-type doped collection region and the fourth-type doped collection region are electrically coupled to the second absorption region. In some embodiments, the second absorption region comprises a third semiconductor material, wherein the first semiconductor material, the second semiconductor material, and the third semiconductor material are different semiconductor materials.

[0147] As set forth in greater detail above, some embodiments set forth herein provide a method. The method includes forming a mask layer over a substrate. The method includes forming a pattern in the mask layer, where the pattern includes a plurality of regions of the mask layer having different heights. The method includes etching the substrate in an etching operation based on the pattern to form a recess in the substrate, the recess having sections of different depths in the substrate. The method includes forming an absorption region of a light detector in the recess.

[0148] In some embodiments, forming the pattern in the mask layer includes forming a gradient pattern in the mask layer. In some embodiments, forming the pattern in the mask layer includes forming a stepped pattern in the mask layer. In some embodiments, the pattern in the mask layer is consumed in the etching operation, resulting in openings in the mask layer that gradually increase in size, where the substrate is etched through the openings. In some embodiments, the plurality of regions of the mask layer includes regions in which the mask layer is completely removed, exposing the substrate through the mask layer. In some embodiments, the plurality of regions are arranged in the pattern such that the different heights decrease toward the regions in which the mask layer is completely removed.

[0149] Depending on the context, "satisfying a threshold" as used herein can refer to a value that is greater than the threshold, greater than or equal to the threshold, less than the threshold, less than or equal to the threshold, equal to the threshold, not equal to the threshold, or the like.

[0150] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and are not limited thereto; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can still be modified, or some or all of the technical features can be replaced by equivalents; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A photodetector device, characterized by, comprising: a waveguide; and a photodetector coupled to the waveguide, comprising: an intrinsic semiconductor substrate comprising a first semiconductor material; a first-type doped collection region in the intrinsic semiconductor substrate; a second-type doped collection region in the intrinsic semiconductor substrate; and an absorption region comprising a second semiconductor material, the absorption region being in the semiconductor substrate between the first-type doped collection region and the second-type doped collection region, wherein the absorption region comprises a stepped profile or a tapered profile in a direction substantially parallel to a direction in which the photodetector receives incident light from the waveguide.

2. The photodetector device of claim 1, wherein, The absorption region comprises the stepped profile, and the stepped profile comprises a plurality of segments of increasing depth in the direction in which the photodetector receives the incident light.

3. The photodetector device of claim 2, wherein, The plurality of segments comprises: a first segment configured to receive a first portion of the incident light; a second segment configured to receive a second portion of the incident light; and a third segment configured to receive a third portion of the incident light.

4. The photodetector device of claim 2, wherein, A difference in depth between a first segment and a second segment of the plurality of segments is based on an optical confinement parameter related to the absorption region.

5. The photodetector device of claim 1, wherein, The absorption region is a first absorption region configured to absorb photons of a first wavelength range of the incident light; and wherein the photodetector further comprises a second absorption region configured to absorb photons of a second wavelength range of the incident light, wherein the first-type doped collection region and the second-type doped collection region are electrically coupled to the first absorption region and the second absorption region.

6. The photodetector device of claim 1, wherein, The absorption region is a first absorption region configured to absorb photons of a first wavelength range of the incident light; wherein the first-type doped collection region and the second-type doped collection region are electrically coupled to the first absorption region; and wherein the photodetector further comprises: a third-type doped collection region in the intrinsic semiconductor substrate; a fourth-type doped collection region in the intrinsic semiconductor substrate; and a second absorption region in the semiconductor substrate between the third-type doped collection region and the fourth-type doped collection region, the second absorption region being configured to absorb photons of a second wavelength range of the incident light, wherein the third-type doped collection region and the fourth-type doped collection region are electrically coupled to the second absorption region.

7. A photodetector device, characterized by comprising: a waveguide; and a photodetector coupled to the waveguide, comprising: an intrinsic semiconductor substrate comprising a first semiconductor material; a first-type doped collection region in the intrinsic semiconductor substrate; a second-type doped collection region in the intrinsic semiconductor substrate; and an absorption region comprising a second semiconductor material, the absorption region being in the semiconductor substrate between the first-type doped collection region and the second-type doped collection region, wherein the absorption region comprises a tapered profile in a direction substantially parallel to a direction in which the photodetector receives incident light from the waveguide.

8. The photodetector device of claim 7, wherein, A depth of a sloped bottom surface of the absorption region in a sloped segment increases from a first depth to a second depth in the direction in which the photodetector receives the incident light.

9. The photodetector device of claim 8, wherein, In the direction in which the light detector receives the incident light, the tilted section is located between a first flat-bottom section and a second flat-bottom section.

10. The photodetector device of claim 7, wherein, The absorption region is a first absorption region configured to absorb photons of a first wavelength range of the incident light; and wherein the light detector further comprises a second absorption region configured to absorb photons of a second wavelength range of the incident light, wherein in the direction in which the light detector receives the incident light, the first absorption region is adjacent to the second absorption region, and wherein the first-type doped collection region and the second-type doped collection region are electrically coupled to the first absorption region and the second absorption region.

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