Control circuit for universal serial bus

Abstract

The utility model provides a control circuit for a universal serial bus (USB), which can detect a resistance value at a power supply end of the bus. The control circuit includes a blocking switch, a current source circuit, a discharge circuit, and a controller. The blocking switch is electrically connected between the power supply end of the USB and the bus power end of the USB. The current source circuit is electrically connected between the power supply end and the bus power end. Before power is supplied to the bus power supply end, the controller disconnects the blocking switch and controls the discharging circuit to pull down an output voltage value located at the bus power supply end. When the output voltage value is lower than or equal to the set voltage value, the controller controls the discharge circuit to stop pulling down the output voltage value and controls the current source circuit to provide the test current for the bus power supply end. The controller obtains a resistance value at the bus power supply end according to the output voltage value and the current value of the test current.

Description

Technical Field

[0001] This utility model relates to a control circuit, and more particularly to a control circuit for a Universal Serial Bus (USB). Background Technology

[0002] The Universal Serial Bus (USB) includes a power supply terminal (Vbus) and a ground terminal (GND). When the USB malfunctions or is used incorrectly, the power supply and ground terminals exhibit low resistance values. Such low resistance values ​​are, for example, tens of ohms (Ω). This low resistance does not cause a short circuit between the power supply and ground terminals. However, the localized heat generated by the current due to the low resistance is sufficient to damage the USB structure (e.g., the USB tongue). Therefore, how to detect the resistance value at the power supply terminal is a key research focus for those skilled in the art. Utility Model Content

[0003] This invention provides a control circuit for a Universal Serial Bus (USB) capable of detecting the resistance value at the power supply terminal of the bus.

[0004] In one embodiment of this invention, the control circuit includes a blocking switch, a current source circuit, a discharge circuit, and a controller. The blocking switch is electrically connected between the USB power supply terminal and the USB bus power supply terminal. The current source circuit is electrically connected between the power supply terminal and the bus power supply terminal. The controller is electrically connected to the control terminal of the blocking switch, the current source circuit, and the discharge circuit. Before supplying power to the bus power supply terminal, the controller disconnects the blocking switch and controls the discharge circuit to pull down the output voltage value at the bus power supply terminal. When the output voltage value is lower than or equal to a first set voltage value, the controller controls the discharge circuit to stop pulling down the output voltage value and controls the current source circuit to provide a test current to the bus power supply terminal. The controller obtains the resistance value at the bus power supply terminal based on the output voltage value and the test current value.

[0005] In one embodiment of this invention, the current source circuit includes a first current source and a first switch. A first terminal of the first current source is electrically connected to a power supply terminal. The first current source generates a test current. The first switch is electrically connected between a second terminal of the first current source and a bus power supply terminal.

[0006] In one embodiment of this invention, the discharge circuit includes a second current source and a second switch. A first terminal of the second current source is electrically connected to a bus power supply terminal. The second current source generates a discharge current. The second switch is electrically connected between a second terminal of the second current source and a reference low voltage.

[0007] In one embodiment of this utility model, before supplying power to the bus power supply terminal, the controller disconnects the blocking switch, disconnects the first switch, and turns on the second switch.

[0008] In one embodiment of this utility model, when the output voltage value drops to the first set voltage value, the controller disconnects the blocking switch, disconnects the second switch, and turns on the first switch.

[0009] In one embodiment of this utility model, during the period when the test current is provided to the bus power supply terminal, when the output voltage value is higher than the second set voltage value, the controller turns on the blocking switch.

[0010] In one embodiment of this invention, the control circuit further includes a comparator. The comparator is electrically connected to the bus power supply terminal and the controller. The comparator receives an output voltage value and a first set voltage value. Before supplying power to the bus power supply terminal, the comparator compares the output voltage value and the first set voltage value to generate a comparison signal.

[0011] In one embodiment of this invention, the controller receives a comparison signal before supplying power to the bus power supply terminal. When the comparison signal indicates that the output voltage value is higher than a first set voltage value, the controller controls the discharge circuit to pull down the output voltage value and controls the current source circuit to stop providing test current to the bus power supply terminal.

[0012] In one embodiment of this utility model, when the comparison signal indicates that the output voltage value is lower than or equal to the first set voltage value, the controller controls the discharge circuit to stop pulling down the output voltage value and controls the current source circuit to provide test current to the bus power supply terminal.

[0013] In one embodiment of this invention, the control circuit communicates with the powered device connected to the bus power supply terminal to obtain the communication resistance value. The controller determines whether to control the current source circuit to provide test current to the bus power supply terminal based on the communication resistance value.

[0014] Based on the above, before supplying power to the bus power supply terminal, the controller controls the discharge circuit to pull down the output voltage value at the bus power supply terminal. When the output voltage value is lower than or equal to a first set voltage value, the controller controls the discharge circuit to stop pulling down the output voltage value and controls the current source circuit to provide a test current to the bus power supply terminal. Therefore, the controller can obtain the resistance value at the bus power supply terminal based on the output voltage value and the test current value. In this way, before supplying power to the bus power supply terminal, the control circuit can determine whether the bus power supply terminal has an abnormal condition such as a low resistance value based on the resistance value at the bus power supply terminal. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the control circuit according to an embodiment of the present invention.

[0016] Figure 2This is a schematic diagram of the control circuit according to an embodiment of the present invention.

[0017] Figure 3 This is a schematic diagram of the control circuit according to an embodiment of the present invention.

[0018] Figure 4 This is an operational schematic diagram of the control circuit shown in an embodiment of the present invention.

[0019] Explanation of reference numerals in the attached figures

[0020] 100, 200, 300: Control circuit

[0021] 110, 210: Current source circuit

[0022] 120, 220: Discharge circuit

[0023] 130, 230, 330: Controller

[0024] 211, 221: Current source

[0025] 340: Comparator

[0026] ED1: Power receiving device

[0027] ID: Discharge Current

[0028] IT: Test Current

[0029] RR, RT: Resistance values

[0030] S1, S2, SB: Control signals

[0031] SCP: Comparison Signal

[0032] SW1, SW2: Switches

[0033] SWB: Block switch

[0034] Vbus: Bus power supply terminal

[0035] VCC: Power supply terminal

[0036] VO: Output voltage value

[0037] VS1, VS2: Set voltage values Detailed Implementation

[0038] Some embodiments of this utility model will now be described in detail with reference to the accompanying drawings. Component symbols used in the following description, when appearing in different drawings, are considered to be the same or similar components. These embodiments are only a part of this utility model and do not disclose all possible implementations of this utility model. More precisely, these embodiments are merely examples within the scope of the patent application of this utility model.

[0039] Please refer to Figure 1 , Figure 1 This is a schematic diagram of a control circuit according to an embodiment of the present invention. In this embodiment, the control circuit 100 is used for a Universal Serial Bus (USB). USB can be any version of the bus including a power supply terminal VCC and a bus power supply terminal Vbus. The control circuit 100 includes a blocking switch SWB, a current source circuit 110, a discharge circuit 120, and a controller 130. The blocking switch SWB is electrically connected between the USB power supply terminal VCC and the USB bus power supply terminal Vbus. The current source circuit 110 is electrically connected between the power supply terminal VCC and the bus power supply terminal Vbus. The controller 130 is electrically connected to the control terminal of the blocking switch SWB, the current source circuit 110, and the discharge circuit 120. The controller 130 controls the blocking switch SWB, the current source circuit 110, and the discharge circuit 120 to perform a detection operation of the resistance value RR at the bus power supply terminal Vbus.

[0040] In this embodiment, the detection operation is performed before power is supplied to the bus power terminal Vbus. For example, the detection operation may be performed while the blocking switch SWB is open.

[0041] In this embodiment, before supplying power to the bus power terminal Vbus, the controller 130 disconnects the blocking switch SWB and controls the discharge circuit 120 to pull down the output voltage value VO at the bus power terminal Vbus. When the output voltage value VO is pulled down to a level lower than or equal to the set voltage value VS1, the controller 130 controls the discharge circuit 120 to stop pulling down the output voltage value VO and controls the current source circuit 110 to provide a test current IT to the bus power terminal Vbus. The controller 130 obtains the resistance value RR at the bus power terminal Vbus based on the output voltage value VO and the current value of the test current IT.

[0042] In this embodiment, the resistance value RR at the bus power supply terminal Vbus can be the quotient of the output voltage value VO divided by the test current IT. The controller 130 determines whether the bus power supply terminal Vbus has an abnormal condition such as low resistance or short circuit based on the resistance value RR at the bus power supply terminal Vbus.

[0043] It is worth mentioning that before supplying power to the bus power terminal Vbus, the discharge circuit 120 pulls down the output voltage value VO at the bus power terminal Vbus. When the output voltage value VO is pulled down to a value lower than or equal to the set voltage value VS1, the discharge circuit 120 stops pulling down the output voltage value VO. The current source circuit 110 provides a test current IT to the bus power terminal Vbus. The controller 130 obtains the resistance value RR at the bus power terminal Vbus based on the output voltage value VO and the current value of the test current IT. In this way, before supplying power to the bus power terminal Vbus, the control circuit 100 determines whether the bus power terminal Vbus has an abnormal condition such as low resistance or short circuit based on the resistance value RR at the bus power terminal Vbus.

[0044] For example, the set voltage value VS1 is, for instance, 0.8 volts (V), but this invention is not limited thereto. The test current IT is a constant current. The current value of the test current IT is, for instance, 1 milliampere (mA), but this invention is not limited thereto. The output voltage value VO is, for instance, 0.8V, but this invention is not limited thereto. Therefore, the resistance value RR at the bus power supply terminal Vbus is approximately equal to 800 ohms (Ω).

[0045] Generally, current detection techniques can detect whether a short circuit has occurred at the bus power terminal Vbus, but they do not detect whether the bus power terminal Vbus has a low resistance value. Such a low resistance value is, for example, tens of ohms (Ω). Such a low resistance value will not cause a short circuit between the bus power terminal Vbus and the ground terminal. However, during the power supply to the bus power terminal Vbus, the local heat energy of the current generated by the low resistance value is sufficient to damage the USB structure (e.g., the USB tongue). It should be noted that the aforementioned low resistance value cannot be detected by current detection techniques. The control circuit 100 of this embodiment can determine whether the bus power terminal Vbus has a low resistance value. Therefore, the control circuit 100 can perform protection or warning based on the resistance value RR of the bus power terminal Vbus.

[0046] In this embodiment, the blocking switch SWB is implemented by a field-effect transistor. However, this invention is not limited to the form of the blocking switch SWB. The blocking switch SWB of this invention can be implemented by at least one transistor of any type.

[0047] In this embodiment, the controller 130 uses control signal SB to control the blocking switch SWB, control signal S1 to control the current source circuit 110, and control signal S2 to control the discharge circuit 120. The controller 130 is, for example, a central processing unit (CPU), or other programmable general-purpose or special-purpose microprocessor, digital signal processor (DSP), programmable controller, application-specific integrated circuit (ASIC), programmable logic device (PLD), or other similar device or combination thereof.

[0048] Please refer to Figure 2 , Figure 2 This is a schematic diagram of a control circuit according to an embodiment of the present invention. In this embodiment, the control circuit 200 includes a blocking switch SWB, a current source circuit 210, a discharge circuit 220, and a controller 230. The blocking switch SWB is electrically connected between the power supply terminal VCC and the bus power supply terminal Vbus. The current source circuit 210 includes a current source 211 and a switch SW1. The first terminal of the current source 211 is electrically connected to the power supply terminal VCC. The current source 211 generates a test current IT. The switch SW1 is electrically connected between the second terminal of the current source 211 and the bus power supply terminal Vbus. The discharge circuit 220 includes a current source 221 and a switch SW2. The first terminal of the current source 221 is electrically connected to the bus power supply terminal Vbus. The current source 221 generates a discharge current ID. The switch SW2 is electrically connected between the second terminal of the second current source 221 and a reference low voltage.

[0049] In this embodiment, the controller 230 is electrically connected to the control terminals of the blocking switch SWB, the switch SW1, and the switch SW2. Before supplying power to the bus power terminal Vbus, the controller 230 disconnects the blocking switch SWB, disconnects the switch SW1, and turns on the switch SW2. Therefore, the output voltage value VO can be pulled down based on the discharge current ID.

[0050] When the output voltage VO is reduced to the set voltage VS1, the controller 230 opens the blocking switch SWB, opens switch SW2, and turns on switch SW1. Therefore, the test current IT is supplied to the bus power supply terminal Vbus.

[0051] During the period when the test current IT is supplied to the bus power supply terminal Vbus, when the output voltage value VO is higher than the set voltage value VS2, the controller 230 turns on the blocking switch SWB. Meanwhile, switches SW1 and SW2 are turned off.

[0052] For example, the set voltage values ​​VS1 and VS2 are respectively 0.8V, but this invention is not limited thereto. Therefore, before supplying power to the bus power terminal Vbus, the discharge circuit 220 pulls down the output voltage value VO at the bus power terminal Vbus to below or equal to the set voltage value VS1. Next, while the test current IT is supplied to the bus power terminal Vbus, when the output voltage value VO is higher than the set voltage value VS2, the controller 230 turns on the blocking switch SWB. Therefore, pulling down the output voltage value VO at the bus power terminal Vbus to below or equal to the set voltage value VS1 can meet the Vself0V specification.

[0053] In this embodiment, the set voltage value VS1 is the same as the set voltage value VS2. In some embodiments, the set voltage value VS2 is different from the set voltage value VS1.

[0054] In this embodiment, switches SW1 and SW2 are implemented, for example, by transistors of any type.

[0055] In this embodiment, current source 211 is driven, for example, by a power supply located at the power supply terminal VCC to generate a test current IT. Current source 221 is driven, for example, by a power supply located at the power supply terminal VCC or by an output voltage value VO located at the bus power supply terminal Vbus to generate a discharge current ID.

[0056] Please refer to Figure 3 , Figure 3 This is a schematic diagram of a control circuit according to an embodiment of the present invention. In this embodiment, the control circuit 300 includes a blocking switch SWB, a current source circuit 210, a discharge circuit 220, a controller 330, and a comparator 340. The implementation of the blocking switch SWB, the current source circuit 210, and the discharge circuit 220 has already been described. Figure 2 The embodiments are clearly illustrated and will not be repeated here.

[0057] In this embodiment, comparator 340 is electrically connected to the bus power supply terminal Vbus and the controller 330. Comparator 340 receives the output voltage value VO and the set voltage value VS1. Before supplying power to the bus power supply terminal Vbus, comparator 340 compares the output voltage value VO and the set voltage value VS1 to generate a comparison signal SCP.

[0058] Before supplying power to the bus power supply terminal Vbus, the controller 330 receives a comparison signal SCP. When the comparison signal SCP indicates that the output voltage value VO is higher than the set voltage value VS1, the controller 330 controls the discharge circuit 220 to pull down the output voltage value VO and controls the current source circuit 210 to stop providing the test current IT to the bus power supply terminal Vbus. When the comparison signal SCP indicates that the output voltage value VO is lower than or equal to the set voltage value VS1, the controller 330 controls the discharge circuit 220 to stop pulling down the output voltage value VO and controls the current source circuit 210 to provide the test current IT to the bus power supply terminal Vbus.

[0059] For example, the first input of comparator 340 (e.g., the inverting input) is electrically connected to the bus power supply Vbus to receive the output voltage value VO. The second input of comparator 340 (e.g., the non-inverting input) receives a set voltage value VS1. When the output voltage value VO is higher than the set voltage value VS1, the comparison signal SCP has a first value (e.g., low voltage value, low logic value, or low current value). Therefore, controller 330 will open switch SW1 and turn on switch SW2 according to the first value.

[0060] On the other hand, when the output voltage value VO is lower than or equal to the set voltage value VS1, the comparison signal SCP has a second value (e.g., high voltage value, high logic value, or high current value). Therefore, the controller 330 will open switch SW2 and turn on switch SW1 based on the second value.

[0061] In this embodiment, the controller 230 uses the control signal SB to control the blocking switch SWB, the control signal S1 to control the switch SW1, and the control signal S2 to control the switch SW2.

[0062] In this embodiment, comparator 340 is located outside the controller 330. In some embodiments, comparator 340 may be located inside the controller 330.

[0063] Please refer to Figure 1 as well as Figure 4 , Figure 4 This is a schematic diagram of the operation of the control circuit according to an embodiment of the present invention. In this embodiment, the powered device ED1 is connected to the bus power supply terminal Vbus. The powered device ED1 can receive electrical energy via the USB bus power supply terminal Vbus. Before the USB supplies power to the bus power supply terminal Vbus (i.e., before the USB starts supplying power to the powered device ED1), the control circuit 100 communicates with the powered device ED1 to obtain the communication resistance value RT. The controller 130 determines whether to control the current source circuit 110 to provide a test current IT to the bus power supply terminal Vbus based on the communication resistance value RT.

[0064] For example, control circuit 100 can communicate with powered device ED1 via the Channel Configuration (CC) pin to obtain the communication resistance value RT.

[0065] In this embodiment, the communication resistance value RT is the resistance value located at the bus power supply terminal Vbus when the bus power supply terminal Vbus is connected to the powered device ED1. For example, when the communication resistance value RT is too low (e.g., tens of Ω), the control circuit 100 will not perform a detection operation on the resistance value located at the bus power supply terminal Vbus before power is supplied to the bus power supply terminal Vbus.

[0066] For another example, when the communication resistance value RT is high enough, the control circuit 100 will perform a detection operation on the resistance value located at the bus power supply terminal Vbus before power is supplied to the bus power supply terminal Vbus.

[0067] In this embodiment, the power receiving device ED1 can be any device that uses USB to receive electrical energy.

[0068] In summary, before supplying power to the USB bus power terminal, the discharge circuit pulls down the output voltage at the bus power terminal. When the output voltage is pulled down to a value lower than or equal to a set value, the discharge circuit stops pulling down the output voltage. The current source circuit provides a test current to the bus power terminal. The controller uses the output voltage and the test current to determine the resistance value at the bus power terminal. In this way, before supplying power to the bus power terminal, the control circuit uses the resistance value at the bus power terminal to determine if there are any abnormal conditions such as low resistance or short circuits.

[0069] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A control circuit for a universal serial bus, characterized in that, The control circuit includes: A blocking switch is electrically connected between the power supply terminal of the Universal Serial Bus and the bus power supply terminal of the Universal Serial Bus. A current source circuit is electrically connected between the power supply terminal and the bus power supply terminal; The discharge circuit is electrically connected between the bus power supply terminal and the reference low voltage; and The controller is electrically connected to the control terminal of the blocking switch, the current source circuit, and the discharge circuit. Before supplying power to the bus power supply terminal, the controller disconnects the blocking switch and controls the discharge circuit to pull down the output voltage value at the bus power supply terminal. When the output voltage value is lower than or equal to a first set voltage value, the controller controls the discharge circuit to stop pulling down the output voltage value and controls the current source circuit to provide test current to the bus power supply terminal. The controller obtains the resistance value at the bus power supply terminal based on the output voltage value and the test current value.

2. The control circuit according to claim 1, characterized in that, The current source circuit includes: A first current source, wherein a first terminal of the first current source is electrically connected to the power supply terminal and configured to generate the test current; and The first switch is electrically connected between the second terminal of the first current source and the bus power supply terminal.

3. The control circuit according to claim 2, characterized in that, The discharge circuit includes: A second current source, the first terminal of which is electrically connected to the bus power supply terminal and configured to generate a discharge current; and The second switch is electrically connected between the second terminal of the second current source and the reference low voltage.

4. The control circuit according to claim 3, characterized in that, Before supplying power to the bus power terminal, the controller disconnects the blocking switch, disconnects the first switch, and turns on the second switch.

5. The control circuit according to claim 3, characterized in that, When the output voltage value drops to the first set voltage value, the controller disconnects the blocking switch, disconnects the second switch, and turns on the first switch.

6. The control circuit according to claim 1, characterized in that, During the period when the test current is supplied to the bus power supply terminal, when the output voltage value is higher than the second set voltage value, the controller turns on the blocking switch.

7. The control circuit according to claim 1, characterized in that, The control circuit also includes: A comparator, electrically connected to the bus power supply and the controller, is configured to receive the output voltage value and the first set voltage value. Before supplying power to the bus power supply terminal, the comparator compares the output voltage value with the first set voltage value to generate a comparison signal.

8. The control circuit according to claim 1, characterized in that: Before supplying power to the bus power supply terminal, the controller receives a comparison signal, and When the comparison signal indicates that the output voltage value is higher than the first set voltage value, the controller controls the discharge circuit to pull down the output voltage value and controls the current source circuit to stop providing the test current to the bus power supply terminal.

9. The control circuit according to claim 8, characterized in that, When the comparison signal indicates that the output voltage value is lower than or equal to the first set voltage value, the controller controls the discharge circuit to stop pulling down the output voltage value and controls the current source circuit to provide the test current to the bus power supply terminal.

10. The control circuit according to claim 1, characterized in that: The control circuit communicates with the powered device connected to the bus power supply terminal to obtain the communication resistance value, and The controller determines whether to control the current source circuit to provide test current to the bus power supply terminal based on the communication resistance value.

Images