Display device and light-emitting element

Abstract

The utility model relates to a display device and a light-emitting element. The display device includes a first electrode and a second electrode spaced apart from each other, and a light emitting element disposed between the first electrode and the second electrode. Each of the light emitting elements includes a first semiconductor layer, a second semiconductor layer disposed on the first semiconductor layer, and an active layer disposed between the first semiconductor layer and the second semiconductor layer. Each of the light emitting elements emits light having a wavelength in a range of about 464 nm to about 468 nm at a current density in a range of about 0.5 A / cm2 to about 100 A / cm2, and has a maximum external quantum efficiency of greater than or equal to about 15%.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2023-0118334, filed on September 6, 2023, with the Korean Intellectual Property Office (KIPO), the entire contents of which are incorporated herein by reference. Technical Field

[0003] This invention relates to display devices and light-emitting elements. Background Technology

[0004] Recently, with the increasing interest in information display, research and development of display devices have been ongoing. Utility Model Content

[0005] The problem this disclosure aims to solve is to improve the reliability of light-emitting elements.

[0006] The purpose of this disclosure is not limited to the foregoing, but rather other purposes not described herein will be clearly understood by those skilled in the art from the following description.

[0007] A display device according to an embodiment may include a first electrode and a second electrode spaced apart from each other, and a light-emitting element disposed between the first electrode and the second electrode. Each of the light-emitting elements may include a first semiconductor layer, a second semiconductor layer disposed on the first semiconductor layer, and an active layer disposed between the first semiconductor layer and the second semiconductor layer. Each of the light-emitting elements may have an efficiency of approximately 0.5 A / cm². 2 Approximately 100A / cm 2 It emits light with wavelengths in the range of about 464 nm to about 468 nm at current densities within the range, and each of the light-emitting elements can have a maximum external quantum efficiency greater than or equal to about 15%.

[0008] The thickness of the active layer can range from about 1.0 nm to about 2.8 nm.

[0009] The molar fraction of indium in the active layer can be in the range of about 0.17 to about 0.20.

[0010] The length of the light-emitting element can be less than or equal to approximately 50 μm.

[0011] The first electrode may overlap with the first semiconductor layer in a planar view, and the second electrode may overlap with the second semiconductor layer in a planar view.

[0012] The display device may also include a first connecting electrode and a second connecting electrode disposed on the light-emitting element.

[0013] The first connecting electrode can be electrically connected to the first semiconductor layer, and the second connecting electrode can be electrically connected to the second semiconductor layer.

[0014] The first connecting electrode can be electrically connected to the first electrode, and the second connecting electrode can be electrically connected to the second electrode.

[0015] Display devices may also include a color conversion layer disposed on the light-emitting element.

[0016] The color conversion layer may include a first color conversion layer, a second color conversion layer, and a scattering layer.

[0017] The first color conversion layer may include a first quantum dot, and the second color conversion layer may include a second quantum dot.

[0018] The scattering layer may include a scatterer.

[0019] The display device may also include a color filter layer disposed on the color conversion layer.

[0020] The color filter layer may include a first color filter that overlaps with the first color conversion layer in the planar view, a second color filter that overlaps with the second color conversion layer in the planar view, and a third color filter that overlaps with the scattering layer in the planar view.

[0021] The display device may also include a light-blocking layer disposed between the first color filter, the second color filter and the third color filter.

[0022] The light-emitting element according to the embodiment may include a first semiconductor layer, a second semiconductor layer disposed on the first semiconductor layer, and an active layer disposed between the first semiconductor layer and the second semiconductor layer. The light-emitting element can achieve approximately 0.5 A / cm². 2 Approximately 100A / cm 2 It emits light with wavelengths ranging from about 464 nm to about 468 nm at current densities within a certain range, and the light-emitting element can have a maximum external quantum efficiency greater than or equal to about 15%.

[0023] The thickness of the active layer can range from about 1.0 nm to about 2.8 nm.

[0024] The molar fraction of indium in the active layer can be in the range of about 0.17 to about 0.20.

[0025] The light-emitting element may also include an electrode layer disposed on the first semiconductor layer.

[0026] The light-emitting element may also include an insulating film surrounding the first semiconductor layer, the active layer, and the second semiconductor layer.

[0027] Specific details of other embodiments are included in the specification and drawings.

[0028] According to embodiments of this disclosure, the reliability of a light-emitting element can be improved by increasing the emission wavelength of the light-emitting element.

[0029] The effects are not limited to the examples given above, and many more effects are included in the instruction manual. Attached Figure Description

[0030] Figure 1 This is a perspective view of the light-emitting element according to the embodiment.

[0031] Figure 2 This is a schematic cross-sectional view of a light-emitting element according to an embodiment.

[0032] Figure 3 This is a plan view of a display device according to an embodiment.

[0033] Figure 4 This is a schematic diagram of the equivalent circuit of a pixel according to the implementation method.

[0034] Figure 5 and Figure 6 It is a planar view of pixels according to the implementation method.

[0035] Figure 7 It is along Figure 5 A schematic cross-sectional view taken by line A-A'.

[0036] Figure 8 It is along Figure 5 A schematic cross-sectional view taken by line B-B'.

[0037] Figure 9 It is along Figure 6 A schematic cross-sectional view taken by line C-C'.

[0038] Figure 10 It is along Figure 6 A schematic cross-sectional view taken by line D-D'.

[0039] Figure 11 It is a schematic cross-sectional view of the first pixel, the second pixel, and the third pixel according to the implementation method.

[0040] Figure 12 It is a schematic cross-sectional view of pixels according to the implementation method. Detailed Implementation

[0041] The advantages and features of this disclosure and its implementation methods will be illustrated by the following embodiments described with reference to the accompanying drawings. However, this disclosure is not limited to the embodiments disclosed below and can be implemented in various different forms. These embodiments are provided so that the disclosure is complete and fully informs those skilled in the art of this disclosure of its scope, which is defined by the scope of the claims.

[0042] The terminology used in this specification is for the purpose of describing embodiments and is not intended to limit this disclosure. In this specification, the singular includes the plural unless otherwise stated. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to also include the plural forms as used herein. Furthermore, the terms “comprises,” “comprising,” “includes,” and / or “including,” when used in this specification, specify the presence of stated features, integrals, steps, operations, elements, components, and / or groups thereof, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. It should also be noted that, as used herein, the terms “substantially,” “about,” and other similar terms are used as approximations, not as terms of degree, and therefore allow for inherent deviations in measurements, calculations, and / or provided values ​​that will be recognized by those skilled in the art.

[0043] Furthermore, the terms "connection" or "access" can uniformly refer to a physical and / or electrical connection or access. Additionally, the terms "connection" or "access" can refer to a direct or indirect connection or access, as well as a holistic or non-holistic connection or access.

[0044] When an element or layer is referred to as being on, connected to, or coupled to another element or layer, the element or layer may be directly on, directly connected to, or directly coupled to the other element or layer, or there may be an intervening element or layer. However, when an element or layer is referred to as being "directly on," "directly connected to," or "directly coupled to" another element or layer, there is no intervening element or layer. Therefore, the term "connection" can refer to a physical connection, electrical connection, and / or fluid connection with or without an intervening element. Furthermore, when an element is referred to as being "in contact" or "contacted" with another element, the element may be in "electrical contact" or "physical contact" with the other element; or in "indirect contact" or "direct contact" with the other element. Throughout this specification, the same reference numerals refer to the same elements.

[0045] In the specification and claims, the phrase "at least one of..." is intended, for its meaning and descriptive purposes, to include the meaning of "at least one selected from the group...". For example, "at least one of A and B" can be understood to mean A, B, or A and B. In the specification and claims, the term "and / or" is intended, for its meaning and descriptive purposes, to include any combination of the terms "and" and "or". For example, "A and / or B" can be understood to mean "A, B, or A and B". The terms "and" and "or" can be used in a combined or derivational sense and can be understood as equivalent to "and / or".

[0046] Although the terms "first," "second," etc., are used to describe various constituent elements, these constituent elements are not limited by these terms. These terms are only used to distinguish one constituent element from another. Therefore, within the technical spirit of this disclosure, the first constituent element described below can be a second constituent element.

[0047] Unless otherwise defined or implied herein, all terms used (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It should also be understood that terms, such as those defined in common dictionaries, shall be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and shall not be interpreted as having an ideal or overly formal meaning unless clearly defined in the specification.

[0048] In the following description, we will use the accompanying drawings to illustrate this disclosure in detail.

[0049] Figure 1 This is a perspective view of the light-emitting element according to the embodiment. Figure 2 This is a schematic cross-sectional view of a light-emitting element according to an embodiment. Figure 1 and Figure 2 The columnar shape of the light-emitting element (LD) is shown, but the type and / or shape of the light-emitting element (LD) is not limited to this.

[0050] Reference Figure 1 and Figure 2 The light-emitting element (LD) may include a first semiconductor layer 11, an active layer 12, a second semiconductor layer 13, and / or an electrode layer 14.

[0051] The light-emitting element (LD) can be formed into a column shape extending in one direction. The LD can have a first end EP1 and a second end EP2. One of the first semiconductor layer 11 and the second semiconductor layer 13 can be disposed at the first end EP1 of the LD. The other of the first semiconductor layer 11 and the second semiconductor layer 13 can be disposed at the second end EP2 of the LD. For example, the first semiconductor layer 11 can be disposed at the first end EP1 of the LD, and the second semiconductor layer 13 can be disposed at the second end EP2 of the LD.

[0052] According to the embodiments, the light-emitting element (LD) can be a light-emitting element manufactured into a columnar shape by etching or the like. In this specification, the columnar shape includes a rod-shaped or strip-shaped shape with an aspect ratio greater than 1, such as a circular column or a polygonal column, but the shape of the light-emitting element (LD) is not particularly limited.

[0053] The light-emitting element (LD) can have dimensions ranging from nanometers to micrometers. The LD can have a diameter D (or width) and / or length L ranging from nanometers to micrometers. For example, the length of the LD can be less than or equal to about 50 μm. For example, the length of the LD can be less than or equal to 10 μm. For example, the length of the LD can be less than or equal to about 5 μm. Thus, when the size of the LD is reduced, reliability problems such as reduced brightness due to damage to the surface of the LD may occur. Therefore, according to embodiments, the reliability of the LD can be improved by increasing the emission wavelength of the LD. In embodiments, the LD can have an emission wavelength of about 0.5 A / cm. 2 Approximately 100A / cm 2 It emits light with wavelengths in the range of approximately 464 nm to approximately 468 nm at current densities within a certain range. For example, a light-emitting element (LD) can emit light at approximately 12 A / cm². 2 It emits light with wavelengths in the range of approximately 464 nm to approximately 468 nm at a given current density. In an embodiment, the indium content and thickness of the active layer 12 can be adjusted to increase the emission wavelength of the light-emitting element (LD). A detailed description of this is provided below.

[0054] The first semiconductor layer 11 may be a semiconductor layer of a first conductivity type. For example, the first semiconductor layer 11 may be a p-type semiconductor layer. For example, the first semiconductor layer 11 may include at least one of InAlGaN, GaN, AlGaN, InGaN, and AlN, and may be a p-type semiconductor layer doped with a first conductive dopant such as Mg. However, the materials constituting the first semiconductor layer 11 are not limited to these, and various other materials may constitute the first semiconductor layer 11.

[0055] An active layer 12 may be disposed between a first semiconductor layer 11 and a second semiconductor layer 13. The active layer 12 may include one of a single-well structure, a multi-well structure, a single quantum well structure, a multiple quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure, but this disclosure is limited thereto. The active layer 12 may include GaN, InGaN, InAlGaN, AlGaN, or AlN, and various other materials may constitute the active layer 12. When a threshold voltage or a higher voltage is applied to the opposite ends of the light-emitting element LD, the light-emitting element LD can emit light when electron-hole pairs recombine in the active layer 12. By controlling the emission of the light-emitting element LD using this principle, the light-emitting element LD can be used as a light source for various light-emitting elements, including pixels of display devices.

[0056] In this embodiment, the emission wavelength of the light-emitting element (LD) can be increased by adjusting the indium content and thickness of the active layer 12. In this embodiment, the thickness of the active layer 12 can be in the range of about 1.0 nm to about 2.8 nm. For example, the thickness of the active layer 12 can be in the range of about 1.0 nm to about 2.4 nm. The molar fraction of indium in the active layer 12 can be in the range of about 0.17 to about 0.20. For example, the molar fraction of indium in the active layer 12 can be in the range of about 0.18 to about 0.20. The indium (In) composition of the active layer 12 can have a uniform distribution along the length L of the light-emitting element LD, but can have a different distribution along the diameter D of the light-emitting element LD. Thus, when the indium composition of the active layer 12 is not uniformly formed along the diameter D of the light-emitting element LD, it can be beneficial to improve the characteristics of the light-emitting element LD. However, this disclosure is not necessarily limited to this, and the indium composition of the active layer 12 can have various distributions along the length L or diameter D of the light-emitting element LD.

[0057] In this embodiment, the indium content of the active layer 12 can be increased by lowering the growth temperature of the active layer 12, and the thickness of the active layer 12 can be reduced by shortening the growth time of the active layer 12, but this disclosure is not necessarily limited to these.

[0058] As described above, by adjusting the indium content and thickness of the active layer 12, the current path toward the surface can be controlled to minimize the reduction in brightness due to surface damage and improve the reliability of the light-emitting element LD.

[0059] The second semiconductor layer 13 may be disposed on the active layer 12 and may include a semiconductor layer of a different type than the first semiconductor layer 11. The second semiconductor layer 13 may include an n-type semiconductor layer. For example, the second semiconductor layer 13 may include at least one of InAlGaN, GaN, AlGaN, InGaN, and AlN, and may be an n-type semiconductor layer doped with a second conductive dopant (such as Si, Ge, Sn, etc.). However, the materials constituting the second semiconductor layer 13 are not limited to these, and the second semiconductor layer 13 may be formed from various materials.

[0060] Electrode layer 14 can be disposed on the first end EP1 and / or the second end EP2 of the light-emitting element LD. Figure 2 The illustration shows an embodiment in which the electrode layer 14 is formed on the first semiconductor layer 11, but this disclosure is not necessarily limited thereto. For example, a separate electrode layer may be further provided on the second semiconductor layer 13.

[0061] The electrode layer 14 may comprise a transparent metal or a transparent metal oxide. For example, the electrode layer 14 may comprise at least one of indium tin oxide (ITO), indium zinc oxide (IZO), and zinc tin oxide (ZTO), but this disclosure is not necessarily limited thereto. Thus, when the electrode layer 14 is made of a transparent metal or a transparent metal oxide, light generated in the active layer 12 of the light-emitting element LD can pass through the electrode layer 14 and be emitted to the outside of the light-emitting element LD.

[0062] An insulating film INF can be disposed on the surface of the light-emitting element LD. The insulating film INF can be disposed (e.g., directly disposed) on the surface of the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and / or the electrode layer 14. The insulating film INF can expose the first end EP1 and the second end EP2 of the light-emitting element LD, which have different polarities.

[0063] The insulating film INF can prevent electrical short circuits that may occur when the active layer 12 contacts conductive materials other than the first semiconductor layer 11 and the second semiconductor layer 13. The insulating film INF can improve the lifetime and luminous efficiency of the light-emitting element LD by minimizing surface defects of the light-emitting element LD.

[0064] The insulating film INF may include silicon oxide (SiO2) x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO) x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) and titanium oxide (TiO)x At least one of the following. For example, the insulating film INF can be composed of a double layer, and each layer constituting the double layer can include a different material. For example, the insulating film INF can be made of aluminum oxide (AlO). x The composition is a bilayer consisting of silicon oxide (SiOx) and silicon oxide (SiOx), but this disclosure is not necessarily limited thereto. According to embodiments, the insulating film INF may be omitted.

[0065] Light-emitting elements (LEDs), including light-emitting diodes (LDs), can be used in various types of devices that require a light source, such as display devices. For example, an LED can be placed in each pixel of a display panel, and the LED can serve as the light source for each pixel. However, the applications of LEDs are not limited to the examples above. For instance, LEDs can also be used in other types of devices that require a light source, such as lighting devices.

[0066] According to the above embodiments, by adjusting the indium content and thickness of the active layer 12 to increase the emission wavelength of the light-emitting element LD, the reliability of the light-emitting element LD can be improved.

[0067] [Table 1]

[0068] 100 hours 500 hours 1000 hours Comparative example 94.9％ 82.9％ 69.8％ Example 97.8％ 90.3％ 79.0％

[0069] [Table 2]

[0070] Peak EQE Comparative example 14.3±0.5％ Example 15.2±0.9％

[0071] Table 1 describes the evaluation of the brightness retention rate of the light-emitting elements in the comparative and example examples based on the driving time, where the comparative examples are light-emitting elements emitting light at a wavelength of 460 nm, and the example examples are light-emitting elements emitting light at a wavelength of 466 nm. Table 2 describes the evaluation of the maximum external quantum efficiency of the light-emitting elements in the comparative and example examples, where the comparative examples are light-emitting elements emitting light at a wavelength of 460 nm, and the example examples are light-emitting elements emitting light at a wavelength of 466 nm.

[0072] Referring to the results in Tables 1 and 2, it can be seen that, in the embodiment of the exemplary light-emitting element, the brightness retention rate is improved under long-term driving conditions, and the maximum external quantum efficiency is also improved compared to the light-emitting element of the comparative example. The light-emitting element LD according to the embodiment (example) of this disclosure can have a maximum external quantum efficiency greater than or equal to about 15%.

[0073] Figure 3 This is a plan view of a display device according to an embodiment.

[0074] exist Figure 3 In this context, the display device, particularly the display panel PNL disposed within the display device, will be shown as usable. Figure 1 and Figure 2The embodiments described herein are implementations of an electronic device in which the light-emitting element LD is used as a light source.

[0075] For ease of description, Figure 3 The structure of the display panel PNL is briefly shown in the display area DA. However, according to an embodiment, at least one driving circuit unit (e.g., at least one of a scan driver and a data driver), lines, and / or pads, not shown, may be further provided on the display panel PNL.

[0076] Reference Figure 3 The display panel PNL and the base layer BSL used to form the display panel PNL may include a display area DA for displaying images and a non-display area NDA other than the display area DA. The display area DA may constitute a screen on which the image is displayed, and the non-display area NDA may be the remaining area other than the display area DA.

[0077] Pixel unit PXU can be disposed in display area DA. Pixel unit PXU may include a first pixel PXL1, a second pixel PXL2, and / or a third pixel PXL3. In the following text, when at least one of the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 is mentioned arbitrarily, or when two or more types of pixels are mentioned together, it will be referred to as "pixel PXL" or "multiple pixels PXL".

[0078] Pixel PXL can be based on stripes or The arrangement of pixels PXL is structured in a regular manner. However, the arrangement of pixels PXL is not limited to this, and pixels PXL can be arranged in the display area DA in various structures and / or ways.

[0079] According to an embodiment, two or more types of pixels PXL emitting different colors of light can be provided in the display area DA. For example, in the display area DA, a first pixel PXL1 emitting a first color of light, a second pixel PXL2 emitting a second color of light, and a third pixel PXL3 emitting a third color of light can be provided. At least one of the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 arranged adjacent to each other can constitute a pixel unit PXU capable of emitting various colors of light. For example, each of the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 can be a pixel emitting a single color of light. According to an embodiment, the first pixel PXL1 can be a red pixel emitting red light, the second pixel PXL2 can be a green pixel emitting green light, and the third pixel PXL3 can be a blue pixel emitting blue light, but this disclosure is not limited thereto.

[0080] In one embodiment, the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 may have light-emitting elements that emit light of the same color, but may include color conversion layers and / or color filter layers of different colors disposed on each light-emitting element, thus emitting light of the first, second, and third colors respectively. In another embodiment, the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 may each have light-emitting elements of the first, second, and third colors as light sources, thus also emitting light of the first, second, and third colors respectively. However, there are no particular limitations on the color, type, and / or number of pixels PXL constituting each pixel unit PXU. The color of the light emitted by each pixel PXL can be changed in various ways.

[0081] Pixel PXL may include at least one light source driven by control signals (e.g., scan signals and data signals) and / or power supplies (e.g., a first power supply and a second power supply). In embodiments, the light source may include at least one according to Figure 1 and Figure 2 The embodiments described herein include light-emitting elements (LDs), such as ultra-small cylindrical LDs with sizes ranging from nanometers to micrometers. However, this disclosure is not necessarily limited to this, and various types of LDs can be used as the light source for the pixel PXL.

[0082] In this implementation, each pixel PXL can be formed from active pixels. However, there are no particular limitations on the type, structure, and / or driving method of the pixel PXL that can be applied to the display device. For example, each pixel PXL can be composed of pixels from passive or active light-emitting display devices having various structures and / or driving methods.

[0083] Figure 4 This is a schematic diagram of the equivalent circuit of a pixel according to the implementation method.

[0084] Figure 4 The pixel PXL shown can be in Figure 3 One of the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 is set in the display panel PNL. The first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 may have substantially the same or similar structures.

[0085] Reference Figure 4 The pixel PXL may include a light-emitting unit EMU for generating light with a brightness corresponding to each data signal and a pixel circuit PXC for driving the light-emitting unit EMU.

[0086] The pixel circuit PXC can be connected between the first power supply VDD and the light-emitting unit EMU. The pixel circuit PXC can be connected to the scan line SL and data line DL of the corresponding pixel PXL, and can control the operation of the light-emitting unit EMU in response to the scan signals and data signals provided from the scan line SL and data line DL. The pixel circuit PXC can be further selectively connected to the sensing signal line SSL and the sensing line SENL.

[0087] A pixel circuit (PXC) may include at least one transistor and at least one capacitor. For example, a pixel circuit (PXC) may include a first transistor M1, a second transistor M2, a third transistor M3, and a storage capacitor Cst.

[0088] The first transistor M1 can be connected between the first power supply VDD and the first connection electrode ELT1. The gate electrode of the first transistor M1 can be connected to the first node N1. The first transistor M1 can control the driving current supplied to the light-emitting unit EMU in response to the voltage of the first node N1. The first transistor M1 can be a driving transistor that controls the driving current of the pixel PXL.

[0089] In one embodiment, the first transistor M1 may optionally include a lower conductive layer BML (also referred to as a "lower electrode," "back gate electrode," or "lower light-blocking layer"). The gate electrode of the first transistor M1 and the lower conductive layer BML may overlap each other, and an insulating layer is located between the gate electrode of the first transistor M1 and the lower conductive layer BML. In another embodiment, the lower conductive layer BML may be connected to an electrode of the first transistor M1, such as the source or drain.

[0090] When the first transistor M1 includes a lower conductive layer BML, a reverse biasing technique can be applied when driving the pixel PXL. This reverse biasing technique shifts the threshold voltage of the first transistor M1 in either the negative or positive direction by applying a reverse bias voltage to the lower conductive layer BML. For example, by applying a source-sink technique that connects the lower conductive layer BML to the source of the first transistor M1, the threshold voltage of the first transistor M1 can be shifted in either the negative or positive direction. When the lower conductive layer BML is disposed below the semiconductor pattern constituting the channel of the first transistor M1, the lower conductive layer BML can serve as a light-blocking pattern and stabilize the operating characteristics of the first transistor M1. However, the function and / or utilization method of the lower conductive layer BML are not limited to this.

[0091] The second transistor M2 can be connected between the data line DL and the first node N1. The gate electrode of the second transistor M2 can be connected to the scan line SL. When a scan signal with a gate turn-on voltage (e.g., a high-level voltage) is provided from the scan line SL, the second transistor M2 can be turned on and can be connected between the data line DL and the first node N1.

[0092] During each frame cycle, the data signal for the corresponding frame can be provided to the data line DL, and the data signal can be transmitted to the first node N1 via a second transistor M2 that is turned on during the cycle of a scan signal that provides a gate on voltage. The second transistor M2 can be a switching transistor for transmitting each data signal to the pixel PXL.

[0093] One electrode of the storage capacitor Cst can be connected to the first node N1, and the other electrode of the storage capacitor Cst can be connected to the second electrode of the first transistor M1. The storage capacitor Cst can be charged in each frame cycle with a voltage corresponding to the data signal provided to the first node N1.

[0094] A third transistor M3 can be connected between the first connection electrode ELT1 (or the second electrode of the first transistor M1) and the sensing line SENL. The gate electrode of the third transistor M3 can be connected to the sensing signal line SSL. The third transistor M3 can transmit the voltage value applied to the first connection electrode ELT1 to the sensing line SENL according to the sensing signal provided to the sensing signal line SSL. The voltage value transmitted through the sensing line SENL can be provided to external circuitry (e.g., a timing controller), and the external circuitry can extract feature information (e.g., the threshold voltage of the first transistor M1 for each pixel PXL) based on the provided voltage value. The extracted feature information can be used to transform image data, thereby compensating for feature deviations between pixels PXL.

[0095] exist Figure 4 In this disclosure, all transistors included in the pixel circuit PXC are shown as n-type transistors, but this disclosure is not necessarily limited to this. For example, at least one of the first transistor M1, the second transistor M2, and the third transistor M3 may be a p-type transistor.

[0096] The structure and driving method of pixel PXL can be changed in various ways. For example, besides Figure 4 In addition to the embodiments shown, the pixel circuit PXC can be composed of pixel circuits having various structures and / or driving methods.

[0097] For example, the pixel circuit PXC may not include the third transistor M3. The pixel circuit PXC may also include other circuit elements, such as a compensation transistor for compensating the threshold voltage of the first transistor M1, an initialization transistor for initializing the voltage of the first node N1 and / or the first connection electrode ELT1, a light-emitting control transistor for controlling the period of providing drive current to the light-emitting unit EMU, and / or a boost capacitor for boosting the voltage of the first node N1.

[0098] The light-emitting unit (EMU) may include at least one light-emitting element (LD) connected between a first power supply (VDD) and a second power supply (VSS), or for example, multiple light-emitting elements (LDs).

[0099] For example, the light-emitting unit (EMU) may include a first connection electrode ELT1 connected to a first power supply VDD via a pixel circuit PXC and a first power line PL1, a fifth connection electrode ELT5 connected to a second power supply VSS via a second power line PL2, and a plurality of light-emitting elements (LDs) connected between the first connection electrode ELT1 and the fifth connection electrode ELT5.

[0100] The first power supply VDD and the second power supply VSS can have different potentials, allowing the light-emitting element (LD) to emit light. For example, the first power supply VDD can be set to a high potential, and the second power supply VSS can be set to a low potential.

[0101] In an embodiment, the light-emitting unit (EMU) may include at least one series stage. Each series stage may include a pair of electrodes (e.g., two electrodes) and at least one light-emitting element (LD) connected in the forward direction between the pair of electrodes. Here, there is no particular limitation on the number of series stages constituting the EMU and the number of light-emitting elements (LDs) constituting each series stage. For example, the number of light-emitting elements (LDs) constituting each series stage may be the same or different, and there is no particular limitation on the number of light-emitting elements (LDs).

[0102] For example, the light-emitting unit (EMU) may include: a first series stage, including at least one first light-emitting element LD1; a second series stage, including at least one second light-emitting element LD2; a third series stage, including at least one third light-emitting element LD3; and a fourth series stage, including at least one fourth light-emitting element LD4.

[0103] The first series stage may include a first connecting electrode ELT1 and a second connecting electrode ELT2, and at least one first light-emitting element LD1 connected between the first connecting electrode ELT1 and the second connecting electrode ELT2. Each first light-emitting element LD1 may be connected in the forward direction between the first connecting electrode ELT1 and the second connecting electrode ELT2. For example, a first end EP1 of the first light-emitting element LD1 may be connected to the first connecting electrode ELT1, and a second end EP2 of the first light-emitting element LD1 may be connected to the second connecting electrode ELT2.

[0104] The second series stage may include a second connecting electrode ELT2 and a third connecting electrode ELT3, and at least one second light-emitting element LD2 connected between the second connecting electrode ELT2 and the third connecting electrode ELT3. Each second light-emitting element LD2 may be connected in the forward direction between the second connecting electrode ELT2 and the third connecting electrode ELT3. For example, the first end EP1 of the second light-emitting element LD2 may be connected to the second connecting electrode ELT2, and the second end EP2 of the second light-emitting element LD2 may be connected to the third connecting electrode ELT3.

[0105] The third series stage may include a third connecting electrode ELT3 and a fourth connecting electrode ELT4, and at least one third light-emitting element LD3 connected between the third connecting electrode ELT3 and the fourth connecting electrode ELT4. Each third light-emitting element LD3 may be connected between the third connecting electrode ELT3 and the fourth connecting electrode ELT4 in the forward direction. For example, the first end EP1 of the third light-emitting element LD3 may be connected to the third connecting electrode ELT3, and the second end EP2 of the third light-emitting element LD3 may be connected to the fourth connecting electrode ELT4.

[0106] The fourth series stage may include a fourth connecting electrode ELT4 and a fifth connecting electrode ELT5, and at least one fourth light-emitting element LD4 connected between the fourth connecting electrode ELT4 and the fifth connecting electrode ELT5. Each fourth light-emitting element LD4 may be connected between the fourth connecting electrode ELT4 and the fifth connecting electrode ELT5 in the forward direction. For example, the first end EP1 of the fourth light-emitting element LD4 may be connected to the fourth connecting electrode ELT4, and the second end EP2 of the fourth light-emitting element LD4 may be connected to the fifth connecting electrode ELT5.

[0107] The first electrode of the light-emitting unit (EMU) (e.g., the first connecting electrode ELT1) can be the anode electrode of the light-emitting unit (EMU). The last electrode of the light-emitting unit (EMU) (e.g., the fifth connecting electrode ELT5) can be the cathode electrode of the light-emitting unit (EMU).

[0108] The remaining electrodes of the light-emitting unit (EMU) (e.g., the second connecting electrode ELT2, the third connecting electrode ELT3, and / or the fourth connecting electrode ELT4) can form intermediate electrodes. For example, the second connecting electrode ELT2 can form the first intermediate electrode IET1, the third connecting electrode ELT3 can form the second intermediate electrode IET2, and the fourth connecting electrode ELT4 can form the third intermediate electrode IET3.

[0109] When light-emitting elements (LDs) are connected in a series / parallel configuration, power efficiency can be improved compared to when the same number of LDs are connected only in parallel. In a pixel PXL where LDs are connected in a series / parallel configuration, even if a short-circuit defect occurs in some series stages, a certain brightness can be represented by another LD in the series stage, thereby reducing the possibility of dark spot defects in the pixel PXL. However, this disclosure is not necessarily limited to this, and the light-emitting unit (EMU) can be formed by connecting only LDs in series, or the light-emitting unit (EMU) can be formed by connecting only LDs in parallel.

[0110] Each light-emitting element (LD) may include a first terminal EP1 (e.g., p-type terminal) connected to a first power supply VDD via at least one electrode (e.g., a first connecting electrode ELT1), a pixel circuit PXC, and / or a first power line PL1, and a second terminal EP2 (e.g., an n-type terminal) connected to a second power supply VSS via at least another electrode (e.g., a fifth connecting electrode ELT5) and a second power line PL2. The LD can be connected in the forward direction between the first power supply VDD and the second power supply VSS. A LD connected in the forward direction can constitute an effective light source for a light-emitting unit (EMU).

[0111] When a drive current is provided through the corresponding pixel circuit (PXC), the light-emitting element (LD) can emit light with a brightness corresponding to the drive current. For example, during each frame period, the pixel circuit (PXC) can provide a drive current to the light-emitting unit (EMU) corresponding to the grayscale value to be represented in the corresponding frame. Therefore, when the light-emitting element (LD) emits light with a brightness corresponding to the drive current, the light-emitting unit (EMU) can represent a brightness corresponding to the drive current.

[0112] Figure 5 and Figure 6 It is a planar view of pixels according to the implementation method. Figure 7 It is along Figure 5 A schematic cross-sectional view taken by line A-A'. Figure 8 It is along Figure 5 A schematic cross-sectional view taken by line B-B'. Figure 9 It is along Figure 6 A schematic cross-sectional view taken by line C-C'. Figure 10 It is along Figure 6 A schematic cross-sectional view taken by line D-D'.

[0113] For example, Figure 5 and Figure 6 It can be a composition Figure 3 The pixel unit PXU has one of the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3, and the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 may have substantially the same or similar structures to each other. Figure 5 and Figure 6 Each pixel PXL is shown to include, for example Figure 4 The embodiment shown is an LD with light-emitting elements arranged in four series stages, but the number of series stages for each pixel PXL can be changed in various ways depending on the embodiment.

[0114] In the following text, when one or more of the first light-emitting element LD1, the second light-emitting element LD2, the third light-emitting element LD3, and the fourth light-emitting element LD4 are mentioned arbitrarily, or when two or more types of light-emitting elements are mentioned together, they are referred to as "light-emitting element LD" or "multiple light-emitting elements LD". When at least one of the electrodes including the first electrode ALE1, the second electrode ALE2, and the third electrode ALE3 is mentioned arbitrarily, it is referred to as "electrode ALE" or "multiple electrodes ALE", and when at least one of the electrodes including the first connecting electrode ELT1, the second connecting electrode ELT2, the third connecting electrode ELT3, the fourth connecting electrode ELT4, and the fifth connecting electrode ELT5 is mentioned arbitrarily, it is referred to as "connecting electrode ELT" or "multiple connecting electrodes ELT".

[0115] Reference Figure 5 and Figure 6 Pixel PXL may include an emitting region EA and a non-emitting region NEA. The emitting region EA may include a light-emitting element LD and may be an area capable of emitting light. The non-emitting region NEA may surround the emitting region EA in a plan view. The non-emitting region NEA may be a region in which a first embankment BNK1 is disposed surrounding the emitting region EA. The first embankment BNK1 may be disposed in the non-emitting region NEA and configured to at least partially surround the emitting region EA in a plan view.

[0116] The first dam BNK1 may include an opening that overlaps with the emission region EA in the plan view. The opening of the first dam BNK1 can provide space in which the light-emitting element LD can be disposed during the step of providing light-emitting element LD to each pixel PXL. For example, the desired type and / or amount of light-emitting element ink can be supplied to the space defined by the opening of the first dam BNK1.

[0117] The first layer BNK1 may include organic materials such as acrylate resins, epoxy resins, phenolic resins, polyamide resins, polyimide resins, polyester resins, polyphenylene sulfide resins, or benzocyclobutene (BCB). However, this disclosure is not necessarily limited thereto, and the first layer BNK1 may include materials such as silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO) x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) or titanium oxide (TiO) x Various types of inorganic materials.

[0118] According to an embodiment, the first dam BNK1 may include at least one light-blocking and / or reflective material. Therefore, light leakage between adjacent pixels PXL can be prevented. For example, the first dam BNK1 may include at least one black pigment.

[0119] The second dam BNK2 may include an opening that overlaps with the emission region EA in the plan view. The opening of the second dam BNK2 can provide space in which a color conversion layer, as described below, can be placed. For example, a color conversion layer of the desired type and / or amount can be provided to the space defined by the opening of the second dam BNK2.

[0120] The second layer BNK2 may include organic materials such as acrylate resins, epoxy resins, phenolic resins, polyamide resins, polyimide resins, polyester resins, polyphenylene sulfide resins, or benzocyclobutene (BCB). However, this disclosure is not necessarily limited thereto, and the second layer BNK2 may include, for example, silicon oxide (SiO2). x ), silicon nitride (SiNx), silicon oxide nitride (SiO) x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrOx), hafnium oxide (HfO x ) or titanium oxide (TiO) x Various types of inorganic materials.

[0121] According to an embodiment, the second dam BNK2 may include at least one light-blocking and / or reflective material. Therefore, light leakage between adjacent pixels PXL can be prevented. For example, the second dam BNK2 may include at least one black pigment.

[0122] The pixel PXL may include a separator wall WL, an electrode ALE, a light-emitting element LD, and / or a connecting electrode ELT.

[0123] The partition wall WL may overlap with the emission region EA and may be spaced apart from each other in a plan view. The partition wall WL may be at least partially located in the non-emission region NEA. The partition wall WL may extend in a second direction (Y-axis direction) and be spaced apart from each other in a first direction (X-axis direction).

[0124] Each of the partition walls WL can partially overlap with at least one electrode ALE in the emission region EA. For example, the partition walls WL can be respectively disposed below the electrode ALE. Since the partition walls WL are disposed below the region of each of the electrodes ALE, the region of each of the electrodes ALE can protrude toward the upper direction of the pixel PXL, for example, in the third direction (Z-axis direction) in the region forming the partition wall WL. When the partition walls WL and / or the electrodes ALE include reflective material, a reflective wall structure can be formed around the light-emitting element LD. Therefore, light emitted from the light-emitting element LD can be emitted in the upper direction of the pixel PXL (e.g., the front direction of the display panel PNL including the viewing angle range), thus improving the light output efficiency of the display panel PNL.

[0125] Electrodes ALE can be disposed at least in the emission region EA. Electrodes ALE can extend in a second direction (Y-axis direction) and be spaced apart from each other in a first direction (X-axis direction).

[0126] Each of the first electrode ALE1, the second electrode ALE2, and the third electrode ALE3 can extend in a second direction (Y-axis direction) and can be arranged sequentially and spaced apart in a first direction (X-axis direction). Some of the electrodes ALE can be connected to the pixel circuit through contact holes. Figure 4 The first electrode ALE1 can be connected to the pixel circuit PXC and / or the first power line PL1 through a contact hole, and the second electrode ALE2 can be connected to the second power line PL2 through a contact hole.

[0127] According to the implementation, some of the electrodes ALE can be electrically connected to some of the connecting electrodes ELT through contact holes. For example, the first electrode ALE1 can be electrically connected to the first connecting electrode ELT1 through contact holes, and the second electrode ALE2 can be electrically connected to the fifth connecting electrode ELT5 through contact holes.

[0128] In the alignment step of the light-emitting element (LD), a pair of adjacent electrodes (ALE) can receive different signals. For example, when the first electrode (ALE1), the second electrode (ALE2), and the third electrode (ALE3) are arranged sequentially in the first direction (X-axis direction), the first electrode (ALE1) and the second electrode (ALE2) can receive different alignment signals from each other, and the second electrode (ALE2) and the third electrode (ALE3) can receive different alignment signals from each other.

[0129] Each of the light-emitting elements (LDs) can be aligned in the emission region EA between a pair of adjacent electrodes ALE. Each of the light-emitting elements (LDs) can be electrically connected between a pair of adjacent connection electrodes ELT.

[0130] The first light-emitting element LD1 can be aligned between the first electrode ALE1 and the second electrode ALE2. The first light-emitting element LD1 can be electrically connected between the first connecting electrode ELT1 and the second connecting electrode ELT2. For example, the first light-emitting element LD1 can be aligned in a first region (e.g., the upper region) of the first electrode ALE1 and the second electrode ALE2, the first end EP1 of the first light-emitting element LD1 can be electrically connected to the first connecting electrode ELT1, and the second end EP2 of the first light-emitting element LD1 can be electrically connected to the second connecting electrode ELT2.

[0131] The second light-emitting element LD2 can be aligned between the first electrode ALE1 and the second electrode ALE2. The second light-emitting element LD2 can be electrically connected between the second connecting electrode ELT2 and the third connecting electrode ELT3. For example, the second light-emitting element LD2 can be aligned in a second region (e.g., a lower region) of the first electrode ALE1 and the second electrode ALE2, the first end EP1 of the second light-emitting element LD2 can be electrically connected to the second connecting electrode ELT2, and the second end EP2 of the second light-emitting element LD2 can be electrically connected to the third connecting electrode ELT3.

[0132] The third light-emitting element LD3 can be aligned between the second electrode AlE2 and the third electrode AlE3. The third light-emitting element LD3 can be electrically connected between the third connecting electrode ELT3 and the fourth connecting electrode ELT4. For example, the third light-emitting element LD3 can be aligned in the second region (e.g., the lower region) of the second electrode AlE2 and the third electrode AlE3, the first end EP1 of the third light-emitting element LD3 can be electrically connected to the third connecting electrode ELT3, and the second end EP2 of the third light-emitting element LD3 can be electrically connected to the fourth connecting electrode ELT4.

[0133] The fourth light-emitting element LD4 can be aligned between the second electrode ALE2 and the third electrode ALE3. The fourth light-emitting element LD4 can be electrically connected between the fourth connecting electrode ELT4 and the fifth connecting electrode ELT5. For example, the fourth light-emitting element LD4 can be aligned in the first region (e.g., the upper region) of the second electrode ALE2 and the third electrode ALE3, the first end EP1 of the fourth light-emitting element LD4 can be electrically connected to the fourth connecting electrode ELT4, and the second end EP2 of the fourth light-emitting element LD4 can be electrically connected to the fifth connecting electrode ELT5.

[0134] For example, the first light-emitting element LD1 can be located in the upper left region of the emission region EA, and the second light-emitting element LD2 can be located in the lower left region of the emission region EA. The third light-emitting element LD3 can be located in the lower right region of the emission region EA, and the fourth light-emitting element LD4 can be located in the upper right region of the emission region EA. However, the arrangement and / or connection structure of the light-emitting elements LD can be varied in various ways depending on the structure of the light-emitting unit EMU and / or the number of series stages.

[0135] Each connecting electrode ELT may be disposed at least in the emission region EA and may be arranged to overlap with at least one electrode ALE and / or light-emitting element LD in a plan view. For example, the connecting electrode ELT may be formed on the electrode ALE and / or light-emitting element LD to overlap with the electrode ALE and / or light-emitting element LD respectively in a plan view and may be electrically connected to the light-emitting element LD.

[0136] The first connecting electrode ELT1 can be disposed on the first region (e.g., the upper region) of the first electrode ALE1 and the first end EP1 of the first light-emitting element LD1, so as to be electrically connected to the first end EP1 of the first light-emitting element LD1.

[0137] The second connecting electrode ELT2 can be disposed on the first region (e.g., the upper region) of the second electrode ALE2 and on the second end EP2 of the first light-emitting element LD1, to electrically connect to the second end EP2 of the first light-emitting element LD1. The second connecting electrode ELT2 can also be disposed on the second region (e.g., the lower region) of the first electrode ALE1 and on the first end EP1 of the second light-emitting element LD2, to electrically connect to the first end EP1 of the second light-emitting element LD2. For example, the second connecting electrode ELT2 can electrically connect the second end EP2 of the first light-emitting element LD1 and the first end EP1 of the second light-emitting element LD2 in the emission region EA. For this purpose, the second connecting electrode ELT2 can have a curved shape. For example, the second connecting electrode ELT2 can have an angled or curved structure at the boundary between the region in which at least one first light-emitting element LD1 is disposed and the region in which at least one second light-emitting element LD2 is disposed.

[0138] The third connecting electrode ELT3 can be disposed in the second region (e.g., the lower region) of the second electrode ALE2 and on the second end EP2 of the second light-emitting element LD2, to be electrically connected to the second end EP2 of the second light-emitting element LD2. The third connecting electrode ELT3 can also be disposed in the second region (e.g., the lower region) of the third electrode ALE3 and on the first end EP1 of the third light-emitting element LD3, to be electrically connected to the first end EP1 of the third light-emitting element LD3. For example, the third connecting electrode ELT3 can electrically connect the second end EP2 of the second light-emitting element LD2 and the first end EP1 of the third light-emitting element LD3 in the emission region EA. For this purpose, the third connecting electrode ELT3 can have a curved shape. For example, the third connecting electrode ELT3 can have an angled or curved structure at the boundary between the region in which at least one second light-emitting element LD2 is disposed and the region in which at least one third light-emitting element LD3 is disposed.

[0139] The fourth connecting electrode ELT4 can be disposed on the second region (e.g., the lower region) of the second electrode ALE2 and the second end EP2 of the third light-emitting element LD3, to electrically connect to the second end EP2 of the third light-emitting element LD3. The fourth connecting electrode ELT4 can also be disposed on the first region (e.g., the upper region) of the third electrode ALE3 and the first end EP1 of the fourth light-emitting element LD4, to electrically connect to the first end EP1 of the fourth light-emitting element LD4. For example, the fourth connecting electrode ELT4 can electrically connect the second end EP2 of the third light-emitting element LD3 and the first end EP1 of the fourth light-emitting element LD4 in the emission region EA. For this purpose, the fourth connecting electrode ELT4 can have a curved shape. For example, the fourth connecting electrode ELT4 can have an angled or curved structure at the boundary between the region in which at least one third light-emitting element LD3 is disposed and the region in which at least one fourth light-emitting element LD4 is disposed.

[0140] The fifth connecting electrode ELT5 can be disposed on the first region (e.g., the upper region) of the second electrode ALE2 and the second end EP2 of the fourth light-emitting element LD4, so as to be electrically connected to the second end EP2 of the fourth light-emitting element LD4.

[0141] The first connecting electrode ELT1, the third connecting electrode ELT3, and / or the fifth connecting electrode ELT5 can be made of the same conductive layer. The second connecting electrode ELT2 and the fourth connecting electrode ELT4 can also be made of the same conductive layer. For example, as... Figure 9As shown, the connecting electrodes ELT can be made of multiple conductive layers. The first connecting electrode ELT1, the third connecting electrode ELT3, and / or the fifth connecting electrode ELT5 can be made of the first conductive layer, and the second connecting electrode ELT2 and the fourth connecting electrode ELT4 can be made of a second conductive layer different from the first conductive layer. In another embodiment, as... Figure 10 As shown, the first connecting electrode ELT1, the second connecting electrode ELT2, the third connecting electrode ELT3, the fourth connecting electrode ELT4, and the fifth connecting electrode ELT5 can be made of the same conductive layer.

[0142] In the above embodiments, the light-emitting elements LD aligned between electrodes ALE can be connected in a desired shape using connecting electrodes ELT. For example, the first light-emitting element LD1, the second light-emitting element LD2, the third light-emitting element LD3, and the fourth light-emitting element LD4 can be connected in series sequentially using connecting electrodes ELT.

[0143] In the following text, reference will be made to Figures 7 to 10 Describe the cross-sectional structure of pixel PXL in detail. Figures 7 to 10 The pixel circuit is shown. Figure 4 In the PXC (Physical X-ray Discrete) circuit, the first transistor M1 is referred to as the first transistor M1, the second transistor M2, and the third transistor M3, and they are collectively referred to as "transistor M". The structure and / or arrangement of each layer of transistor M is not limited to... Figures 7 to 10 The embodiments shown are different from those shown in the figure and can be modified in various ways.

[0144] According to the embodiment, the pixel PXL may include circuit elements, which include transistors M disposed on the base layer BSL and various lines connected to transistors M. On the circuit elements, electrodes ALE constituting the light-emitting unit EMU, light-emitting element LD, connecting electrode ELT, first electrode BNK1, and / or second electrode BNK2 may be disposed.

[0145] The base layer (BSL) can constitute a basic component and can be a rigid or flexible substrate or film. For example, the base layer (BSL) can be a rigid substrate made of glass or tempered glass, a flexible substrate (or film) made of plastic or metal, or at least one insulating layer. The material and / or physical properties of the base layer (BSL) are not particularly limited. In one embodiment, the base layer (BSL) can be substantially transparent. Here, "substantially transparent" can mean that light can be transmitted beyond a certain transmittance (a predetermined transmittance or a selectable transmittance). In another embodiment, the base layer (BSL) can be translucent or opaque. The base layer (BSL) may include a reflective material.

[0146] The lower conductive layer BML and the first electrical conductive layer PL2a can be disposed on the base layer BSL. The lower conductive layer BML and the first electrical conductive layer PL2a can be disposed on the same layer. For example, the lower conductive layer BML and the first electrical conductive layer PL2a can be formed simultaneously in the same process, but this disclosure is not necessarily limited thereto. The first electrical conductive layer PL2a can be formed as shown in the reference figure. Figure 4 The second power line PL2, etc., is described.

[0147] Each of the lower conductive layer BML and the first electrical conductive layer PL2a can be formed as a single layer or multiple layers made of molybdenum (Mo), copper (Cu), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), indium (In), tin (Sn) and their oxides or alloys.

[0148] A buffer layer BFL can be disposed on the lower conductive layer BML and the first electrically conductive layer PL2a. The buffer layer BFL can prevent impurities from diffusing into the circuit elements. The buffer layer BFL can be formed as a single layer or as a multilayer structure with at least two layers. When the buffer layer BFL is formed as a multilayer structure, each layer can be formed of the same material or can be formed of different materials.

[0149] A semiconductor pattern SCP can be disposed on a buffer layer BFL. For example, the semiconductor pattern SCP can have a first region contacting a first transistor electrode TE1, a second region contacting a second transistor electrode TE2, and a channel region disposed between the first and second regions. According to an embodiment, one of the first and second regions can be a source region, and the other of the first and second regions can be a drain region.

[0150] According to the embodiments, the semiconductor pattern SCP can be made of polycrystalline silicon, amorphous silicon, oxide semiconductor, etc. The channel region of the semiconductor pattern SCP can be an undoped semiconductor pattern and can be an intrinsic semiconductor, and each of the first and second regions of the semiconductor pattern SCP can be a doped semiconductor.

[0151] The gate insulating layer GI can be disposed on the buffer layer BFL and the semiconductor pattern SCP. For example, the gate insulating layer GI can be disposed between the semiconductor pattern SCP and the gate electrode GE. The gate insulating layer GI can be disposed between the buffer layer BFL and the second power conducting layer PL2b. The gate insulating layer GI can consist of a single layer or multiple layers, and can include silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO) x N y ), aluminum nitride (AlN) x), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) or titanium oxide (TiO) x Various types of inorganic materials.

[0152] The gate electrode GE and the second power conductive layer PL2b of transistor M can be disposed on the gate insulating layer GI. The gate electrode GE and the second power conductive layer PL2b can be disposed on the same layer. For example, the gate electrode GE and the second power conductive layer PL2b can be formed simultaneously in the same process, but this disclosure is not limited thereto. The gate electrode GE can overlap with the semiconductor pattern SCP in the third direction (Z-axis direction) on the gate insulating layer GI. The second power conductive layer PL2b can overlap with the first power conductive layer PL2a in the third direction (Z-axis direction) on the gate insulating layer GI. The second power conductive layer PL2b and the first power conductive layer PL2a together can form a reference. Figure 4 The second power line PL2, etc., is described.

[0153] Each of the gate electrode GE and the second conductive layer PL2b can be formed from a single layer or multiple layers, wherein the single layer or multiple layers are made of molybdenum (Mo), copper (Cu), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), indium (In), tin (Sn), or their oxides or alloys. For example, each of the gate electrode GE and the second conductive layer PL2b can be formed from multiple layers of titanium (Ti), copper (Cu), and / or indium tin oxide (ITO) stacked sequentially or repeatedly.

[0154] The interlayer insulating layer (ILD) can be disposed on the gate electrode GE and the second power conducting layer PL2b. For example, the ILD can be disposed between the gate electrode GE and the first transistor electrode TE1 and the second transistor electrode TE2. The ILD can also be disposed between the second power conducting layer PL2b and the third power conducting layer PL2c.

[0155] Interlayer insulating layer (ILD) can consist of a single layer or multiple layers, and may include silicon oxide (SiO2) as a component. x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO) x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) or titanium oxide (TiO) x Various types of inorganic materials.

[0156] The first transistor electrode TE1, the second transistor electrode TE2, and the third conductive layer PL2c of transistor M can be disposed on the interlayer insulating layer (ILD). The first transistor electrode TE1, the second transistor electrode TE2, and the third conductive layer PL2c can be disposed on the same layer. For example, the first transistor electrode TE1, the second transistor electrode TE2, and the third conductive layer PL2c can be formed simultaneously in the same process, but this disclosure is not limited thereto.

[0157] The first transistor electrode TE1 and the second transistor electrode TE2 may overlap with the semiconductor pattern SCP in the third direction (Z-axis direction). The first transistor electrode TE1 and the second transistor electrode TE2 may be electrically connected to the semiconductor pattern SCP. For example, the first transistor electrode TE1 may be electrically connected to a first region of the semiconductor pattern SCP through a contact hole passing through the interlayer insulating layer (ILD). The first transistor electrode TE1 may also be electrically connected to the lower conductive layer (BML) through contact holes passing through the ILD and the buffer layer (BFL). The second transistor electrode TE2 may be electrically connected to a second region of the semiconductor pattern SCP through contact holes passing through the ILD. According to an embodiment, one of the first transistor electrode TE1 and the second transistor electrode TE2 may be a source electrode, and the other may be a drain electrode.

[0158] The third electrical conductive layer PL2c may overlap with the first electrical conductive layer PL2a and / or the second electrical conductive layer PL2b in the third direction (Z-axis direction). The third electrical conductive layer PL2c may be electrically connected to the first electrical conductive layer PL2a and / or the second electrical conductive layer PL2b. For example, the third electrical conductive layer PL2c may be electrically connected to the first electrical conductive layer PL2a through contact holes passing through the interlayer insulating layer ILD and the buffer layer BFL. The third electrical conductive layer PL2c may be electrically connected to the second electrical conductive layer PL2b through contact holes passing through the interlayer insulating layer ILD. The third electrical conductive layer PL2c may together with the first electrical conductive layer PL2a and / or the second electrical conductive layer PL2b form a reference. Figure 4 The second power line PL2 is described.

[0159] The first transistor electrode TE1, the second transistor electrode TE2, and the third electrical conductive layer PL2c can be formed by a single layer or multiple layers, wherein the single layer or multiple layers are made of molybdenum (Mo), copper (Cu), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), indium (In), tin (Sn), or their oxides or alloys.

[0160] A protective layer PSV can be disposed on the first transistor electrode TE1, the second transistor electrode TE2, and the third power conduction layer PL2c. The protective layer PSV can consist of a single layer or multiple layers, and can include silicon oxide (SiO2) as a component. x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO) x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) or titanium oxide (TiO) x Various types of inorganic materials.

[0161] A via layer (VIA) can be disposed on the protective PSV layer. The via layer (VIA) can be made of an organic material to planarize the underlying steps. For example, the via layer (VIA) can include organic materials such as acrylate resins, epoxy resins, phenolic resins, polyamide resins, polyimide resins, polyester resins, polyphenylene sulfide resins, or benzocyclobutene (BCB). However, this disclosure is not necessarily limited thereto, and the via layer (VIA) can include materials containing silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO) x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) or titanium oxide (TiO) x Various types of inorganic materials.

[0162] The partition wall WL can be set on the via layer VIA. The partition wall WL can be used to form a step, so that the light-emitting element LD can be easily aligned in the emission region EA.

[0163] According to embodiments, the partition wall WL can have various shapes. In one embodiment, the partition wall WL can have a shape that protrudes from the base layer BSL in a third direction (Z-axis direction). The partition wall WL can be formed with an inclined surface that is tilted at an angle relative to the base layer BSL. However, this disclosure is not necessarily limited to this, and the partition wall WL can have sidewall or stepped shapes such as curved surfaces. For example, the partition wall WL can have a cross-section such as a semicircular or semi-elliptical shape.

[0164] The separator wall WL may comprise at least one organic and / or inorganic material. For example, the separator wall WL may comprise organic materials such as acrylate resins, epoxy resins, phenolic resins, polyamide resins, polyimide resins, polyester resins, polyphenylene sulfide resins, or benzocyclobutene (BCB). However, this disclosure is not necessarily limited thereto, and the separator wall WL may comprise silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO) x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) or titanium oxide (TiO) x Various types of inorganic materials.

[0165] Electrode ALE can be disposed on the via layer VIA and the partition wall WL. Electrode ALE can at least partially cover the side surface and / or top surface of the partition wall WL. Electrode ALE disposed on the partition wall WL can have a shape corresponding to the partition wall WL. For example, electrode ALE disposed on the partition wall WL can include an inclined surface or a curved surface corresponding to the shape of the partition wall WL. The partition wall WL and electrode ALE can be reflective members that reflect light emitted from the light-emitting element LD, and can guide light in the forward direction of pixel PXL, such as in the third direction (Z-axis direction), thereby improving the light output efficiency of the display panel PXL.

[0166] Electrodes ALEs may be spaced apart from each other. Electrodes ALEs may be disposed on the same layer. For example, electrodes ALEs may be formed simultaneously in the same process, but this disclosure is not necessarily limited thereto.

[0167] Electrode ALE can receive alignment signals during the alignment step of the light-emitting element LD. Therefore, an electric field can be formed between electrodes ALE, allowing the light-emitting element LD disposed in each pixel PXL to be aligned between electrodes ALE.

[0168] Electrode ALE may include at least one conductive material. For example, electrode ALE may include metals such as silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), titanium (Ti), molybdenum (Mo), copper (Cu) and alloys thereof, conductive oxide materials such as indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), zinc tin oxide (ZTO) or gallium tin oxide (GTO), and conductive polymers such as PEDOT, but this disclosure is not necessarily limited thereto.

[0169] The first electrode ALE1 can be electrically connected to the first transistor electrode TE1 of transistor M through a contact hole passing through the via layer V1A and the protective layer PSV. The second electrode ALE2 can be electrically connected to the third power conduction layer PL2c through a contact hole passing through the via layer V1A and the protective layer PSV.

[0170] The first insulating layer INS1 can be disposed on the electrode ALE. The first insulating layer INS1 can consist of a single layer or multiple layers, and can include silicon oxide (SiO2) as a component. x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO) x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) or titanium oxide (TiO) x Inorganic materials.

[0171] The first dam BNK1 may be disposed on the first insulating layer INS1. The first dam BNK1 may include an opening that overlaps with the emitting region EA in the plan view. The opening of the first dam BNK1 may provide space in which the light-emitting element LD can be disposed during the step of providing the light-emitting element LD to each pixel PXL. For example, the desired type and / or amount of light-emitting element ink may be supplied to the space defined by the opening of the first dam BNK1.

[0172] The first layer BNK1 may include organic materials such as acrylate resins, epoxy resins, phenolic resins, polyamide resins, polyimide resins, polyester resins, polyphenylene sulfide resins, or benzocyclobutene (BCB). However, this disclosure is not necessarily limited thereto, and the first layer BNK1 may include materials containing silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO)x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) or titanium oxide (TiO) x Various types of inorganic materials.

[0173] The light-emitting element (LD) can be disposed between electrodes ALE. The LD can be biased and aligned between electrodes ALE. For example, the LD can be biased and aligned such that the first end EP1 (or the first semiconductor layer) can overlap with the first electrode ALE1 in a planar view, and the second end EP2 (or the second semiconductor layer) can overlap with the second electrode ALE2 in a planar view.

[0174] The light-emitting element (LD) can be disposed in the opening of the first dike BNK1 and between the partition walls WL. The LD can be prepared in a dispersed form in light-emitting element ink and provided to each pixel PXL by inkjet printing or the like. For example, the LD can be dispersed in a volatile solvent and provided to each pixel PXL. When an alignment signal is provided to the electrode ALE, an electric field can be formed between the electrodes ALE, allowing the LD to be aligned between them. After the LD is aligned, the solvent can be evaporated or removed by other methods to stably arrange the LD between the electrodes ALE.

[0175] A second insulating layer INS2 can be disposed on the light-emitting element LD. For example, the second insulating layer INS2 can be partially disposed on the light-emitting element LD and expose the first end EP1 and the second end EP2 of the light-emitting element LD. When the second insulating layer INS2 is formed on the light-emitting element LD after the alignment of the light-emitting element LD is completed, it can prevent the light-emitting element LD from leaving the alignment position.

[0176] The second insulating layer INS2 can be composed of a single layer or multiple layers, and can include silicon oxide (SiO2) as a component. x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO) x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) or titanium oxide (TiO) x Inorganic materials.

[0177] The connecting electrode ELT can be disposed on the first end EP1 and the second end EP2 of the light-emitting element LD exposed by the second insulating layer INS2. The first connecting electrode ELT1 can be disposed (e.g., directly disposed) on the first end EP1 of the first light-emitting element LD1 and can contact the first end EP1 of the first light-emitting element LD1 (or the first semiconductor layer 11).

[0178] The second connection electrode ELT2 can be disposed (e.g., directly disposed) on the second end EP2 (or the second semiconductor layer 13) of the first light-emitting element LD1, and can contact the second end EP2 (or the second semiconductor layer 13) of the first light-emitting element LD1. The second connection electrode ELT2 can also be disposed (e.g., directly disposed) on the first end EP1 (or the first semiconductor layer 11) of the second light-emitting element LD2, and can contact the first end EP1 (or the first semiconductor layer 11) of the second light-emitting element LD2. The second connection electrode ELT2 can electrically connect the second end EP2 (or the second semiconductor layer 13) of the first light-emitting element LD1 and the first end EP1 (or the first semiconductor layer 11) of the second light-emitting element LD2.

[0179] Similarly, the third connecting electrode ELT3 can be disposed (e.g., directly disposed) on the second end EP2 (or the second semiconductor layer 13) of the second light-emitting element LD2, and can contact the second end EP2 (or the second semiconductor layer 13) of the second light-emitting element LD2. The third connecting electrode ELT3 can be disposed (e.g., directly disposed) on the first end EP1 (or the first semiconductor layer 11) of the third light-emitting element LD3, and can contact the first end EP1 (or the first semiconductor layer 11) of the third light-emitting element LD3. The third connecting electrode ELT3 can electrically connect the second end EP2 (or the second semiconductor layer 13) of the second light-emitting element LD2 and the first end EP1 (or the first semiconductor layer 11) of the third light-emitting element LD3.

[0180] Similarly, the fourth connecting electrode ELT4 can be disposed (e.g., directly disposed) on the second end EP2 (or the second semiconductor layer 13) of the third light-emitting element LD3, and can contact the second end EP2 (or the second semiconductor layer 13) of the third light-emitting element LD3. The fourth connecting electrode ELT4 can be disposed (e.g., directly disposed) on the first end EP1 (or the first semiconductor layer 11) of the fourth light-emitting element LD4, and can contact the first end EP1 (or the first semiconductor layer 11) of the fourth light-emitting element LD4. The fourth connecting electrode ELT4 can electrically connect the second end EP2 (or the second semiconductor layer 13) of the third light-emitting element LD3 and the first end EP1 (or the first semiconductor layer 11) of the fourth light-emitting element LD4.

[0181] The fifth connecting electrode ELT5 can be disposed (e.g., directly disposed) on the second end EP2 (or the second semiconductor layer 13) of the fourth light-emitting element LD4, and can contact the second end EP2 (or the second semiconductor layer 13) of the fourth light-emitting element LD4.

[0182] The first connecting electrode ELT1 can be electrically connected to the first electrode ALE1 through a contact hole passing through the first insulating layer INS1. The fifth connecting electrode ELT5 can be electrically connected to the second electrode ALE2 through a contact hole passing through the first insulating layer INS1.

[0183] In an implementation, the connecting electrode ELT can be composed of multiple conductive layers. For example, such as Figure 7 and Figure 8 As shown, the first connecting electrode ELT1, the third connecting electrode ELT3, and the fifth connecting electrode ELT5 can be disposed on the same layer. The second connecting electrode ELT2 and the fourth connecting electrode ELT4 can be disposed on the same layer. The first connecting electrode ELT1, the third connecting electrode ELT3, and the fifth connecting electrode ELT5 can be disposed on the second insulating layer INS2. The third insulating layer INS3 can be disposed on the first connecting electrode ELT1, the third connecting electrode ELT3, and the fifth connecting electrode ELT5. The second connecting electrode ELT2 and the fourth connecting electrode ELT4 can be disposed on the third insulating layer INS3.

[0184] Thus, with the third insulating layer INS3 positioned between the connecting electrodes ELT made of different conductive layers, the connecting electrodes ELT can be stably separated by the third insulating layer INS3. Therefore, electrical stability between the first terminal EP1 and the second terminal EP2 of the light-emitting element LD can be ensured.

[0185] The third insulating layer INS3 can consist of a single layer or multiple layers, and can include silicon oxide (SiO2) as a component. x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO) x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) or titanium oxide (TiO) x Various types of inorganic materials.

[0186] In another embodiment, the connecting electrode ELT can be constructed from the same conductive layer. For example, as... Figure 9 and Figure 10As shown, the first connecting electrode ELT1, the second connecting electrode ELT2, the third connecting electrode ELT3, the fourth connecting electrode ELT4, and the fifth connecting electrode ELT5 can be disposed on the same layer. For example, the first connecting electrode ELT1, the second connecting electrode ELT2, the third connecting electrode ELT3, the fourth connecting electrode ELT4, and the fifth connecting electrode ELT5 can be formed simultaneously in the same process. In this way, when the connecting electrodes ELT are formed simultaneously, the number of masks can be reduced and the manufacturing process can be simplified.

[0187] The connecting electrode ELT can be made of a transparent conductive material. For example, the connecting electrode ELT may include at least one of indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), zinc tin oxide (ZTO), and gallium tin oxide (GTO), and can be made substantially transparent or translucent to meet a transmittance (a predetermined transmittance or a selectable transmittance). Therefore, light emitted from the first end EP1 and the second end EP2 of the light-emitting element LD can pass through the connecting electrode ELT and be emitted to the outside of the display panel PNL.

[0188] The second dike, BNK2, can be installed on top of the first dike, BNK1. The second dike, BNK2, can also be installed in the non-launch area (NEA).

[0189] The second dam BNK2 may include an opening that overlaps with the emission region EA in the plan view. The opening of the second dam BNK2 may provide space in which a color conversion layer, as described below, can be disposed. For example, a color conversion layer of the desired type and / or amount may be provided to the space defined by the opening of the second dam BNK2.

[0190] The second layer BNK2 may include organic materials such as acrylate resins, epoxy resins, phenolic resins, polyamide resins, polyimide resins, polyester resins, polyphenylene sulfide resins, or benzocyclobutene (BCB). However, this disclosure is not necessarily limited thereto, and the second layer BNK2 may include materials containing silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO) x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) or titanium oxide (TiO) x Inorganic materials.

[0191] Figure 11It is a schematic cross-sectional view of the first pixel, the second pixel, and the third pixel according to the implementation method. Figure 12 It is a schematic cross-sectional view of pixels according to the implementation method.

[0192] Figure 11 The diagram shows the color conversion layer CCL, optical layer OPL, and / or color filter layer CFL, etc. In Figure 11 For ease of description, all but the following have been omitted. Figures 7 to 10 The constituent elements are the base layer BSL and the second dam BNK2. Figure 11 The stacked structure of pixel PXL associated with color conversion layer CCL, optical layer OPL and / or color filter layer CFL is shown in detail.

[0193] Reference Figure 11 and Figure 12 The second dam BNK2 can be located between the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3, or at the boundary of the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3, and can include an opening in the planar diagram that overlaps with each of the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3. The opening of the second dam BNK2 can provide space in which the color conversion layer CCL can be located.

[0194] The color conversion layer CCL can be disposed on the light-emitting element LD in the opening of the second embankment BNK2. The color conversion layer CCL may include a first color conversion layer CCL1 disposed in the first pixel PXL1, a second color conversion layer CCL2 disposed in the second pixel PXL2, and a scattering layer LSL disposed in the third pixel PXL3.

[0195] In the implementation, the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 may be included in... Figure 1 and Figure 2 The light-emitting element LD described in the embodiment. For example, the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 may include light-emitting elements LD that emit light of the same color (e.g., a third color (or blue)). A color conversion layer CCL including color conversion particles may be provided on the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3, thereby enabling the display of a full-color image.

[0196] The first color conversion layer CCL1 may include first color conversion particles that convert light of a third color emitted from the light-emitting element LD into light of a first color. For example, the first color conversion layer CCL1 may include a plurality of first quantum dots QD1 dispersed in a matrix material such as a base resin.

[0197] In one embodiment, when the light-emitting element LD is a blue light-emitting element that emits blue light and the first pixel PXL1 is a red pixel, the first color conversion layer CCL1 may include a first quantum dot QD1 that converts blue light emitted by the blue light-emitting element into red light. The first quantum dot QD1 may absorb blue light to change its wavelength according to energy conversion, thereby emitting red light. When the first pixel PXL1 is a pixel of a different color, the first color conversion layer CCL1 may include a first quantum dot QD1 corresponding to the color of the first pixel PXL1.

[0198] The second color conversion layer CCL2 may include second color conversion particles that convert light of a third color emitted from the light-emitting element LD into light of a second color. For example, the second color conversion layer CCL2 may include a plurality of second quantum dots QD2 dispersed in a matrix material such as a base resin.

[0199] In one embodiment, when the light-emitting element LD is a blue light-emitting element that emits blue light and the second pixel PXL2 is a green pixel, the second color conversion layer CCL2 may include a second quantum dot QD2 that converts the blue light emitted by the blue light-emitting element into green light. The second quantum dot QD2 can absorb blue light to change its wavelength according to energy conversion, thereby emitting green light. When the second pixel PXL2 is a pixel of a different color, the second color conversion layer CCL2 may include a second quantum dot QD2 corresponding to the color of the second pixel PXL2.

[0200] In this embodiment, the absorption coefficients of the first quantum dot QD1 and the second quantum dot QD2 can be increased by introducing blue light with a relatively short wavelength in the visible light range into the first quantum dot QD1 and the second quantum dot QD2. Therefore, the light efficiency emitted from the first pixel PXL1 and the second pixel PXL2 can be improved, ultimately ensuring excellent color reproduction. The light-emitting units (EMUs) of the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3 can include light-emitting elements (LDs) of the same color (e.g., blue light-emitting elements), thereby improving the manufacturing efficiency of the display device.

[0201] A scattering layer LSL can be provided to effectively utilize a third color (or blue) light emitted from a light-emitting element (LD). For example, in the case where the LD is a blue light-emitting element that emits blue light and the third pixel PXL3 is a blue pixel, the scattering layer LSL may include at least one type of scatterer SCT to effectively utilize the light emitted from the LD. For example, the scatterer SCT of the scattering layer LSL may include at least one of barium sulfate (BaSO4), calcium carbonate (CaCO3), titanium dioxide (TiO2), silicon dioxide (SiO2), aluminum oxide (Al2O3), zirconium oxide (ZrO2), and zinc oxide (ZnO). The scatterer SCT may be disposed in the third pixel PXL3, or optionally included in the first color conversion layer CCL1 or the second color conversion layer CCL2. According to an embodiment, the scattering layer LSL made of a transparent polymer can be provided by omitting the scatterer SCT.

[0202] The first overlay layer CPL1 can be set on the color conversion layer CCL. The first overlay layer CPL1 can be set across the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3. The first overlay layer CPL1 can cover the color conversion layer CCL. The first overlay layer CPL1 can prevent impurities such as moisture or air from seeping in from the outside and damaging or contaminating the color conversion layer CCL.

[0203] The first capping layer CPL1 can be an inorganic layer, and can be made of silicon nitride (SiN). x ), aluminum nitride (AlN) x ), titanium nitride (TiN) x ), silicon oxide (SiO) x ), aluminum oxide (AlO) x ), titanium oxide (TiO) x ), silicon carbide (SiO) x C y ), silicon nitride oxide (SiO) x N y Made from (etc.)

[0204] An optical layer OPL can be disposed on the first cover layer CPL1. The optical layer OPL can be used to improve light extraction efficiency by recycling light provided from the color conversion layer CCL through total internal reflection. For this purpose, the optical layer OPL can have a relatively lower refractive index than the color conversion layer CCL. For example, the refractive index of the color conversion layer CCL can be in the range of about 1.6 to about 2.0, and the refractive index of the optical layer OPL can be in the range of about 1.1 to about 1.3.

[0205] The second cover layer CPL2 can be disposed on the optical layer OPL. The second cover layer CPL2 can be disposed over the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3. The second cover layer CPL2 can cover the optical layer OPL. The second cover layer CPL2 can prevent impurities such as moisture or air from seeping in from the outside and damaging or contaminating the optical layer OPL.

[0206] The second capping layer CPL2 can be an inorganic layer, and can be made of silicon nitride (SiN). x ), aluminum nitride (AlN) x ), titanium nitride (TiN) x ), silicon oxide (SiO) x ), aluminum oxide (AlO) x ), titanium oxide (TiO) x ), silicon carbide (SiO) x C y ), silicon nitride oxide (SiO) x N y Made from (etc.)

[0207] The planarization layer PLL can be set on the second overlay layer CPL2. The planarization layer PLL can be set across the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3.

[0208] The planarization layer PLL may comprise organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, polyester resin, polyphenylene sulfide resin, or benzocyclobutene (BCB). However, this disclosure is not necessarily limited thereto, and the planarization layer PLL may comprise silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO) x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) or titanium oxide (TiO) x Various types of inorganic materials.

[0209] A color filter layer (CFL) can be set on a planarization layer (PLL). The CFL can include color filters CF1, CF2, and CF3 corresponding to the color of each pixel PXL. A full-color image can be displayed by setting color filters CF1, CF2, and CF3 corresponding to the colors of the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3, respectively.

[0210] The color filter layer CFL may include: a first color filter CF1 disposed in a first pixel PXL1 and selectively transmitting light emitted from the first pixel PXL1; a second color filter CF2 disposed in a second pixel PXL2 and selectively transmitting light emitted from the second pixel PXL2; and a third color filter CF3 disposed in a third pixel PXL3 and selectively transmitting light emitted from the third pixel PXL3.

[0211] In an embodiment, the first color filter CF1, the second color filter CF2, and the third color filter CF3 can be a red color filter, a green color filter, and a blue color filter, respectively, but this disclosure is not necessarily limited to this. In the following text, the term "color filter CF" or "multiple color filters CF" may refer to any one of the first color filter CF1, the second color filter CF2, and the third color filter CF3, or may collectively refer to two or more types of color filters.

[0212] The first color filter CF1 may overlap with the first color conversion layer CCL1 in the third direction (Z-axis direction). The first color filter CF1 may include a color filter material that selectively transmits light of a first color (or red). For example, if the first pixel PXL1 is a red pixel, the first color filter CF1 may include a red color filter material.

[0213] The second color filter CF2 may overlap with the second color conversion layer CCL2 in the third direction (Z-axis direction). The second color filter CF2 may include a color filter material that selectively transmits light of a second color (or green). For example, if the second pixel PXL2 is a green pixel, the second color filter CF2 may include a green color filter material.

[0214] The third color filter CF3 can overlap with the scattering layer LSL in the third direction (Z-axis direction). The third color filter CF3 can include a color filter material that selectively transmits a third color (or blue) of light. For example, if the third pixel PXL3 is a blue pixel, the third color filter CF3 can include a blue color filter material.

[0215] According to an embodiment, the light-blocking layer BM can be further disposed between the first color filter CF1, the second color filter CF2, and the third color filter CF3. Thus, with the light-blocking layer BM formed between the first color filter CF1, the second color filter CF2, and the third color filter CF3, color mixing defects visible from the front or side surface of the display device can be prevented. The material of the light-blocking layer BM is not particularly limited and can include various light-blocking materials. For example, the light-blocking layer BM can be implemented by stacking the first color filter CF1, the second color filter CF2, and the third color filter CF3.

[0216] An outer coating OC can be applied to the color filter layer CFL. The outer coating OC can be applied across the first pixel PXL1, the second pixel PXL2, and the third pixel PXL3. The outer coating OC can cover the lower component including the color filter layer CFL. The outer coating OC can prevent moisture or air from penetrating the lower component. The outer coating OC can protect the lower component from foreign substances such as dust.

[0217] The outer coating OC may include organic materials such as acrylic resins, epoxy resins, phenolic resins, polyamide resins, polyimide resins, polyester resins, polyphenylene sulfide resins, or benzocyclobutene (BCB). However, this disclosure is not necessarily limited thereto, and the outer coating OC may include silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon nitride oxide (SiO) x N y ), aluminum nitride (AlN) x ), aluminum oxide (AlO) x ), zirconium oxide (ZrO x ), hafnium oxide (HfO) x ) or titanium oxide (TiO) x Various types of inorganic materials.

[0218] The above description is an example of the technical features of this disclosure, and those skilled in the art will be able to make various modifications and variations. Therefore, the embodiments of this disclosure described above can be implemented individually or in combination with each other.

[0219] Therefore, the embodiments disclosed herein are not intended to limit the technical spirit of this disclosure, but rather to describe it, and the scope of the technical spirit of this disclosure is not limited by these embodiments. The scope of protection of this disclosure should be interpreted by the appended claims, and should be construed as including all technical spirit within the equivalent scope within the scope of this disclosure.

Claims

1. A display device, characterized in that, include: The first electrode and the second electrode are spaced apart from each other; as well as A light-emitting element is disposed between the first electrode and the second electrode, wherein, Each of the light-emitting elements includes: First semiconductor layer; A second semiconductor layer is disposed on the first semiconductor layer; and An active layer is disposed between the first semiconductor layer and the second semiconductor layer. Each of the light-emitting elements operates at 0.5 A / cm. 2 Up to 100A / cm 2 At current densities within the specified range, light with wavelengths in the range of 464 nm to 468 nm is emitted, and Each of the light-emitting elements has a maximum external quantum efficiency of 15% or higher.

2. The display device according to claim 1, characterized in that, The thickness of the active layer is in the range of 1.0 nm to 2.8 nm.

3. The display device according to claim 1, characterized in that, The length of the light-emitting element is less than or equal to 50 μm.

4. The display device according to claim 1, characterized in that, The first electrode overlaps with the first semiconductor layer in the planar view. The second electrode overlaps with the second semiconductor layer in the plan view. The display device further includes a first connection electrode and a second connection electrode disposed on the light-emitting element. The first connecting electrode is electrically connected to the first semiconductor layer. The second connecting electrode is electrically connected to the second semiconductor layer. The first connecting electrode is electrically connected to the first electrode, and The second connecting electrode is electrically connected to the second electrode.

5. The display device according to claim 1, characterized in that, Also includes: A color conversion layer is disposed on the light-emitting element, wherein... The color conversion layer includes a first color conversion layer, a second color conversion layer, and a scattering layer. The first color conversion layer includes a first quantum dot. The second color conversion layer includes a second quantum dot. The scattering layer includes a scatterer. The display device further includes a color filter layer disposed on the color conversion layer. The color filter layer includes a first color filter that overlaps with the first color conversion layer in the planar view, a second color filter that overlaps with the second color conversion layer in the planar view, and a third color filter that overlaps with the scattering layer in the planar view. The display device further includes a light-blocking layer disposed between the first color filter, the second color filter, and the third color filter.

6. A light-emitting element, characterized in that, include: First semiconductor layer; A second semiconductor layer is disposed on the first semiconductor layer; as well as An active layer is disposed between the first semiconductor layer and the second semiconductor layer, wherein, The light-emitting element operates at 0.5 A / cm. 2 Up to 100A / cm 2 At current densities within the specified range, light with wavelengths in the range of 464 nm to 468 nm is emitted, and The light-emitting element has a maximum external quantum efficiency of 15% or higher.

7. The light-emitting element according to claim 6, characterized in that, The thickness of the active layer is in the range of 1.0 nm to 2.8 nm.

8. The light-emitting element according to claim 6, characterized in that, Also includes: An electrode layer is disposed on the first semiconductor layer, and An insulating film surrounds the first semiconductor layer, the active layer, and the second semiconductor layer.

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