DC / DC voltage reduction module with dual-channel output and wide voltage

Abstract

The utility model relates to the technical field of step-down modules, and discloses a DC / DC step-down module with double-channel output and wide voltage, which comprises a power supply input pin VIN and a power supply output pin VOUT, adopts peak current mode control, can realize good current sharing during parallel application, is favorable for balancing heat loss on different paths, and improves the service life of the DC / DC step-down module. During parallel connection, the connection line distance of parallel channels should be reduced as much as possible so as to ensure that the current error of each parallel channel is within 10%, and since the two channels are connected in parallel, the voltage regulating resistance calculation formula is different according to different connection methods and different values, and specifically, the output voltage is set. If more than two paths of multiple paths are connected in parallel, in order to reduce output ripples, the phase difference of the action of each path of switch can be adjusted through the cooperative use of MODEPLLIN, CLKOUT and PHASMD, so that the current ripples on an input bus are reduced by staggering the phases of each channel, and the stability and reliability of the power supply are improved.

Description

Technical Field

[0001] This utility model relates to the field of step-down module technology, and more specifically, to a dual-channel output, wide-voltage DC / DC step-down module. Background Technology

[0002] In modern electronic devices, high-performance digital circuits such as FPGAs and DSPs have very high requirements for the stability and reliability of power supplies. Traditional single-phase DC / DC converters often suffer from problems such as low efficiency and poor heat dissipation when outputting high current. Utility Model Content

[0003] To address the problems mentioned in the background section, this invention provides a dual-channel output, wide-voltage DC / DC step-down module.

[0004] This utility model provides a dual-channel output, wide-voltage DC / DC step-down module, employing the following technical solution: A dual-channel output, wide-voltage DC / DC step-down module, comprising: a power input pin V IN , power output pin V OUT Grounding pin GND, Output voltage detection pin V OUTS Signal ground pin SGND, inverting input pin V of error amplifier FB Soft start and tracking pin TRACK, compensation network pin COMP, differential amplifier output pin DIFFOUT, mode selection and phase-locked loop input pin MODE_PLLIN, enable pin RUN, phase modulation pin PHASMD, clock output pin CLKOUT, open drain pin PGOOD, internal 5V regulator output INTVCC, external voltage regulator pin EXTVCC, temperature detection pin TEMP;

[0005] The power input pin V IN The power output pin V is connected to the ground pin GND via a decoupling capacitor. OUT Through decoupling capacitor C OUT The grounding pin GND is connected to ground; the mode selection and phase-locked loop input pin MODE_PLLIN is connected to the signal ground pin SGND; the soft-start and tracking pin TRACK is connected to a capacitor to set the soft-start time; the phase modulation pin PHASMD is connected to the signal ground pin SGND; and the inverting input pin V of the error amplifier is connected to ground. FB Through resistor R FB Connect to the ground pin GND to determine the output voltage. When used in parallel, the V of all modules... FBThe pins need to be connected together. The COMP pin of the compensation network is used to set the current control threshold and the compensation of the error amplifier. When used in parallel, the COMP pins of all modules need to be connected together. The DIFFOUT pin of the differential amplifier is connected to the V output voltage detection pin. OUTS Connections: The internal 5V regulator output INTVCC ceramic capacitor is decoupled to GND; the external voltage regulator pin EXTVCC is left floating; the output voltage detection pin V... OUTS Connect to the differential amplifier output pin DIFFOUT.

[0006] Preferably, it includes a frequency setting pin f set Frequency setting pin f set Used to set the operating frequency of the converter.

[0007] Preferably, the module includes an enable pin RUN, and when the voltage of the enable pin RUN is greater than 1.5V, the corresponding channel of the module starts to work.

[0008] Preferably, the power input pin V IN Ground pin GND, power output pin V OUT All are laid with copper cladding.

[0009] Preferably, the soft-start and tracking pin TRACK is connected to a resistor.

[0010] Preferably, the circuit includes a clock output pin CLKOUT, a switching node pin SW, a remote sampling amplifier integer input pin DIFFP, a differential amplifier negative input pin DIFFN, an open-drain pin PGOOD connected to the remote sampling points of the output voltage and ground, a temperature detection pin TEMP, a floating clock output pin CLKOUT, a switching node pin SW connected to an external MOSFET, a differential amplifier negative input pin DIFFN and a remote sampling amplifier integer input pin DIFFP connected to the remote sampling points of the output voltage and ground respectively, an open-drain pin PGOOD connected to the dual-channel output voltage, and a temperature detection pin TEMP connected to a resistor.

[0011] Preferably, the power input pin V IN Ground pin GND, power output pin V OUT All are laid with copper cladding.

[0012] By adopting the above technical solution,

[0013] In summary, this utility model has the following beneficial technical effects:

[0014] 1. This utility model adopts peak current mode control, which can achieve good current sharing in parallel applications, and is beneficial to balancing heat loss on different paths. When paralleling, the connection distance of the parallel channels should be minimized to ensure that the current error of each parallel channel is within 10%. Since two channels are connected in parallel, the calculation formula for the voltage regulating resistor varies depending on the connection method; see the output voltage setting for details. If more than two channels are connected in parallel, in order to reduce output ripple, MODE_PLLIN, CLKOUT, and PHASMD can be used in combination to adjust the phase difference of the switching action of each channel, thereby staggering the phase of each channel and reducing the current ripple on the input bus, improving the stability and reliability of the power supply.

[0015] 2. Power input pin V IN Ground pin GND, power output pin V OUT All components are laid with copper plating to achieve good heat dissipation. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of a single-channel 1.0V and 1.5V load 13A structure in an embodiment of this utility model;

[0017] Figure 2 This is a functional structure diagram of an embodiment of the present utility model;

[0018] Figure 3 This is a schematic diagram of the output structure in this embodiment of the utility model;

[0019] Figure 4 This is a schematic diagram of any VOUTS connected to the output structure in an embodiment of this utility model;

[0020] Figure 5 This is a schematic diagram of the parallel remote sampling operational amplifier structure in an embodiment of this utility model;

[0021] Figure 6 This is a schematic diagram of the PGOOD power-on timing control structure in an embodiment of this utility model;

[0022] Figure 7 This is a schematic diagram comparing the efficiency of burst mode and forced continuous mode in an embodiment of this utility model;

[0023] Figure 8 This is a schematic diagram of the forward voltage of the temperature control diode as a function of temperature in an embodiment of this utility model.

[0024] Figure 9 This is a schematic diagram of the two-channel parallel working structure in an embodiment of this utility model;

[0025] Figure 10This is a schematic diagram of the connection structure of MODE_PLLIN, CLKOUT and PHASMD in the multi-channel parallel connection of this utility model embodiment;

[0026] Figure 11 This is a schematic diagram of the two-way switching regulator using the tracking function in an embodiment of this utility model;

[0027] Figure 12 This is a schematic diagram of the two-channel startup waveform structure when using the TRACK tracking function in an embodiment of this utility model;

[0028] Figure 13 This is a schematic diagram of the dual-channel parallel output 1V load 26A structure in an embodiment of this utility model;

[0029] Figure 14 This is a schematic diagram of the dual-channel parallel output 5V load 26A structure in this utility model embodiment;

[0030] Figure 15 This is a schematic diagram of the structure of two chips with three parallel outputs of 1V load 39A in an embodiment of this utility model. Detailed Implementation

[0031] The following is combined with Figure 1-15 The present invention will be described in further detail below.

[0032] It should be noted that the accompanying drawings are schematic and not to scale. For clarity and convenience, the relative dimensions and proportions of the parts shown are exaggerated or reduced in size; all dimensions are merely illustrative and not limiting. Furthermore, the same reference numerals are used for the same structures, elements, or fittings appearing in more than two drawings to indicate similar features.

[0033] This utility model discloses a dual-channel output, wide-voltage DC / DC step-down module. (Refer to...) Figure 1-14 A dual-channel output, wide-voltage DC / DC step-down module.

[0034] It can achieve a continuous output current of up to 13A within a wide input voltage range of 4.5V to 16V, has excellent load regulation and voltage regulation, and can be used in multi-phase parallel connection to provide up to 26A continuously.

[0035] The module uses LGA and BGA packages and is assembled on the PCB board using reflow soldering. The circuit features small size, high integration, and light weight. The power input pin V... IN Ground pin GND, power output pin V OUT All are laid with copper plating to achieve good heat dissipation;

[0036] Power input pin V IN , power output pin V OUT Grounding pin GND, Output voltage detection pin V OUTS Signal ground pin SGND, inverting input pin V of error amplifier FB Soft-start and tracking pin TRACK, compensation network pin COMP, differential amplifier output pin DIFFOUT, mode selection and PLL input pin MODE_PLLIN, enable pin RUN, phase modulation pin PHASMD, clock output pin CLKOUT, open-drain pin PGOOD, internal 5V regulator output INTVCC, external voltage regulator pin EXTVCC, clock output pin CLKOUT, switching node pin SW, remote sampling amplifier rectifier input pin DIFFP, differential amplifier negative input pin DIFFN, open-drain pin PGOOD, temperature detection pin TEMP, frequency setting pin f set ;

[0037] The power input pin V IN The power output pin V is connected to the ground pin GND via a decoupling capacitor. OUT Through decoupling capacitor C OUT The grounding pin GND is connected to ground, and the mode selection and phase-locked loop input pin MODE_PLLIN is connected to the signal ground pin SGND.

[0038] like Figure 7 When the MODE_PLLIN pin is grounded, the module operates in forced continuous mode, meaning the switching transistor and freewheeling transistor still turn on and off in each cycle, even under no-load conditions. When MODE_PLLIN is connected to INTVcc or left floating, the module enters burst mode. This means that when the load is light, the PWM controller periodically turns off some switching cycles, reducing the switching and conduction losses of the switching transistor and freewheeling transistor, thus improving the module's light-load efficiency. When MODE_PLLIN is set to burst mode, as the load increases, the module automatically switches from burst mode to forced continuous mode. Because burst mode periodically transfers energy to the output, it can result in larger output ripple.

[0039] The module also has an external synchronization function. MODE_PLLIN is also the input pin for the external synchronization signal. If the user needs to control the switching frequency and phase of the module through an external clock, an external clock can be connected to MODE_PLLIN. The external synchronization frequency range is 250kHz to 850kHz.

[0040] The soft-start and tracking pin TRACK is connected to a capacitor to set the soft-start time.

[0041] The soft-start function can be implemented by adding a soft-start capacitor to ground on the TRACK pin. The soft-start time is related to the capacitance value of the soft-start capacitor, as shown in the formula:

[0042]

[0043] When operating in single-channel mode, the soft-start capacitor value should be greater than or equal to 0.01uF, with a typical recommended value of 0.1uF. When two channels are connected in parallel, the soft-start capacitor value should be doubled accordingly.

[0044] like Figure 11 , 12 The soft-start and tracking pin TRACK is connected to a resistor, enabling output voltage tracking. External settings allow one output to track the rise or fall of another regulator. Tracking is achieved by setting different resistance values ​​for the external resistor divider of the master regulator and the feedback resistor divider of the slave regulator. The module uses an internal 60.4kΩ precision resistor as the upper voltage divider resistor in the feedback divider.

[0045] The phase modulation pin PHASMD is connected to the signal ground pin SGND and the inverting input pin V of the error amplifier. FB Through resistor R FB Connect to the ground pin GND to determine the output voltage. When used in parallel, the V of all modules... FB The pins need to be connected together. The COMP pin of the compensation network is used to set the current control threshold and the compensation of the error amplifier. When used in parallel, the COMP pins of all modules need to be connected together. The DIFFOUT pin of the differential amplifier is connected to the V output voltage detection pin. OUTS Connections: The internal 5V regulator output INTVCC ceramic capacitor is decoupled to GND; the external voltage regulator pin EXTVCC is left floating; the output voltage detection pin V... OUTS Connect to the differential amplifier output pin DIFFOUT;

[0046] Frequency setting pin f set Used to set the converter's operating frequency; select an appropriate external resistor or capacitor based on the required frequency. set The pin contains an internal 4.5uA current source. This current source flows through an external resistor to form a voltage, which determines the frequency. The calculation formula is as follows:

[0047] RSET=0.154;Ω*;Hzf+53.8kΩ

[0048] f is in kHz, when fse t When connected to INTVCC or left floating, the highest frequency reaches approximately 800kHz.

[0049] The RUN enable pin is used to control the activation of the two switch-mode DC / DC converters in the module. When each enable pin is below 1.1V, the module will be in a low quiescent current state. At least 1.5V must be applied to the enable pins to activate the two switch-mode DC / DC converters in the module. This pin can be used for power-on sequencing of different channels.

[0050] The clock output pin CLKOUT is left floating, the switch node pin SW is connected to an external MOSFET, and the negative input pin DIFFN of the differential amplifier and the integer input pin DIFFP of the remote sampling amplifier are connected to the remote sampling points of the output voltage and ground, respectively.

[0051] like Figure 6 The open-drain pin PGOOD is connected to the dual-channel output voltage. This pin can monitor variations within ±10% of the normal setpoint. As shown in the diagram, controlling the RUN and PGOOD pins respectively enables timing functions for dual-output applications. After the PGOOD signal on the 1.0V output goes high, the 1.2V output starts. This function can be used in systems requiring voltage timing between the core and auxiliary power supplies. It's important to note that PGOOD itself does not output voltage; it needs to be pulled high via a resistor. The pull-up resistor for PGOOD is 10kΩ, and the pull-up level is connected to INTVcc.

[0052] like Figure 8 The module has a temperature detection function. The temperature detection pin TEMP is connected to a built-in diode for internal temperature monitoring. The anode of the diode is connected to the TEMP pin, and the cathode is grounded. When the user is using it, the TEMP pin is connected to a high level through a pull-up resistor. The forward current flowing through the temperature control diode is required to be around 100uA. At this time, the forward voltage of the diode changes with temperature.

[0053] When the current flowing through TEMP is 100uA, according to the measured curve, when T A At -55℃, V TEMP =0.676V, when T A At +125℃, V TEMP =0.260V, the slope of the TEMP voltage change with temperature is calculated to be -2.3mV / ℃. Taking the TEMP voltage of 0.55V at 5℃ as the reference value, the calculation formula is:

[0054]

[0055] Its output voltage is as follows:

[0056] Single-channel (13A) standalone operation applicable: in V FB Add a resistor R between the pin and GND FBThis allows the output voltage VOUT value to be set. OUT With R FB The relationship is:

[0057]

[0058] When modules are used in parallel, if the output voltage is low and the load current is high, a remote sampling operational amplifier can be used to compensate for voltage loss on the output lines. The output voltage setting resistor R varies depending on the external connection method. FB The selected values ​​also differ. Below, we take two channels connected in parallel, V... OUT =1V as an example;

[0059] Reference Figure 3 When the V of each channel OUTS When all are connected to the output, the voltage regulating resistor V OUTS The single-channel configuration resistor needs to be divided by the number of parallel channels;

[0060] Two channels (26A) working in parallel (all V) OUTS (All connected to output) Applicable

[0061]

[0062] V of any channel OUTS Output connected: When any channel's V is selected OUTS When receiving the output, other V OUTS Floating, voltage regulating resistor V OUTS The resistor configuration is the same as when operating in single-channel mode.

[0063] like Figure 4 Two channels (26A) operate in parallel (only one V channel) OUTS1 Received from the output, another V OUTS2 (Suspended) Applicable

[0064] When connected in parallel, a remote sampling operational amplifier is used, and the V signal of any channel is selected. OUTS Connect to the DIFFOUT output of the remote sampling operational amplifier, and other V OUTS Floating, voltage regulating resistor R FB The resistor configuration is the same as when operating in single-channel mode;

[0065] like Figure 5 Two channels (26A) operate in parallel (only one V channel) OUTS2 Received DIFFOUT, another V OUTS1 (Suspended) Applicable

[0066] The module's input capacitors must be connected to a low AC impedance DC source. External input ceramic capacitors of ≥22μF × 4 are recommended. Other values ​​can be used instead, as long as the total capacitance is sufficient. For a buck converter, the switching duty cycle can be estimated as: D = V OUT / V IN The RMS current of the input capacitor can be estimated as:

[0067]

[0068] η% is the module conversion efficiency;

[0069] like Figure 9 , 10 The module employs peak current mode control, enabling good current sharing in parallel applications. This helps balance heat loss across different paths. When connected in parallel, the connection distance between parallel channels should be minimized to ensure that the current error of each parallel channel is within 10%. Since two channels are connected in parallel, the calculation formula for the voltage regulating resistor varies depending on the connection method; see the output voltage setting for details. If more than two channels are connected in parallel, to reduce output ripple, MODE_PLLIN, CLKOUT, and PHASMD can be used in combination to adjust the phase difference of each switch action, thereby staggering the phase of each channel and reducing current ripple on the input bus.

[0070] Finally, the following points should be noted: First, in the description of this utility model, it should be noted that, unless otherwise specified and limited, the terms "installation", "connection" and "connection" should be interpreted broadly, and can be mechanical connection or electrical connection, or internal connection between two components, or direct connection. "Up", "down", "left", "right", etc. are only used to indicate relative positional relationship. When the absolute position of the described object changes, the relative positional relationship may change.

[0071] Secondly: The accompanying drawings of the embodiments disclosed in this utility model only involve the structures involved in the embodiments disclosed in this utility model. Other structures can refer to the general design. In the absence of conflict, the same embodiment and different embodiments of this utility model can be combined with each other.

[0072] Finally: The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A dual-channel output, wide-voltage DC / DC step-down module, characterized in that, include: Power input pin V IN Power output pin V OUT Grounding pin GND, Output voltage detection pin V OUTS Signal ground pin SGND, inverting input pin V of error amplifier FB Soft start and tracking pin TRACK, compensation network pin COMP, differential amplifier output pin DIFFOUT, mode selection and phase-locked loop input pin MODE_PLLIN, enable pin RUN, phase modulation pin PHASMD, clock output pin CLKOUT, open drain pin PGOOD, internal 5V regulator output INTVCC, external voltage regulator pin EXTVCC, temperature detection pin TEMP; The power input pin V IN The power output pin V is connected to the ground pin GND via a decoupling capacitor. OUT Through decoupling capacitor C OUT The grounding pin GND is connected to ground; the mode selection and phase-locked loop input pin MODE_PLLIN is connected to the signal ground pin SGND; the soft-start and tracking pin TRACK is connected to a capacitor to set the soft-start time; the phase modulation pin PHASMD is connected to the signal ground pin SGND; and the inverting input pin V of the error amplifier is connected to ground. FB Through resistor R FB Connect to the ground pin GND to determine the output voltage; when used in parallel, the V of all modules... FB The pins need to be connected together. The COMP pin of the compensation network is used to set the current control threshold and the compensation of the error amplifier. When used in parallel, the COMP pins of all modules need to be connected together. The DIFFOUT pin of the differential amplifier is connected to the V output voltage detection pin. OUTS Connections: The internal 5V regulator output INTVCC ceramic capacitor is decoupled to GND; the external voltage regulator pin EXTVCC is left floating; the output voltage detection pin V... OUTS Connect to the differential amplifier output pin DIFFOUT.

2. The dual-channel output, wide-voltage DC / DC step-down module according to claim 1, characterized in that: Including frequency setting pin f set Frequency setting pin f set Used to set the operating frequency of the converter.

3. The dual-channel output, wide-voltage DC / DC step-down module according to claim 1, characterized in that: This includes the enable pin RUN. When the voltage of the enable pin RUN is greater than 1.5V, the corresponding channel of the module starts to work.

4. The dual-channel output, wide-voltage DC / DC step-down module according to claim 1, characterized in that: The soft-start and trace pin TRACK is connected to a resistor.

5. A dual-channel output, wide-voltage DC / DC step-down module according to claim 1, characterized in that: The circuit includes a clock output pin CLKOUT, a switching node pin SW, a remote sampling amplifier integer input pin DIFFP, a differential amplifier negative input pin DIFFN, an open-drain pin PGOOD, and a temperature detection pin TEMP. The clock output pin CLKOUT is left floating. The switching node pin SW is connected to an external MOSFET. The differential amplifier negative input pin DIFFN and the remote sampling amplifier integer input pin DIFFP are respectively connected to the remote sampling points of the output voltage and ground. The open-drain pin PGOOD is connected to the dual-channel output voltage. The temperature detection pin TEMP is connected to a resistor.

6. The dual-channel output, wide-voltage DC / DC step-down module according to claim 1, characterized in that: The power input pin V IN Ground pin GND, power output pin V OUT All are laid with copper cladding.

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