Fluorescence signal detection circuit of fluorescence detector

By introducing detection circuit modules and power supply circuit modules into the fluorescence detector, the problems of high processor cost and slow speed are solved, and efficient and low-cost fluorescence signal detection is achieved.

CN223502837UActive Publication Date: 2025-10-31潘邦彦
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Patent Information

Application Number
CN202423036495.1
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-10
Publication Date
2025-10-31
Estimated Expiration
2034-12-10

AI Technical Summary

Technical Problem

In existing fluorescence detectors, the processors are expensive and have limited processing speed, resulting in delayed detection results.

Method used

The system employs a detection circuit module and a power supply circuit module, including LEDs, a current-to-voltage conversion module, a peak detection module, and a filtering module. The power chip module enables a single-power-to-dual-power-to-boost voltage conversion, reducing costs and improving detection efficiency.

Benefits of technology

It reduces the cost of the detection circuit, improves the detection efficiency, and can detect weak light sources and filter out high-frequency interference signals to meet detection requirements.

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Abstract

The utility model relates to a fluorescence signal detection circuit of a fluorescence detector, which comprises a detection circuit module and a power supply circuit module, and the detection circuit module comprises a light emitting diode, a current and voltage conversion module, a peak value detection module and a filtering module. The peak value detection module comprises a resistor R7, a third amplifier U4A, a diode D3, a fourth amplifier U4B, a capacitor C15, a resistor R11, a diode D5 and a resistor R15, the power supply circuit module comprises a power supply input module, a power supply chip module and a power supply output module, and the power supply chip module meets the power supply requirement of the detection circuit module. A weaker light source can be detected by adjusting the voltage amplification factor through an adjustable resistor R14 of a current-voltage conversion module of the detection circuit module, and meanwhile, through a peak detection module, the cost of the detection circuit is reduced, the detection efficiency is improved, and the detection accuracy is improved. The problem of detection result lag easily caused by high processor cost and limited processing speed is solved.
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Description

Technical Field

[0001] This invention relates to the field of fluorescence detection equipment technology, specifically a fluorescence signal detection circuit for a fluorescence detector. Background Technology

[0002] In modern scientific research and numerous practical applications, the demand for precise detection of biological samples and chemical substances is increasing. As a result, isothermal fluorescence detectors have gradually emerged. Through their built-in advanced isothermal control system, they can precisely maintain the detection environment at a stable temperature, ensuring that fluorescent substances emit light under relatively constant conditions. Detection circuits and sensors can also operate stably. Traditional isothermal fluorescence detectors mostly lack the ability to detect the intensity of the fluorescence light source signal. Because they cannot accurately grasp the intensity of the excitation light source, it is difficult to accurately measure its impact on fluorescence and thus impossible to determine the detection accuracy of the substance.

[0003] However, the existing technology CN211741077U discloses a fluorescence detection circuit and fluorescence detection device, which detects the intensity of fluorescence through an AD converter and a processor. However, the AD converter and processor are expensive and have limited processing speed, which can easily lead to delayed detection results. Utility Model Content

[0004] The technical problem to be solved by this utility model is that the high cost and limited processing speed of the processor can easily lead to a lag in the detection results.

[0005] To solve the above technical problems, this utility model provides the following technical solution: a fluorescence signal detection circuit for a fluorescence detector, which includes a detection circuit module and a power supply circuit module. The detection circuit module is used to detect the intensity of the fluorescence signal, and the power supply circuit module is used to convert the single power supply of the detection circuit module to a dual power supply boost power supply.

[0006] The detection circuit module includes a light-emitting diode (LED), a current-to-voltage conversion module, a peak detection module, and a filtering module. The anode of the LED is grounded, the cathode of the LED is connected to the input terminal of the current-to-voltage conversion module, the output terminal of the current-to-voltage conversion module is connected to the input terminal of the peak detection module, one end of a P1 sensor is connected between the output terminal of the current-to-voltage conversion module and the input terminal of the peak detection module, the other end of the P1 sensor is grounded, the output terminal of the peak detection module is connected to the input terminal of the filtering module, the output terminal of the filtering module is connected to the input terminal of a P2 sensor, and the output terminal of the P2 sensor is grounded.

[0007] Preferably, the current-to-voltage conversion module includes a first amplifier U3A, a resistor R12, a capacitor C18, a second amplifier U3B, a resistor R8, a resistor R13, and an adjustable resistor R14. The non-inverting input terminal of the first amplifier U3A is grounded, the inverting input terminal of the first amplifier U3A is connected to the cathode of a light-emitting diode, the output terminal of the first amplifier U3A is connected to the non-inverting input terminal of the second amplifier U3B, the inverting input terminal and the output terminal of the first amplifier U3A are connected in parallel with a resistor R12 and a capacitor C18, respectively, and the inverting input terminal of the first amplifier U3B is connected to one end of a resistor R8 through a resistor R13 and an adjustable resistor R14, and the other end of the resistor R8 is grounded.

[0008] Preferably, the peak detection module includes a resistor R7, a third amplifier U4A, a diode D3, a fourth amplifier U4B, a capacitor C15, a resistor R11, a diode D5, and a resistor R15. The output terminal of the resistor R7 is connected to the non-inverting input terminal of the third amplifier U4A. The output terminal of the third amplifier U4A is connected to the non-inverting input terminal of the fourth amplifier U4B through the diode D3. The inverting input terminal of the third amplifier U4A is connected to the inverting input terminal of the fourth amplifier U4B through the diode D5 and the resistor R15, respectively. One end of the resistor R11 is connected between the cathode of the diode D3 and the non-inverting input terminal of the fourth amplifier U4B. The other end of the resistor R11 is grounded. The resistor R11 is connected in parallel with the capacitor C15.

[0009] Preferably, the filtering module includes resistors R9 and R10, a fifth amplifier U5A, capacitors C16 and C17. One end of resistor R9 is connected to the output terminal of the fourth amplifier U4B, and the other end of resistor R9 is connected to one end of resistor R10. The other end of resistor R10 is connected to the non-inverting input terminal of the fifth amplifier U5A. One end of capacitor C17 is connected between the non-inverting input terminal of the fifth amplifier U5A and the other end of resistor R10. The other end of capacitor C17 is grounded. One end of capacitor C16 is connected between resistors R9 and R10. The other end of capacitor C16 is connected to both the inverting input terminal and the output terminal of the fifth amplifier U5A.

[0010] Preferably, the power circuit module includes a power input module, a power chip module, and a power output module. The power chip module includes a power chip module input terminal and a power chip module output terminal. The power output module includes a positive boost converter module and a boost converter module. The power input module is connected to the power chip module input terminal, and the power chip module output terminal is connected to the positive boost converter module and the boost converter module, respectively.

[0011] Preferably, the power input module includes a power voltage output terminal VCC, a capacitor C1, a PMOS transistor U1, a capacitor C9, a resistor R4, and a capacitor C10. The power voltage output terminal VCC is connected to one end of capacitor C1 and pin 2 of PMOS transistor U1, and the other end of capacitor C1 is grounded. A resistor R4 is connected between the power voltage output terminal VCC and pin 2 of PMOS transistor U1. The two ends of the resistor R4 are connected to one end of capacitor C9 and one end of capacitor C10, and the other ends of capacitor C9 and capacitor C10 are grounded.

[0012] Preferably, the input terminal of the power chip module includes PGND pin 2, PGND pin 3, VIN pin 4, INN pin 5, INN pin 6, BSW pin 7, ENP pin 8, PSP pin 9, ENN pin 10, PSN pin 11, NC pin 12, AGND pin 19, NC pin 20, and EP pin 25. ENN pin 10 is connected to VIN pin 4 through ENP pin 8. VIN pin 4 is also connected to resistor R4 and capacitor C10. INN pin 6 is connected to INN pin 5. INN pin 5 is also connected between capacitor C1 and PMOS transistor U1 pin 2. BSW pin 7 is connected to PMOS transistor U1 pin 1. PSP pin 9 and PSN pin 11 are grounded. EP pin 25, PGND pin 2, PGND pin 3, and AGND pin 19 are connected and grounded. NC pin 12 and NC pin 20 are unconnected.

[0013] Preferably, the positive boost converter module includes capacitor C2, inductor L1, diode D1, capacitor C3, resistor R1, resistor R2, capacitor C4, capacitor C5, capacitor C6, and capacitor C7. The anode of diode D1 is connected to one end of inductor L1, and the other end of inductor L1 is connected to pin 3 of PMOS transistor U1 and one end of capacitor C2. The other end of capacitor C2 is grounded. The cathode of diode D1 is connected to one end of capacitor C3, one end of resistor R1, and one end of capacitor C4. The other end of resistor R1 is connected to one end of resistor R2, and the other end of resistor R2 is grounded. The other end of capacitor C3 is connected between resistor R1 and resistor R2. Capacitor C4 is connected in parallel with capacitors C5, C6, and C7, and the other end of capacitor C7 is grounded.

[0014] Preferably, the boost converter module includes capacitor C8, resistors R3 and R5, capacitor C11, diode D2, capacitors C12, C13, C14, and C27, and inductor L2. One end of resistor R3 is connected to one end of resistor R5, and the other end of resistor R3 is connected to one end of capacitor C8. The other end of capacitor C8 is grounded. Resistor R5 is connected in parallel with capacitor R11, and the other end of resistor R5 is connected to capacitor C12. Capacitor C12 is connected in parallel with capacitors C13, C14, and C27. The anode of diode D2 is connected between capacitors C11 and C12. The cathode of diode D2 is connected to one end of inductor L2, and the other end of inductor L2 is grounded.

[0015] Preferably, the output terminals of the power chip module include INP pin 1, OUTN pin 13, OUTN pin 14, VNEG pin 15, FBN pin 16, VREF pin 17, CN pin 18, CP pin 21, FBP pin 22, VPOS pin 23, and INP pin 24. INP pin 1 and INP pin 24 are connected between inductor L1 and diode D1. INP pin 1 is connected to VPOS pin 23 via diode D1. FBP pin 22 is connected to capacitor C8. FBN pin 16 is connected to one end of resistor R5, and the other end of resistor R5 is connected to VNEG pin 15. OUTN pins 13 and OUTN pin 14 are connected to inductor L2. CN pin 18 is connected to one end of capacitor C33, and the other end of capacitor C33 is grounded. CN pin 18 is also connected to one end of capacitor C28, and the other end of capacitor C28 is grounded.

[0016] The beneficial effects of this utility model are as follows: By using the peak detection module of the detection circuit module, not only is the cost of the detection circuit reduced, but the detection efficiency is also improved. At the same time, the adjustable resistor R14 of the current-voltage conversion module can detect weaker light sources by adjusting the voltage amplification factor. In addition, the power chip module enables the single power supply to be converted to a dual power supply and boosted, so that the power circuit module outputs a voltage of about ±12V, which meets the power supply requirements of the detection circuit module. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of a fluorescence signal detection circuit for a fluorescence detector according to the present invention.

[0018] Figure 2 This is a circuit diagram of a fluorescence signal detection circuit for a fluorescence detector according to the present invention.

[0019] Figure 3 This is a circuit diagram of a current-voltage conversion module for a fluorescence signal detection circuit in a fluorescence detector according to this utility model.

[0020] Figure 4This is a circuit diagram of the peak detection module of the fluorescence signal detection circuit of a fluorescence detector according to the present invention.

[0021] Figure 5 This is a circuit diagram of a fluorescence signal detection and filtering module for a fluorescence detector according to the present invention.

[0022] Figure 6 This is a circuit diagram of the power supply circuit module of the fluorescence signal detection circuit of a fluorescence detector according to this utility model.

[0023] Figure 7 This is a circuit board diagram of a fluorescence signal detection circuit for a fluorescence detector according to the present invention. Detailed Implementation

[0024] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, the specific embodiments of this utility model will be described in detail below with reference to the accompanying drawings.

[0025] Please see Figures 1-7 This utility model provides an embodiment: a fluorescence signal detection circuit for a fluorescence detector, including a detection circuit module and a power supply circuit module. The detection circuit module is used to detect the intensity of the fluorescence signal, and the power supply circuit module is used to provide single-power-to-dual-power-to-boost power supply for the detection circuit module.

[0026] The detection circuit module includes a light-emitting diode (LED), a current-to-voltage conversion module, a peak detection module 130, and a filtering module. The LED has a light source of 488nm. The anode of the LED is grounded, and the cathode of the LED is connected to the input terminal of the current-to-voltage conversion module. The output terminal of the current-to-voltage conversion module is connected to the input terminal of the peak detection module. One end of a P1 sensor is connected between the output terminal of the current-to-voltage conversion module and the input terminal of the peak detection module. The other end of the P1 sensor is grounded. The output terminal of the peak detection module is connected to the input terminal of the filtering module. The output terminal of the filtering module is connected to the input terminal of a P2 sensor. The output terminal of the P2 sensor is grounded. This detection circuit module not only reduces the cost of the detection circuit but also improves the detection efficiency.

[0027] In this implementation, if there is no interference in the material detection, when the signal from the light-emitting diode is input to the current-to-voltage conversion module, the current is converted into voltage and the voltage signal is amplified. Then, it is input to the P1 sensor. If there is interference in the material detection, the amplified voltage signal is input to the peak detection module to detect the intensity of the fluorescence signal. Then, the high-frequency interference signal is filtered out by the filtering module and then output to the P2 sensor.

[0028] The current-to-voltage conversion module includes a first amplifier U3A, a resistor R12, a capacitor C18, a second amplifier U3B, resistors R8 and R13, and an adjustable resistor R14. Both amplifiers U3A and U3B are LM358 models. U3A is a current-to-voltage amplifier, and U3B is a non-inverting proportional amplifier. The non-inverting input of U3A is grounded, and its inverting input is connected to the cathode of a light-emitting diode (LED). The output of U3A is connected to the non-inverting input of U3B. Resistor R12 and capacitor C18 are connected in parallel to the inverting input and output of U3A, respectively. The inverting input of U3B is connected to one end of resistor R8 via resistor R13 and the adjustable resistor R14. The other end of resistor R8 is grounded. The current-to-voltage conversion module converts current into voltage and amplifies the voltage signal. The voltage amplification factor can be adjusted using the adjustable resistor R14, enabling the detection of even weaker light sources.

[0029] In this implementation case, when the signal of the light-emitting diode is input to the inverting input terminal of the first amplifier U3A, the current signal is converted into a voltage signal by connecting the inverting input terminal and the output terminal of the first amplifier U3A in parallel with the resistor R12 and the capacitor C18 respectively. Then, the voltage signal is amplified by the second amplifier U3B. If the detected light source is weak, the voltage signal amplification factor is adjusted by the adjustable resistor R14.

[0030] Resistor R12 has a resistance of 1K and capacitor C18 has a capacitance of 22pF, so that the voltage signal amplification factor can be adjusted by resistor R12 and the dynamic response coefficient can be adjusted by capacitor C18. Resistor R13 has a resistance of 10K, adjustable resistor R14 has a resistance of 1M, and resistor R8 has a resistance of 10K, so that the voltage signal amplification factor is between 10 and 1010 times.

[0031] The peak detection module includes resistor R7, third amplifier U4A, diode D3, fourth amplifier U4B, capacitor C15, resistor R11, diode D5, and resistor R15. The output of resistor R7 is connected to the non-inverting input of third amplifier U4A. The output of third amplifier U4A is connected to the non-inverting input of fourth amplifier U4B through diode D3. The inverting input of third amplifier U4A is connected to diode D3 and the inverting input of fourth amplifier U4B through diode D5 and resistor R15, respectively. One end of resistor R11 is connected between the cathode of diode D3 and the non-inverting input of fourth amplifier U4B, and the other end of resistor R11 is grounded. Resistor R11 is connected in parallel with capacitor C15. The peak detection module allows the negative voltage to become positive without reaching a negative saturation state, effectively improving the detection efficiency.

[0032] In this implementation, the amplified voltage signal is input to the non-inverting input of the third amplifier U4A through resistor R7. Diode D3 is connected between the output of the third amplifier U4A and the non-inverting input of the fourth amplifier U4B. A peak memory is formed through capacitor C15 and resistor R11. Then, the amplified voltage signal is followed by the conduction and cutoff of diodes D3 and D5, as well as the output of the fourth amplifier U4B and resistor R15.

[0033] When the voltage at the non-inverting input of the third amplifier U4A is greater than the voltage at the inverting input of the third amplifier U4A, diode D3 conducts and diode D5 is cut off, causing capacitor C15 to charge. At the same time, this voltage is fed back to the inverting input of the third amplifier U4A through the fourth amplifier U4B. When the voltage at the non-inverting input of the third amplifier U4A is less than the voltage at the inverting input of the third amplifier U4A, diode D3 is cut off and diode D5 conducts. In this case, the amplified voltage signal is followed through the output of the fourth amplifier U4B and resistor R15.

[0034] Resistor R7 has a resistance of 1K, resistor R15 has a resistance of 20K, resistor R11 has a resistance of 1M, and capacitor C15 has a capacitance of 1uF, so that the voltage signal of the peak detection module is amplified by 20 times.

[0035] The filtering module includes resistors R9 and R10, a fifth amplifier U5A, capacitors C16 and C17. The filtering module is a second-order low-pass filter. One end of resistor R9 is connected to the output of the fourth amplifier U4B, and the other end of resistor R9 is connected to one end of resistor R10. The other end of resistor R10 is connected to the non-inverting input of the fifth amplifier U5A. One end of capacitor C17 is connected between the non-inverting input of the fifth amplifier U5A and the other end of resistor R10, and the other end of capacitor C17 is grounded. One end of capacitor C16 is connected between resistors R9 and R10, and the other end of capacitor C16 is connected to both the inverting input and output of the fifth amplifier U5A. The output of the fifth amplifier U5A is connected to one end of sensor P2, and the other end of sensor P2 is grounded. The filtering module filters out high-frequency interference signals.

[0036] The power supply circuit module includes a power input module, a power chip module, and a power output module. The power chip module includes a power chip module input terminal and a power chip module output terminal. The power output module includes a positive boost converter module and a boost converter module. The power input module is connected to the power chip module input terminal, and the power chip module output terminal is connected to the positive boost converter module and the boost converter module, respectively. The power chip module uses a TPS65130R chip to achieve a power output voltage of approximately ±12V, which meets the power supply requirements of the detection circuit module.

[0037] The power input module includes a power voltage output terminal VCC, a capacitor C1, a PMOS transistor U1, a capacitor C9, a resistor R4, and a capacitor C10. The power voltage output terminal VCC is connected to one end of capacitor C1 and pin 2 of PMOS transistor U1. The other end of capacitor C1 is grounded. A resistor R4 is connected between the power voltage output terminal VCC and pin 2 of PMOS transistor U1. The two ends of the resistor R4 are connected to one end of capacitor C9 and one end of capacitor C10. The other ends of capacitor C9 and capacitor C10 are grounded.

[0038] The power chip module input terminals include PGND pin 2, PGND pin 3, VIN pin 4, INN pin 5, INN pin 6, BSW pin 7, ENP pin 8, PSP pin 9, ENN pin 10, PSN pin 11, NC pin 12, AGND pin 19, NC pin 20, and EP pin 25. ENN pin 10 is connected to VIN pin 4 through ENP pin 8. VIN pin 4 is also connected to resistor R4 and capacitor C10. INN pin 6 is connected to INN pin 5. INN pin 5 is also connected between capacitor C1 and PMOS transistor U1 pin 2. BSW pin 7 is connected to PMOS transistor U1 pin 1. PSP pin 9 and PSN pin 11 are grounded. EP pin 25, PGND pin 2, PGND pin 3, and AGND pin 19 are connected and grounded. NC pin 12 and NC pin are unconnected. By grounding PSP pin 9 and PSN pin 11, more detection circuit modules can be powered.

[0039] In this implementation, the power supply voltage output terminal VCC is connected to INN pins 5 and 6, and VIN pin 4, ENP pin 8, and ENN pin 10 are connected through capacitors C1 and C9, resistor R4, and capacitor C10. PSP pin 9 and PSN pin 11 are grounded, and EP pin 25, PGND pin 2, PGND pin 3, and AGND pin 19 are connected and grounded. NC pin 12, NC pin 20, and EP pin 25 are unconnected. BSW pin 7 is connected to PMOS transistor U1 pin 1 for circuit feedback.

[0040] The positive boost converter module includes capacitor C2, inductor L1, diode D1, capacitor C3, resistor R1, resistor R2, capacitor C4, capacitor C5, capacitor C6, and capacitor C7. The anode of diode D1 is connected to one end of inductor L1, and the other end of inductor L1 is connected to pin 3 of PMOS transistor U1 and one end of capacitor C2. The other end of capacitor C2 is grounded. The cathode of diode D1 is connected to one end of capacitor C3, one end of resistor R1, and one end of capacitor C4. The other end of resistor R1 is connected to one end of resistor R2, and the other end of resistor R2 is grounded. The other end of capacitor C3 is connected between resistor R1 and resistor R2. Capacitor C4 is connected in parallel with capacitors C5, C6, and C7, and the other end of capacitor C7 is grounded.

[0041] The boost converter module includes capacitor C8, resistors R3 and R5, capacitor C11, diode D2, capacitors C12, C13, C14, and C27, and inductor L2. One end of resistor R3 is connected to one end of resistor R5, and the other end of resistor R3 is connected to one end of capacitor C8. The other end of capacitor C8 is grounded. Resistor R5 is connected in parallel with capacitor R11, and the other end of resistor R5 is connected to capacitor C12. Capacitor C12 is connected in parallel with capacitors C13, C14, and C27. The anode of diode D2 is connected between capacitors C11 and C12. The cathode of diode D2 is connected to one end of inductor L2, and the other end of inductor L2 is grounded.

[0042] The power chip module output terminals include INP pin 1, OUTN pin 13, OUTN pin 14, VNEG pin 15, FBN pin 16, VREF pin 17, CN pin 18, CP pin 21, FBP pin 22, VPOS pin 23, and INP pin 24. Inductor L1 and diode D1 are connected to INP pin 1 and INP pin 24. INP pin 1 is connected to VPOS pin 23 through diode D1. FBP pin 22 is connected to capacitor C8. FBN pin 16 is connected to one end of resistor R5, and the other end of resistor R5 is connected to VNEG pin 15. OUTN pins 13 and OUTN pin 14 are connected to inductor L2. CN pin 18 is connected to one end of capacitor C33, and the other end of capacitor C33 is grounded. CN pin 18 is also connected to one end of capacitor C28, and the other end of capacitor C28 is grounded.

[0043] In this implementation case, when the input voltage is converted into a positive boost voltage, the positive boost voltage is output through capacitor C2, inductor L1, diode D1, and INP pin 1 and INP pin 24 through resistor R1, resistor R2 and capacitor C3, so that the positive boost voltage passes through capacitor C4, capacitor C5, capacitor C6 and capacitor C7.

[0044] When the input voltage is converted into a boost voltage, the boost voltage is output through resistors R3 and R5 and capacitor C11 connected to pins VNEG15, FBN16 and VREF17 respectively. The boost voltage then passes through capacitors C12, C13, C14 and C27, and is connected to pins OUTN13 and OUTN14 and inductor L2 through diode D2.

[0045] In the power supply chip module, the resistor R2 of the positive boost converter module has a resistance of 2.2KΩ, and the resistor R3 of the boost converter module has a resistance of 2.7KΩ. Therefore, according to the formula for calculating resistors R1 and R3, R1 = R2 × (V pos / V ref -1) and R5=-R3×(V pos / V neg ), where V ref =1.213V, V pos =12V, V neg = -12V. According to the above formula, the resistance value of resistor R1 can be selected as 20K and the resistance value of resistor R5 can be selected as 26.7K.

[0046] Then, according to the capacitance calculation formula C3=6.8μs / R1 and C 11 =7.5μs / R3, the capacitance values ​​of capacitors C3 and C11 are chosen to be 0.3nF.

[0047] Working principle: First, connect the power supply voltage output terminal VCC to INN pin 5 and INN pin 6, and connect the power supply voltage output terminal VCC to VIN pin 4, ENP pin 8 and ENN pin 10 through capacitor C1, capacitor C9, resistor R4 and capacitor C10. Ground PSP pin 9 and PSN pin 11, and connect EP pin 25, PGND pin 2, PGND pin 3 and AGND pin 19 to ground. NC pin 12, NC pin 20 and EP pin 25 are left unconnected. BSW pin 7 is connected to PMOS transistor U1 pin 1 for circuit feedback.

[0048] Subsequently, when the input voltage is converted to a positive boost voltage, the positive boost voltage is output through capacitor C2, inductor L1, diode D1, and INP pins 1 and 24 via resistors R1, R2, and capacitor C3, so that the positive boost voltage passes through capacitors C4, C5, C6, and C7; when the input voltage is converted to a boost voltage, the boost voltage is output through VNEG pin 15, FBN pin 16, and VREF pin 17 connected to resistors R3, R5, and capacitor C11 respectively, so that the boost voltage passes through capacitors C12, C13, C14, and C27, and through diode D2 connected to OUTN pins 13 and 14 and inductor L2;

[0049] Then, power supplies are used to detect the circuit modules. If there is no interference in the material detection, when the signal from the LED is input to the inverting input of the first amplifier U3A, the current signal is converted into a voltage signal by connecting resistor R12 and capacitor C18 in parallel between the inverting input and output of the first amplifier U3A. This voltage signal is then amplified by the second amplifier U3B. When the detection light source is weak, the voltage signal amplification factor is adjusted by the adjustable resistor R14 before being input to sensor P1. If interference occurs in the material detection, the amplified voltage signal is input to the non-inverting input of the third amplifier U4A through resistor R7. Diode D3 is connected between the output of the third amplifier U4A and the non-inverting input of the fourth amplifier U4B. A peak memory is formed using capacitor C15 and resistor R11. Then, when the voltage at the non-inverting input of the third amplifier U4A is greater than the voltage at its inverting input, diode D3 conducts and diode D5 is cut off, causing capacitor C15 to charge. Simultaneously, this voltage is fed back to the inverting input of the third amplifier U4A via the fourth amplifier U4B. When the voltage at the non-inverting input of the third amplifier U4A is less than the voltage at its inverting input, diode D3 is cut off and diode D5 conducts. At this point, the amplified voltage signal is followed by the output of the fourth amplifier U4B and resistor R15. Then, a filter module filters out high-frequency interference signals before outputting to sensor P2.

Claims

1. A fluorescence signal detection circuit for a fluorescence detector, characterized in that: It includes a detection circuit module and a power supply circuit module. The detection circuit module is used to detect the intensity of the fluorescence signal, and the power supply circuit module is used to convert the single power supply of the detection circuit module to a dual power supply boost power supply. The detection circuit module includes a light-emitting diode (LED), a current-to-voltage conversion module, a peak detection module, and a filtering module. The anode of the LED is grounded, the cathode of the LED is connected to the input terminal of the current-to-voltage conversion module, the output terminal of the current-to-voltage conversion module is connected to the input terminal of the peak detection module, one end of a P1 sensor is connected between the output terminal of the current-to-voltage conversion module and the input terminal of the peak detection module, the other end of the P1 sensor is grounded, the output terminal of the peak detection module is connected to the input terminal of the filtering module, the output terminal of the filtering module is connected to the input terminal of a P2 sensor, and the output terminal of the P2 sensor is grounded.

2. The fluorescence signal detection circuit of the fluorescence detector as described in claim 1, characterized in that: The current-to-voltage conversion module includes a first amplifier U3A, a resistor R12, a capacitor C18, a second amplifier U3B, a resistor R8, a resistor R13, and an adjustable resistor R14. The non-inverting input terminal of the first amplifier U3A is grounded, the inverting input terminal of the first amplifier U3A is connected to the cathode of a light-emitting diode, the output terminal of the first amplifier U3A is connected to the non-inverting input terminal of the second amplifier U3B, the inverting input terminal and the output terminal of the first amplifier U3A are connected in parallel with a resistor R12 and a capacitor C18, respectively, and the inverting input terminal of the first amplifier U3B is connected to one end of a resistor R8 through a resistor R13 and an adjustable resistor R14, and the other end of the resistor R8 is grounded.

3. The fluorescence signal detection circuit of the fluorescence detector as described in claim 2, characterized in that: The peak detection module includes a resistor R7, a third amplifier U4A, a diode D3, a fourth amplifier U4B, a capacitor C15, a resistor R11, a diode D5, and a resistor R15. The output terminal of the resistor R7 is connected to the non-inverting input terminal of the third amplifier U4A. The output terminal of the third amplifier U4A is connected to the non-inverting input terminal of the fourth amplifier U4B through the diode D3. The inverting input terminal of the third amplifier U4A is connected to the inverting input terminal of the fourth amplifier U4B through the diode D5 and the resistor R15, respectively. One end of the resistor R11 is connected between the cathode of the diode D3 and the non-inverting input terminal of the fourth amplifier U4B. The other end of the resistor R11 is grounded. The resistor R11 is connected in parallel with the capacitor C15.

4. The fluorescence signal detection circuit of the fluorescence detector as described in claim 3, characterized in that: The filtering module includes resistors R9 and R10, a fifth amplifier U5A, capacitors C16 and C17. One end of resistor R9 is connected to the output terminal of the fourth amplifier U4B, and the other end of resistor R9 is connected to one end of resistor R10. The other end of resistor R10 is connected to the non-inverting input terminal of the fifth amplifier U5A. One end of capacitor C17 is connected between the non-inverting input terminal of the fifth amplifier U5A and the other end of resistor R10. The other end of capacitor C17 is grounded. One end of capacitor C16 is connected between resistors R9 and R10. The other end of capacitor C16 is connected to both the inverting input terminal and the output terminal of the fifth amplifier U5A.

5. The fluorescence signal detection circuit of the fluorescence detector as described in claim 4, characterized in that: The power circuit module includes a power input module, a power chip module, and a power output module. The power chip module includes a power chip module input terminal and a power chip module output terminal. The power output module includes a positive boost converter module and a boost converter module. The power input module is connected to the power chip module input terminal, and the power chip module output terminal is connected to the positive boost converter module and the boost converter module, respectively.

6. The fluorescence signal detection circuit of the fluorescence detector as described in claim 5, characterized in that: The power input module includes a power voltage output terminal VCC, a capacitor C1, a PMOS transistor U1, a capacitor C9, a resistor R4, and a capacitor C10. The power voltage output terminal VCC is connected to one end of capacitor C1 and pin 2 of PMOS transistor U1, and the other end of capacitor C1 is grounded. A resistor R4 is connected between the power voltage output terminal VCC and pin 2 of PMOS transistor U1. The two ends of the resistor R4 are connected to one end of capacitor C9 and one end of capacitor C10, and the other ends of capacitor C9 and capacitor C10 are grounded.

7. The fluorescence signal detection circuit of the fluorescence detector as described in claim 6, characterized in that: The power chip module input terminals include PGND pin 2, PGND pin 3, VIN pin 4, INN pin 5, INN pin 6, BSW pin 7, ENP pin 8, PSP pin 9, ENN pin 10, PSN pin 11, NC pin 12, AGND pin 19, NC pin 20, and EP pin 25. ENN pin 10 is connected to VIN pin 4 through ENP pin 8. VIN pin 4 is also connected to resistor R4 and capacitor C10. INN pin 6 is connected to INN pin 5. INN pin 5 is also connected between capacitor C1 and PMOS transistor U1 pin 2. BSW pin 7 is connected to PMOS transistor U1 pin 1. PSP pin 9 and PSN pin 11 are grounded. EP pin 25, PGND pin 2, PGND pin 3, and AGND pin 19 are connected and grounded. NC pin 12 and NC pin 20 are unconnected.

8. The fluorescence signal detection circuit of the fluorescence detector as described in claim 7, characterized in that: The positive boost converter module includes capacitor C2, inductor L1, diode D1, capacitor C3, resistor R1, resistor R2, capacitor C4, capacitor C5, capacitor C6, and capacitor C7. The anode of diode D1 is connected to one end of inductor L1, and the other end of inductor L1 is connected to pin 3 of PMOS transistor U1 and one end of capacitor C2. The other end of capacitor C2 is grounded. The cathode of diode D1 is connected to one end of capacitor C3, one end of resistor R1, and one end of capacitor C4. The other end of resistor R1 is connected to one end of resistor R2, and the other end of resistor R2 is grounded. The other end of capacitor C3 is connected between resistor R1 and resistor R2. Capacitor C4 is connected in parallel with capacitors C5, C6, and C7, and the other end of capacitor C7 is grounded.

9. The fluorescence signal detection circuit of the fluorescence detector as described in claim 8, characterized in that: The boost converter module includes capacitor C8, resistors R3 and R5, capacitor C11, diode D2, capacitors C12, C13, C14, and C27, and inductor L2. One end of resistor R3 is connected to one end of resistor R5, and the other end of resistor R3 is connected to one end of capacitor C8. The other end of capacitor C8 is grounded. Resistor R5 is connected in parallel with capacitor R11, and the other end of resistor R5 is connected to capacitor C12. Capacitor C12 is connected in parallel with capacitors C13, C14, and C27. The anode of diode D2 is connected between capacitors C11 and C12. The cathode of diode D2 is connected to one end of inductor L2, and the other end of inductor L2 is grounded.

10. The fluorescence signal detection circuit of the fluorescence detector as described in claim 9, characterized in that: The power chip module output terminals include INP pin 1, OUTN pin 13, OUTN pin 14, VNEG pin 15, FBN pin 16, VREF pin 17, CN pin 18, CP pin 21, FBP pin 22, VPOS pin 23, and INP pin 24. Inductor L1 and diode D1 are connected to INP pin 1 and INP pin 24. INP pin 1 is connected to VPOS pin 23 via diode D1. FBP pin 22 is connected to capacitor C8. FBN pin 16 is connected to one end of resistor R5, and the other end of resistor R5 is connected to VNEG pin 15. OUTN pins 13 and OUTN pin 14 are connected to inductor L2. CN pin 18 is connected to one end of capacitor C33, and the other end of capacitor C33 is grounded. CN pin 18 is also connected to one end of capacitor C28, and the other end of capacitor C28 is grounded.

Citation Information

Patent Citations

  • Fluorescence detection circuit and fluorescence detection equipment

    CN211741077U