Multi-channel RS485 to Ethernet communication circuit
By designing a multi-channel RS485 to Ethernet communication circuit, and utilizing FPGA control circuits, RS485 circuits, Ethernet circuits, and network transformer circuits, the problem of simultaneous communication of multiple RS485 devices was solved, achieving efficient data transmission and anti-interference capabilities, supporting multi-device expansion, and facilitating maintenance.
Patent Information
- Application Number
- CN202422959515.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-02
- Publication Date
- 2025-10-31
- Estimated Expiration
- 2034-12-02
AI Technical Summary
The existing RS485 communication method cannot achieve simultaneous communication when multiple RS485 devices are working at the same time, and the RS485 to Ethernet module solution is not applicable, resulting in bus data contention and low data transmission efficiency.
Design a multi-channel RS485 to Ethernet communication circuit. It adopts an FPGA control circuit, RS485 circuit, Ethernet circuit, network transformer circuit and RJ45 socket. Simultaneous data transmission of multiple RS485 devices is realized through FPGA control signal parallel bus and logic control signal lines, and the anti-interference capability of Ethernet signal is enhanced.
It enables multiple RS485 devices to communicate with the host simultaneously, and transmits data in packets to the host computer for processing. It has good scalability, is easy to maintain, and has strong anti-interference capabilities for signal transmission.
Smart Images

Figure CN223502888U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of data communication technology, and in particular to a multi-channel RS485 to Ethernet communication circuit. Background Technology
[0002] RS485 communication is widely used in long-distance data transmission. In "one master and many slaves" RS485 communication scenarios, a daisy-chain topology or a topology where all devices are connected to a single RS485 bus is often used. The advantage of this topology is that it can reduce the wiring length, but the disadvantage is that the slaves on the bus cannot actively send data to the master. They can only wait for the master to query the data of each slave in turn. After receiving the corresponding query command, the slaves reply. Moreover, the slaves cannot reply with data at the same time, otherwise it will cause bus data contention.
[0003] Currently, RS485 to Ethernet communication can use RS485 to Ethernet modules to achieve data pass-through, but this solution is obviously not suitable for situations where multiple RS485 devices are working simultaneously. Utility Model Content
[0004] The purpose of this invention is to design a circuit that can ensure that the host can communicate with multiple RS485 devices simultaneously, so that the host can package the data of multiple slave devices and transmit it to the host computer for processing.
[0005] The technical solution proposed in this utility model is implemented as follows: A multi-channel RS485 to Ethernet communication circuit includes an FPGA control circuit, an RS485 circuit, an Ethernet circuit, a network transformer circuit, and an RJ45 socket. The FPGA control circuit, used to control the transmit and receive modes of the RS485 circuits and to configure the data transmission modes and speeds of the Ethernet circuits, is connected to multiple RS485 circuits. The FPGA control circuit is also connected to the Ethernet circuits. The parallel data bus and control signal lines of the Ethernet circuits are connected to the FPGA. The network transformer circuit is connected to the Ethernet circuits and the RJ45 socket. The three signal ports (USART_TX, USART_RX, and CTL) of each RS485 circuit are connected to the I / O ports of the FPGA. Multiple such RS485 circuits have their signal ports connected to the I / O interfaces of the FPGA. The Ethernet circuit is connected to the FPGA via eight parallel buses for data transmission and eight parallel buses for data reception, as well as logic control signal lines for Ethernet data transmission. The network transformer circuit, which enhances the Ethernet signal and its anti-interference capability, is connected to the Ethernet circuit at one end and to the RJ45 socket at the other end.
[0006] The multi-channel RS485 to Ethernet communication circuit provided by this utility model uses an FPGA as the main control chip. It is designed to support the simultaneous conversion of data from multiple RS485 devices to Ethernet data transmission. Within the limits of FPGA resources, the number of RS485 devices can be arbitrarily expanded or reduced. Furthermore, this multi-channel RS485 to Ethernet communication circuit adopts a modular design, which facilitates subsequent maintenance. Attached Figure Description
[0007] Figure 1 System block diagram of a multi-channel RS485 to Ethernet communication circuit;
[0008] Figure 2 FPGA control circuit schematic diagram;
[0009] Figure 3 Ethernet circuit schematic;
[0010] Figure 4 Schematic diagram of a 7-channel RS485 circuit;
[0011] Figure 5 Schematic diagram of a network transformer circuit;
[0012] Figure 6 : Circuit diagram of RJ45 socket.
[0013] To clearly illustrate the connection relationships between the various unit circuits, the diagram directly uses chips from actual applications.
[0014] The FPGA control circuit uses the XC7K325T-1FFG676I chip, the RS485 circuit uses the SN65HVD23 chip, the Ethernet circuit uses the RTL8211EG-VB-CG chip, the network transformer circuit uses the H5007ENL chip, and the RJ45 socket uses the TMR21R-5C-88 chip. Detailed Implementation
[0015] The technical solution and advantages of this utility model will be further described below with reference to the accompanying drawings and embodiments:
[0016] like Figures 1-6 As shown, this utility model provides a multi-channel RS485 to Ethernet communication circuit, which includes an FPGA control circuit (XC7K325T-1FFG676I), an RS485 circuit (SN65HVD23), an Ethernet circuit (RTL8211EG-VB-CG), a network transformer circuit (H5007ENL), and an RJ45 socket (TMR21R-5C-88).
[0017] The FPGA control circuit (XC7K325T-1FFG676I) is the control core for multi-channel RS485 to Ethernet data transmission. Its I / O ports are connected to the Ethernet circuit (RTL8211EG-VB-CG) and the 7-channel RS485 circuit (SN65HVD23) to configure the Ethernet data transmission mode and transmission speed. In addition, it controls the transmit and receive modes of the RS485 devices, communicates with the 7-channel RS485 devices, and converts RS485 data into Ethernet data for transmission.
[0018] The RS485 circuit (SN65HVD23) is connected to the FPGA control circuit and seven RS485 devices. Each RS485 device has three signals connected to the FPGA control circuit: USART_TX, USART_RX, and CTL. There are a total of seven such signals.
[0019] The Ethernet circuit (RTL8211EG-VB-CG) is connected to the FPGA control circuit and the network transformer, respectively. The Ethernet circuit is connected to the FPGA via a parallel data bus and control signal lines. The transmission bus consists of 8 parallel lines for data transmission and 8 parallel lines for data reception. The control signal lines are used for the logic control of Ethernet data transmission.
[0020] The network transformer circuit (H5007ENL) is connected to the RJ45 socket and the Ethernet circuit respectively. The network transformer has a signal coupling function, which can enhance the Ethernet signal and enable it to be transmitted over a longer distance. In addition, it can isolate the Ethernet chip from the outside and enhance the anti-interference capability of the Ethernet signal transmission.
Claims
1. A multi-channel RS485 to Ethernet communication circuit, characterized in that: It includes an FPGA control circuit, an RS485 circuit, an Ethernet circuit, a network transformer circuit, and an RJ45 socket. The FPGA control circuit, which controls the transmit and receive modes of the RS485 circuit and configures the data transmission modes and speeds of the Ethernet circuit, is connected to multiple RS485 circuits. The FPGA control circuit is also connected to the Ethernet circuit. The parallel data bus and control signal lines of the Ethernet circuit are connected to the FPGA. The network transformer circuit is connected to the Ethernet circuit and the RJ45 socket.
2. The multi-channel RS485 to Ethernet communication circuit according to claim 1, characterized in that: Each RS485 circuit has three signal ports: USART_TX, USART_RX, and CTL, which are connected to the FPGA's I / O ports. There are multiple such RS485 circuits whose signal ports are connected to the FPGA's I / O interface.
3. The multi-channel RS485 to Ethernet communication circuit according to claim 1, characterized in that: The Ethernet circuit is connected to the FPGA via eight parallel buses for data transmission, eight parallel buses for data reception, and logic control signal lines for Ethernet data transmission.
4. The multi-channel RS485 to Ethernet communication circuit according to claim 1, characterized in that: A network transformer circuit that can enhance Ethernet signals and improve their anti-interference capabilities has one end connected to the Ethernet circuit and the other end connected to an RJ45 socket.