Back contact battery, photovoltaic module and photovoltaic system

Abstract

The utility model discloses a back contact cell, a photovoltaic assembly and a photovoltaic system, the back contact cell comprises a first area, a second area and an isolation area which are arranged on a backlight surface of a silicon substrate, the first area and the second area are alternately arranged, the isolation area is located between the first area and the second area, and the isolation area is located between the first area and the second area. The first region comprises a first doped conductive layer, the second region comprises a second doped conductive layer, and the doping type of the first doped conductive layer is opposite to that of the second doped conductive layer; the side, close to the isolation area, of the first area is provided with a concave structure. According to the utility model, high-efficiency isolation of different doped regions on the back surface of the back contact cell can be realized, so that the photoelectric conversion efficiency of the back contact cell is improved.

Description

Technical Field

[0001] This utility model relates to the field of solar cell technology, and in particular to a back contact battery, photovoltaic module and photovoltaic system. Background Technology

[0002] Interdigitated back contact (IBC) is a high-efficiency solar cell technology. In an IBC, the positive and negative metal electrodes are arranged in an interdigitated pattern on the back surface of the cell. This design eliminates any metal grid lines obstructing the front surface, maximizing the illuminated area, reducing optical losses, and improving short-circuit current and overall photoelectric conversion efficiency. To prevent direct contact between N-type and P-type doped regions, which would hinder effective carrier collection, an isolation region is placed at the boundary between them. As cell size decreases, the N-type and P-type doped regions are placed more closely, correspondingly reducing the size of the isolation region. However, an excessively narrow isolation region may not provide sufficient insulation protection, increasing the likelihood of short circuits and thus reducing the photoelectric conversion efficiency of the back contact cell. Utility Model Content

[0003] The technical problem to be solved by this utility model is to provide a back contact battery that can improve the isolation performance of different doped regions on the back surface of the back contact battery and the photoelectric conversion efficiency of the solar cell.

[0004] The technical problem to be solved by this utility model is to provide a photovoltaic module and a corresponding photovoltaic system that include the above-mentioned back contact battery.

[0005] To address the aforementioned issues, this utility model discloses a back-contact battery, comprising a first region, a second region, and an isolation region disposed on the back surface of a silicon substrate. The first region and the second region are alternately disposed, and the isolation region is located between the first region and the second region. The first region includes a first doped conductive layer, and the second region includes a second doped conductive layer. The doping types of the first doped conductive layer and the second doped conductive layer are opposite.

[0006] The first region has a recessed structure on the side closest to the isolation zone.

[0007] As an improvement to the above technical solution, the first region has a discontinuous recessed structure on the side near the isolation zone.

[0008] As an improvement to the above technical solution, the second region has a recessed structure on the side near the isolation zone.

[0009] As an improvement to the above technical solution, the second region has a discontinuous recessed structure on the side near the isolation zone.

[0010] As an improvement to the above technical solution, the recessed structure includes a first unit region and a first recessed structure, the first unit region being disposed around the first recessed structure, and the first recessed structure including a pit and a protrusion disposed within the pit.

[0011] As an improvement to the above technical solution, the height of the protrusion is less than or equal to the depth of the pit.

[0012] As an improvement to the above technical solution, the shape of the protrusion includes a pyramid shape and / or a frustum shape.

[0013] As an improvement to the above technical solution, the silicon substrate includes a light-facing surface and a back-light-facing surface disposed opposite to each other. Along the direction from the light-facing surface toward the back-light-facing surface, the protrusion includes a silicon substrate and a passivation layer, and the sidewall of the pit includes a passivation layer.

[0014] As an improvement to the above technical solution, along the direction from the light-facing surface to the backlight surface, the first unit region includes a silicon substrate, a tunneling layer, a doped conductive layer, and a passivation layer, wherein the silicon substrate, the tunneling layer, the doped conductive layer, and the passivation layer are stacked sequentially.

[0015] As an improvement to the above technical solution, the passivation layer includes one or more of the following: aluminum oxide layer, silicon nitride layer, silicon oxide layer, and silicon oxynitride layer.

[0016] As an improvement to the above technical solution, the tunneling layer includes one or more of the following: silicon oxide layer, silicon carbide layer, silicon nitride layer, and aluminum oxide layer.

[0017] As an improvement to the above technical solution, the width of the bottom of the protrusion is 0.1μm to 1.5μm, and the height of the protrusion is 0.01μm to 10μm.

[0018] As an improvement to the above technical solution, the width of the opening of the pit is 0.1μm to 2μm, and the depth of the pit is 0.01μm to 10μm.

[0019] As an improvement to the above technical solution, the first doped conductive layer includes an extension portion that extends and protrudes above the isolation region;

[0020] The recessed structure includes a second unit region and a second recessed structure. The second unit region is arranged around the second recessed structure, and the second recessed structure penetrates the extension portion to form a hole.

[0021] As an improvement to the above technical solution, the back contact battery includes a passivation layer surrounding the extension portion, and the second recessed structure penetrates the extension portion and the passivation layer to form a hole.

[0022] As an improvement to the above technical solution, the width of the hole is 0.1μm to 1.5μm.

[0023] As an improvement to the above technical solution, multiple recessed structures form an isolation transition region, the width of which is 5μm to 30μm.

[0024] As an improvement to the above technical solution, the width of the isolation transition zone is 10μm to 15μm.

[0025] As an improvement to the above technical solution, when the silicon substrate is an N-type silicon substrate, the first region is a P-type doped region and the second region is an N-type doped region. The P-type doped region has n1 recessed structures on the side near the isolation region, and the N-type doped region has n2 recessed structures on the side near the isolation region, where n1 ≥ n2.

[0026] As an improvement to the above technical solution, when the silicon substrate is a P-type silicon substrate, the first region is an N-type doped region, the second region is a P-type doped region, the P-type doped region has n1 recessed structures on the side near the isolation region, and the N-type doped region has n2 recessed structures on the side near the isolation region, where n1≤n2.

[0027] As an improvement to the above technical solution, the back contact battery further includes a front passivation layer, a first electrode, and a second electrode;

[0028] The front passivation layer is stacked on the front side of the silicon substrate;

[0029] The first electrode is in contact with the first doped conductive layer, and the second electrode is in contact with the second doped conductive layer.

[0030] Accordingly, this utility model also discloses a photovoltaic module, including the aforementioned back contact battery.

[0031] Accordingly, this utility model also discloses a photovoltaic system, including the aforementioned photovoltaic module.

[0032] Implementing this utility model has the following beneficial effects:

[0033] 1. This utility model provides a recessed structure on the side of the first region of the backlight surface of the back contact battery near the isolation zone, thereby improving the isolation effect of the isolation zone on the first region and the second region. In addition, the recessed structure increases the contact area between the first region and the subsequently grown passivation layer, thus improving the passivation effect.

[0034] 2. This invention provides a recessed structure on the side of the second region of the back-light surface of the back-contact battery near the isolation region, thereby improving the isolation effect of the isolation region on the first and second regions. Furthermore, the recessed structure increases the contact area between the second region and the subsequently grown passivation layer, thus improving the passivation effect.

[0035] 3. The first recessed structure of this utility model includes a pit and a protrusion disposed in the pit. The bottom of the pit is formed on the silicon substrate, which can improve the isolation effect between the first region and the second region. The protrusion further increases the contact area with the subsequently deposited passivation layer, and the overall passivation performance is further improved.

[0036] 4. The first region and the edge of the isolation region of this utility model have an extension portion that extends and protrudes above the isolation region, thereby forming an isolation region with a small opening and a large interior, reducing the exchange of plasma with the outside world during the subsequent deposition of the passivation layer; a second recessed structure is provided in the extension portion, the second recessed structure penetrates the extension portion, and increases the isolation and passivation performance of the extension portion. Attached Figure Description

[0037] Figure 1 This is a schematic diagram of the structure of the back contact battery provided by this utility model;

[0038] Figure 2 This is a 3D micrograph of the back surface of the back contact battery provided by this utility model.

[0039] Figure 3 This is a schematic diagram of the first recessed structure provided in this embodiment of the utility model;

[0040] Figure 4 This is a schematic diagram showing the dimensions of the first recessed structure provided in this embodiment of the present invention;

[0041] Figure 5 This is a schematic diagram of the second recessed structure provided in an embodiment of the present invention;

[0042] Figure 6 This is an electron microscope image of the recessed structure provided in this embodiment of the present invention;

[0043] Figure 7 This is an electron microscope image of the first recessed structure provided in this embodiment of the present invention. Detailed Implementation

[0044] To make the objectives, technical solutions and advantages of this utility model clearer, the utility model will be described in further detail below.

[0045] See Figure 1This invention provides a back-contact battery, including a first region 13, a second region 14, and an isolation region 15 disposed on the back surface 11 of a silicon substrate 1. The first region 13 and the second region 14 are alternately disposed. The first region 13 includes a first doped conductive layer 161, and the second region 14 includes a first doped conductive layer 162. The doping types of the first doped conductive layer 161 and the second doped conductive layer 162 are opposite. Specifically, the first doped conductive layer may have the same or opposite doping type as the silicon substrate, and the second doped conductive layer may have the opposite conductivity type to the first doped conductive layer. Therefore, the back-contact battery has a first region and a second region with opposite conductivity types on the back surface side, and an isolation region is provided between the first region and the second region with opposite conductivity types. The spaced first region and the second region can prevent the first region and the second region from contacting each other and causing a short circuit.

[0046] The first region 13 has a recessed structure 17 on the side near the isolation zone 15.

[0047] Compared to existing designs that use an isolation region between the first and second regions, this invention also features a recessed structure on the side of the first region closest to the isolation region. This recessed structure further enhances the isolation between the first and second regions. Due to the shrinking of battery structures, the spacing between the first and second regions with different doping types is becoming increasingly smaller, placing higher demands on the isolation region between them. The recessed structure increases the isolation effect between the first and second regions while maintaining the same isolation region width. The recessed structure also improves light absorption, reduces light reflectivity, and allows more light to generate charge carriers within the silicon substrate, thus improving the photoelectric conversion efficiency of the battery. Furthermore, the recessed structure increases the contact area between the first region and the passivation layer subsequently deposited on its surface, thereby improving the surface passivation effect of the passivation layer on the first region and further enhancing the photoelectric conversion efficiency of the back-contact battery.

[0048] In a preferred embodiment, such as Figure 2 As shown, the first region 13 has a discontinuous recessed structure 17 on the side near the isolation region 15, and several discontinuous recessed structures form an isolation transition region 171. The discontinuous distribution of the recessed structures can further improve the isolation effect of the first region and the second region. Specifically, the width L of the isolation transition region can be set to 5μm to 30μm, exemplarily 6μm, 8μm, 10μm, 15μm, 20μm or 25μm, but is not limited thereto. More preferably, the width L of the isolation transition region is 10μm to 15μm. By controlling the width range of the isolation transition region, the isolation performance can be improved without adversely affecting the performance of the first region and the second region themselves, ensuring the collection and transport effect of charge carriers.

[0049] Correspondingly, a recessed structure can also be provided on the side of the second region 14 near the isolation region 15, and the function of the recessed structure is the same as that of the recessed structure on the side of the first region 13 near the isolation region 15. In a preferred embodiment, the side of the second region near the isolation region has a discontinuous recessed structure. Similarly, several discontinuous recessed structures form an isolation transition region, the width of which is 5μm to 30μm, and more preferably, the width of which is 10μm to 15μm.

[0050] Specifically, such as Figure 3 , Figure 6 and Figure 7 As shown, the recessed structure 17 includes a first unit region 172 and a first recessed structure 173. The first unit region 172 is disposed around the first recessed structure 173. The first recessed structure 173 includes a pit 174 and a protrusion 175 disposed within the pit 174. Specifically, the silicon substrate 1 includes a light-facing surface 11 and a backlight surface 12 disposed opposite to each other. Along the direction from the light-facing surface to the backlight surface, the protrusion 175 includes the silicon substrate 1 and a passivation layer 18. The sidewall of the pit 174 includes the passivation layer 18. The first unit region 172 includes the silicon substrate 1, a tunneling layer 19, a doped conductive layer 16, and a passivation layer 18. The silicon substrate 1, the tunneling layer 19, the doped conductive layer 16, and the passivation layer 18 are sequentially stacked. It should be noted that in the first region, the doped conductive layer included in the first unit region is a first doped conductive layer, and in the second region, the doped conductive layer included in the first unit region is a second doped conductive layer. By forming a first recessed structure in the first region and / or the second region, with the bottom of the recessed structure set to the silicon substrate, the isolation effect between the first region and the second region can be improved. Then, a passivation layer is covered on top of the first recessed structure. The protrusion further increases the contact area between the passivation layer and the first region and / or the second region, and the overall passivation performance is further improved.

[0051] The passivation layer reduces the recombination of surface carriers. The passivation layer 18 covers the first region 13, the first region 14, and the isolation region 15. The passivation layer passivates the side of the first doped conductive layer and the second doped conductive layer away from the silicon substrate, reducing the carrier recombination rate on this side and further improving the photoelectric conversion efficiency of the back-contact cell. The passivation layer can be one or more of an aluminum oxide layer, a silicon nitride layer, a silicon oxide layer, and a silicon oxynitride layer. Preferably, the passivation layer comprises an aluminum oxide layer and a silicon nitride layer stacked sequentially.

[0052] The tunneling layer can be divided into a first tunneling layer and a second tunneling layer. The first tunneling layer is disposed between the silicon substrate and the first doped conductive layer in the first region. The second tunneling layer is disposed between the silicon substrate and the second doped conductive layer in the second region. The first and second tunneling layers allow majority carriers to tunnel into the first doped conductive layer while blocking minority carriers from passing through. Thus, majority carriers are transported via the first and second doped conductive layers and collected by the corresponding electrodes, reducing the recombination rate of carriers of different conductivity types at the surface of the first or second region. This achieves excellent selective collection of carriers and further improves the photoelectric conversion efficiency of the back contact cell. The first and second tunneling layers can be one or more of silicon oxide, silicon carbide, silicon nitride, and aluminum oxide layers. Preferably, the first and second tunneling layers are silicon oxide layers.

[0053] In a preferred embodiment, the height of the protrusion is less than or equal to the depth of the pit. More preferably, the height of the protrusion is less than the depth of the pit, which facilitates the subsequent deposition of the passivation layer. Specifically, the shape of the protrusion can be pyramidal and / or frustum-shaped.

[0054] Understandably, the size of the protrusions and pits will also have a certain impact on the isolation effect and passivation performance, such as... Figure 4 As shown, the width D1 of the bottom of the protrusion is 0.1μm to 1.5μm, and the height H1 of the protrusion is 0.01μm to 10μm. If H1 < 0.01μm, it is easy to cause a short circuit and reduce the yield; if H1 > 10μm, it will affect the coverage of the subsequent passivation layer, thus reducing the passivation effect. The width D2 of the pit opening is 0.1μm to 2μm, and the depth H2 of the pit is 0.01μm to 10μm. If D2 < 0.1μm, it will affect the passivation effect; if D2 > 10μm, there will be copper residue, causing leakage. Both excessively large and small H2 will affect the passivation effect. If H2 < 0.01μm, it will weaken the hydrogen passivation of the silicon substrate by the subsequently deposited passivation layer, reducing the yield; if H2 > 10μm, it will increase the recombination of charge carriers on the silicon substrate surface. By limiting the size of the protrusions and pits, the passivation and isolation performance of the battery can be improved without adversely affecting the collection and transport of charge carriers. Moreover, controlling the size of the pits and protrusions within the range of this invention is beneficial for the subsequent formation of the back passivation layer. The passivation layer can completely fill the first recessed structure, thereby improving the film quality of the passivation layer.

[0055] like Figure 5 and Figure 6As shown, the first doped conductive layer 161 includes an extension portion 163 that extends and protrudes above the isolation region; the recessed structure 17 includes a second unit region 176 and a second recessed structure 177, the second unit region 176 being disposed around the second recessed structure 177, and the second recessed structure 177 penetrating the extension portion 163 to form a hole 178.

[0056] In a preferred embodiment, the back contact battery includes a passivation layer 18 surrounding the extension portion 163, and the second recessed structure 177 penetrates the extension portion 163 and the passivation layer 18 to form a hole. The passivation layer surrounding the extension portion further ensures passivation performance. In one embodiment, the width D3 of the hole is 0.1 μm to 1.5 μm, exemplarily 0.2 μm, 0.5 μm, 0.8 μm, 1 μm, 1.1 μm, or 1.4 μm, but is not limited thereto.

[0057] In addition to the above structure, the back contact battery also includes a front passivation layer, a first electrode, and a second electrode. The front passivation layer is stacked on the front side of the silicon substrate, where there is no metal electrode obstruction. The first electrode penetrates the passivation layer and contacts the first doped conductive layer, and the second electrode penetrates the passivation layer and contacts the second doped conductive layer. The first and second electrodes can be made of one or more of silver, aluminum, copper, and nickel.

[0058] In a preferred embodiment, the number of recessed structures on the side of the doped region with a different doping type from the silicon substrate is greater than or equal to the number on the side with the same doping type as the silicon substrate. This improves the conductivity of the reagents in subsequent processes, facilitates the cleaning of impurities such as metals, and thus improves the surface quality of the recessed structures. Furthermore, a greater number of recessed structures on the emitter side is beneficial for current collection. It is understood that when the silicon substrate is a P-type silicon substrate, the first doped region is an N-type doped region, and the second doped region is a P-type doped region. The P-type doped region has n1 recessed structures on the side near the isolation region, and the N-type doped region has n2 recessed structures on the side near the isolation region, where n1 ≤ n2, and preferably, n1 < n2. That is, when the silicon substrate is a P-type silicon substrate, the number of recessed structures on the side of the P-type doped region near the isolation region is less than or equal to the number on the side of the N-type doped region. Accordingly, when the silicon substrate is an N-type silicon substrate, the first doped region is a P-type doped region, and the second doped region is an N-type doped region. The P-type doped region has n1 recessed structures on the side near the isolation region, and the N-type doped region has n2 recessed structures on the side near the isolation region, where n1 ≥ n2, and preferably, n1 > n2. In other words, when the silicon substrate is an N-type silicon substrate, the number of recessed structures on the side of the P-type doped region near the isolation region is greater than or equal to the number on the side of the N-type doped region. Since the P-type doped region is the emitter, providing more recessed structures in the P-type doped region is beneficial for current collection.

[0059] Accordingly, this utility model also provides a method for preparing the above-mentioned back contact battery, comprising:

[0060] S1. Provide a silicon substrate;

[0061] Specifically, the silicon substrate can be an N-type silicon substrate or a P-type silicon substrate, and the backlight surface of the silicon substrate has an alternately arranged first region and a second region.

[0062] S2. A first doped conductive layer is formed in at least a first region of the backlight surface of the silicon substrate, and a recessed structure is formed on the surface of the first region.

[0063] The first doped conductive layer may be disposed within or on the silicon substrate. Preferably, a first tunneling layer and a first doped conductive layer are disposed in a first region on the backlight surface of the silicon substrate. The first doped conductive layer may be a P-type doped conductive layer or an N-type doped conductive layer.

[0064] In a preferred embodiment, a first tunneling layer and a first doped conductive layer are formed on the back surface of the silicon substrate. At least the portion of the first tunneling layer located in the second region is processed to remove at least the portion of the first tunneling layer located in the second region. The processing employs laser direct etching and wet etching. After processing, a recessed structure is formed on the surface of the first doped conductive layer.

[0065] S3. A second doped conductive layer is formed at least in the second region;

[0066] The second doped conductive layer can be disposed within or on the silicon substrate. Preferably, a second tunneling layer and a second doped conductive layer are disposed in a second region on the backlight surface of the silicon substrate, wherein the doping type of the second doped conductive layer is opposite to that of the first doped conductive layer.

[0067] In a preferred embodiment, a second tunneling layer and a second doped conductive layer are formed on the back surface of the silicon substrate and the first doped conductive layer. At least the portion of the second tunneling layer located on the first doped conductive layer is processed to at least remove the portion of the second tunneling layer located on the first doped conductive layer. The processing is performed by laser direct etching and wet etching. After processing, a recessed structure is formed on the surface of the first doped conductive layer.

[0068] S4. An isolation zone is formed between the first region and the second region.

[0069] In a preferred embodiment, the portion of the second tunneling layer located between the first and second regions is processed to remove the portion of the second tunneling layer located between the first and second regions, forming an isolation region. The processing employs laser direct etching and wet etching, and after processing, a recessed structure is formed on the surface of the second doped conductive layer.

[0070] Subsequently, a passivation layer is deposited on the first doped conductive layer, the second doped conductive layer, and the isolation region to form a first electrode in contact with the first doped conductive layer and a second electrode in contact with the second doped conductive layer.

[0071] The present invention will be further described below with reference to specific embodiments:

[0072] Example 1

[0073] This embodiment provides a back-contact battery, including a P-type doped region, an N-type doped region, and an isolation region disposed on the back side of an N-type silicon substrate. The P-type doped region and the N-type doped region are alternately arranged, and the isolation region is located between the P-type doped region and the N-type doped region. The P-type doped region includes a P-type doped conductive layer, and the N-type doped region includes an N-type doped conductive layer. A recessed structure is provided on the side of the P-type doped region near the isolation region.

[0074] The recessed structure includes a first recessed structure and a first unit region surrounding the first recessed structure. The first recessed structure includes a pit and a protrusion disposed within the pit. Specifically, along the direction from the light-facing surface of the silicon substrate to the backlight-facing surface, the protrusion includes a silicon substrate and a passivation layer. The sidewalls of the pit include a passivation layer. The first unit region includes a silicon substrate, a tunneling layer, a P-type doped conductive layer, and a passivation layer stacked sequentially. The width of the bottom of the protrusion is 0.1 μm to 1.5 μm, the height of the protrusion is 0.01 μm to 10 μm, the width of the pit opening is 0.1 μm to 2 μm, the depth of the pit is 0.01 μm to 10 μm, and the shape of the protrusion is pyramidal.

[0075] Example 2

[0076] This embodiment provides a back-contact battery, including a P-type doped region, an N-type doped region, and an isolation region disposed on the back side of an N-type silicon substrate. The P-type doped region and the N-type doped region are alternately arranged, and the isolation region is located between the P-type doped region and the N-type doped region. The P-type doped region includes a P-type doped conductive layer, and the N-type doped region includes an N-type doped conductive layer. A recessed structure is provided on the side of the P-type doped region near the isolation region.

[0077] The recessed structure includes a first recessed structure and a first unit region surrounding the first recessed structure. The first recessed structure includes a pit and a protrusion disposed within the pit. Specifically, along the direction from the light-facing surface of the silicon substrate to the backlight-facing surface, the protrusion includes a silicon substrate and a passivation layer, the sidewalls of the pit include a passivation layer, and the first unit region includes a silicon substrate, a tunneling layer, a P-type doped conductive layer, and a passivation layer stacked sequentially. The width of the bottom of the protrusion is 0.3 μm to 1.2 μm, the height of the protrusion is 0.05 μm to 2 μm, the width of the pit opening is 0.5 μm to 2 μm, the depth of the pit is 0.1 μm to 5 μm, and the shape of the protrusion is pyramidal.

[0078] Example 3

[0079] This embodiment provides a back-contact battery, including a P-type doped region, an N-type doped region, and an isolation region disposed on the back side of an N-type silicon substrate. The P-type doped region and the N-type doped region are alternately arranged, and the isolation region is located between the P-type doped region and the N-type doped region. The P-type doped region includes a P-type doped conductive layer, and the N-type doped region includes an N-type doped conductive layer. A recessed structure is provided on the side of the P-type doped region near the isolation region.

[0080] The recessed structure includes a first recessed structure and a first unit region surrounding the first recessed structure. The first recessed structure includes a pit and a protrusion disposed within the pit. Specifically, along the direction from the light-facing surface of the silicon substrate to the backlight-facing surface, the protrusion includes a silicon substrate and a passivation layer, the sidewalls of the pit include a passivation layer, and the first unit region includes a silicon substrate, a tunneling layer, a P-type doped conductive layer, and a passivation layer stacked sequentially. The width of the bottom of the protrusion is 0.3 μm to 1.2 μm, the height of the protrusion is 0.05 μm to 2 μm, the width of the pit opening is 0.5 μm to 2 μm, the depth of the pit is 0.1 μm to 5 μm, and the shape of the protrusion is pyramidal.

[0081] The P-type doped conductive layer includes an extension that protrudes above the isolation region. The recessed structure also includes a second recessed structure and a second unit region disposed around the second recessed structure. The second recessed structure penetrates the extension to form a hole with a width of 0.1 μm to 1.5 μm.

[0082] Example 4

[0083] This embodiment provides a back-contact battery, including a P-type doped region, an N-type doped region, and an isolation region disposed on the back side of an N-type silicon substrate. The P-type doped region and the N-type doped region are alternately arranged, and the isolation region is located between the P-type doped region and the N-type doped region. The P-type doped region includes a P-type doped conductive layer, and the N-type doped region includes an N-type doped conductive layer. A recessed structure is provided on the side of the P-type doped region near the isolation region.

[0084] The recessed structure includes a first recessed structure and a first unit region surrounding the first recessed structure. The first recessed structure includes a pit and a protrusion disposed within the pit. Specifically, along the direction from the light-facing surface of the silicon substrate to the backlight-facing surface, the protrusion includes a silicon substrate and a passivation layer, the sidewalls of the pit include a passivation layer, and the first unit region includes a silicon substrate, a tunneling layer, a P-type doped conductive layer, and a passivation layer stacked sequentially. The width of the bottom of the protrusion is 0.3 μm to 1.2 μm, the height of the protrusion is 0.05 μm to 2 μm, the width of the pit opening is 0.5 μm to 2 μm, the depth of the pit is 0.1 μm to 5 μm, and the shape of the protrusion is pyramidal.

[0085] The P-type doped conductive layer includes an extension that protrudes above the isolation region. The recessed structure also includes a second recessed structure and a second unit region disposed around the second recessed structure. The second recessed structure penetrates the extension to form a hole with a width of 0.5 μm to 0.8 μm.

[0086] Example 5

[0087] This embodiment provides a back contact battery, including a P-type doped region, an N-type doped region, and an isolation region disposed on the back side of an N-type silicon substrate. The P-type doped region and the N-type doped region are alternately disposed, and the isolation region is located between the P-type doped region and the N-type doped region. The P-type doped region includes a P-type doped conductive layer, and the N-type doped region includes an N-type doped conductive layer.

[0088] The P-type doped region has a recessed structure on the side near the isolation region.

[0089] The recessed structure includes a first recessed structure and a first unit region surrounding the first recessed structure. The first recessed structure includes a pit and a protrusion disposed within the pit. Specifically, along the direction from the light-facing surface of the silicon substrate to the backlight-facing surface, the protrusion includes a silicon substrate and a passivation layer, the sidewalls of the pit include a passivation layer, and the first unit region includes a silicon substrate, a tunneling layer, a P-type doped conductive layer, and a passivation layer stacked sequentially. The width of the bottom of the protrusion is 0.3 μm to 1.2 μm, the height of the protrusion is 0.05 μm to 2 μm, the width of the pit opening is 0.5 μm to 2 μm, the depth of the pit is 0.1 μm to 5 μm, and the shape of the protrusion is pyramidal.

[0090] The P-type doped conductive layer includes an extension that protrudes above the isolation region. The recessed structure also includes a second recessed structure and a second unit region disposed around the second recessed structure. The second recessed structure penetrates the extension to form a hole with a width of 0.5 μm to 0.8 μm.

[0091] A first recessed structure is also provided on the side of the N-type doped region near the isolation region. The number of first recessed structures in the N-type doped region is less than the number of first recessed structures in the P-type doped region. Everything else is the same as in Example 1.

[0092] The back contact battery printed electrodes prepared in Examples 1 to 5 were sintered and then annealed to obtain finished solar cells. The photoelectric conversion efficiency of the finished solar cells was measured, and the results are shown in the table below.

[0093] Photoelectric conversion efficiency Example 1 26.68％ Example 2 26.72％ Example 3 26.75％ Example 4 26.77％ Example 5 26.79％

[0094] The above description is the preferred embodiment of this utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this utility model, and these improvements and modifications are also considered to be within the protection scope of this utility model.

Claims

1. A back-contact battery, characterized in that, It includes a first region, a second region, and an isolation region disposed on the back surface of a silicon substrate. The first region and the second region are alternately disposed, and the isolation region is located between the first region and the second region. The first region includes a first doped conductive layer, and the second region includes a second doped conductive layer. The doping types of the first doped conductive layer and the second doped conductive layer are opposite. The first region has a recessed structure on the side closest to the isolation zone.

2. The back contact battery as described in claim 1, characterized in that, The first region has a discontinuous recessed structure on the side closest to the isolation zone.

3. The back contact battery as described in claim 1, characterized in that, The second region has a recessed structure on the side closest to the isolation zone.

4. The back contact battery as described in claim 3, characterized in that, The second region has a discontinuous recessed structure on the side near the isolation zone.

5. The back contact battery as described in any one of claims 1 to 4, characterized in that, The recessed structure includes a first unit region and a first recessed structure. The first unit region is disposed around the first recessed structure. The first recessed structure includes a pit and a protrusion disposed in the pit.

6. The back contact battery as described in claim 5, characterized in that, The height of the protrusion is less than or equal to the depth of the depression.

7. The back contact battery as described in claim 5, characterized in that, The shape of the protrusion includes pyramidal and / or frustum-shaped.

8. The back contact battery as described in claim 5, characterized in that, The silicon substrate includes a light-facing surface and a back-light-facing surface disposed opposite to each other. Along the direction from the light-facing surface toward the back-light-facing surface, the protrusion includes a silicon substrate and a passivation layer, and the sidewall of the pit includes a passivation layer.

9. The back contact battery as described in claim 8, characterized in that, Along the direction from the light-facing surface to the backlight surface, the first unit region includes a silicon substrate, a tunneling layer, a doped conductive layer, and a passivation layer, which are stacked sequentially.

10. The back contact battery as described in claim 9, characterized in that, The passivation layer includes one or more of the following: aluminum oxide layer, silicon nitride layer, silicon oxide layer, and silicon oxynitride layer.

11. The back contact battery as described in claim 9, characterized in that, The tunneling layer includes one or more of the following: silicon oxide layer, silicon carbide layer, silicon nitride layer, and aluminum oxide layer.

12. The back contact battery as described in claim 5, characterized in that, The width of the bottom of the protrusion is 0.1μm to 1.5μm, and the height of the protrusion is 0.01μm to 10μm.

13. The back contact battery as described in claim 5, characterized in that, The width of the opening of the pit is 0.1μm to 2μm, and the depth of the pit is 0.01μm to 10μm.

14. The back contact battery according to any one of claims 1 to 4, characterized in that, The first doped conductive layer includes an extension that protrudes over the isolation region; The recessed structure includes a second unit region and a second recessed structure. The second unit region is arranged around the second recessed structure, and the second recessed structure penetrates the extension portion to form a hole.

15. The back contact battery as described in claim 14, characterized in that, The back contact battery includes a passivation layer surrounding the extension portion, and the second recessed structure penetrates the extension portion and the passivation layer to form a hole.

16. The back contact battery as described in claim 15, characterized in that, The width of the hole is 0.1μm to 1.5μm.

17. The back contact battery as described in claim 2 or 4, characterized in that, Multiple recessed structures form an isolation transition region, the width of which is 5μm to 30μm.

18. The back contact battery as claimed in claim 17, characterized in that, The width of the isolation transition zone is 10μm to 15μm.

19. The back contact battery as claimed in claim 1, characterized in that, When the silicon substrate is an N-type silicon substrate, the first region is a P-type doped region and the second region is an N-type doped region. The P-type doped region has n1 recessed structures on the side near the isolation region and the N-type doped region has n2 recessed structures on the side near the isolation region, where n1 ≥ n2.

20. The back contact battery as claimed in claim 1, characterized in that, When the silicon substrate is a P-type silicon substrate, the first region is an N-type doped region and the second region is a P-type doped region. The P-type doped region has n1 recessed structures on the side near the isolation region and the N-type doped region has n2 recessed structures on the side near the isolation region, where n1≤n2.

21. A photovoltaic module, characterized in that, Includes the back contact battery as described in any one of claims 1 to 20.

22. A photovoltaic system, characterized in that, Including the photovoltaic module as described in claim 21.

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