Power battery peak power test system
By designing a peak power testing system for power batteries, the problem of incomplete performance evaluation of power batteries in existing technologies has been solved, enabling comprehensive testing of power batteries under different conditions and providing more comprehensive test results.
Patent Information
- Application Number
- CN202422776183.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-14
- Publication Date
- 2025-11-04
- Estimated Expiration
- 2034-11-14
AI Technical Summary
Existing technologies lack effective and systematic methods for testing the peak power of power batteries, making it difficult to comprehensively evaluate the performance of power batteries under different conditions.
A peak power testing system for power batteries was designed, including a timing module, a pulse generation module, an adjustable signal amplification module, and a data acquisition module. By generating and adjusting pulse signals, combined with temperature, voltage, and current measurements, a comprehensive test of the power battery can be achieved.
It enables the evaluation of peak power of power batteries under different conditions, provides more comprehensive test results, and improves the practicality and accuracy of the test.
Smart Images

Figure CN223513321U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of power battery testing technology, and more specifically, to a power battery peak power testing system. Background Technology
[0002] A power battery is a type of battery specifically designed to provide power for various electric vehicles and equipment. It is a core component of green travel solutions such as electric vehicles, electric bicycles, and electric trains. Its characteristics include high energy density, high power output, and the ability to meet long driving range requirements. It typically uses advanced lithium-ion battery technology, such as ternary lithium batteries, which use high-energy compounds as positive electrode materials and carbon materials as negative electrodes that can intercalate lithium ions. Energy conversion during the charging and discharging process is achieved through an electrolyte.
[0003] After the power battery is manufactured, its power needs to be tested. HPPC testing is often used to evaluate the performance of the power battery. The HPPC testing steps include preprocessing, pulse testing, and measurement data. Utility Model Content
[0004] The purpose of this invention is to provide a power battery peak power testing system to solve the problems mentioned in the background art.
[0005] To achieve the above objectives, this utility model provides the following technical solution:
[0006] A power battery peak power testing system includes a timing module, a pulse generation module, an adjustable signal amplification module, a power battery, and a data acquisition module connected in sequence. The timing module controls the duration of the emitted pulse signal and the interval between two emitted pulse signals. The pulse generation module generates the pulse signal, and the adjustable signal amplification module changes the amplitude of the pulse signal. The data acquisition module includes a temperature measurement module, a voltage measurement module, a current measurement module, a data processing module, and a display module. The temperature measurement module measures the operating temperature of the power battery, the voltage measurement module measures the operating voltage of the power battery, and the current measurement module measures the operating current of the power battery.
[0007] Preferably, the pulse generation module includes a 555 timer chip, a first resistor R1, a second resistor R2, and a first capacitor C1;
[0008] The first terminal of the first resistor R1 is connected to the power supply VCC. The second terminal of the first resistor R1 is connected to the first terminal of the second resistor R2. The second terminal of the second resistor R2 is connected to the first terminal of the first capacitor C1. The second terminal of the first capacitor C1 is grounded. Pin 1 of the 555 timer chip is grounded. Pin 2 of the 555 timer chip is connected to the second terminal of the second resistor R2. Pin 4 of the 555 timer chip is connected to the timing module. Pin 6 of the 555 timer chip is connected to the second terminal of the second resistor R2. Pin 7 of the 555 timer chip is connected to the first terminal of the second resistor R2. Pin 8 of the 555 timer chip is connected to the power supply VCC.
[0009] Preferably, the adjustable signal amplification module includes a third resistor R3, a fourth resistor R4, a first operational amplifier U1, a first potentiometer RP1, a fifth resistor R5, a sixth resistor R6, a second operational amplifier U2, and a second potentiometer RP2.
[0010] The first terminal of the third resistor R3 is connected to pin 3 of the 555 timer chip, and the second terminal of the third resistor R3 is connected to the non-inverting input of the first operational amplifier U1. The first terminal of the fourth resistor R4 is grounded, and the second terminal of the fourth resistor R4 is connected to the inverting input of the first operational amplifier U1. The first terminal of the first potentiometer RP1 is connected to the inverting input of the first operational amplifier U1, and the second terminal of the first potentiometer RP1 is connected to the output of the first operational amplifier U1. The movable terminal of the first potentiometer RP1 is connected to the output of the first operational amplifier U1. The first terminal of the fifth resistor R5 is connected to the output of the first potentiometer RP1, and the second terminal of the fifth resistor R5 is connected to the non-inverting input of the second operational amplifier U2. The first terminal of the sixth resistor R6 is grounded, and the second terminal of the sixth resistor R6 is connected to the inverting input of the second operational amplifier U2. The first terminal of the second potentiometer RP2 is connected to the inverting input of the second operational amplifier U2, and the second terminal of the second operational amplifier U2 is connected to the output of the second operational amplifier U2. The movable terminal of the second potentiometer RP2 is connected to the output of the second operational amplifier U2.
[0011] Preferably, the voltage measurement module includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a second capacitor C2, a third operational amplifier U3, a ninth resistor R9, a third capacitor C3, and a first AD sampling module;
[0012] The first terminal of the sixth resistor R6 is connected to the first output terminal of the power battery; the second terminal of the sixth resistor R6 is connected to the first terminal of the seventh resistor R7; the second terminal of the seventh resistor R7 is connected to the second output terminal of the power battery; the first terminal of the eighth resistor R8 is connected to the second terminal of the sixth resistor R6; the second terminal of the eighth resistor R8 is connected to the non-inverting input terminal of the third operational amplifier U3; the first terminal of the second capacitor C2 is connected to the second terminal of the eighth resistor R8; the inverting input terminal of the third operational amplifier U3 is connected to the output terminal of the third operational amplifier U3; the first terminal of the ninth resistor R9 is connected to the output terminal of the third operational amplifier U3; the second terminal of the ninth resistor R9 is connected to the first AD sampling module; the first terminal of the third capacitor C3 is connected to the second terminal of the ninth resistor R9; and the second terminal of the third capacitor C3 is grounded.
[0013] Preferably, the current measurement module includes a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourth operational amplifier U4, a fourteenth resistor R14, a fourth capacitor C4, and a second AD sampling module.
[0014] The first terminal of the tenth resistor R10 is connected to the first terminal of the sixth resistor R6, and the second terminal of the tenth resistor R10 is connected to the non-inverting input terminal of the fourth operational amplifier U4. The first terminal of the eleventh resistor R11 is connected to the second terminal of the sixth resistor R6, and the second terminal of the eleventh resistor R11 is connected to the inverting input terminal of the fourth operational amplifier U4. The first terminal of the twelfth resistor R12 is grounded, and the second terminal of the twelfth resistor R12 is connected to the second terminal of the tenth resistor R10. The first terminal of the thirteenth resistor R13 is connected to the second terminal of the eleventh resistor R11, and the second terminal of the thirteenth resistor R13 is connected to the output terminal of the fourth operational amplifier U4. The first terminal of the fourteenth resistor R14 is connected to the output terminal of the fourth operational amplifier U4, and the second terminal of the fourteenth resistor R14 is connected to the second AD sampling module. The first terminal of the fourth capacitor C4 is connected to the second terminal of the fourteenth resistor R14, and the second terminal of the fourth capacitor C4 is grounded.
[0015] Preferably, the temperature measurement module, the voltage measurement module, and the current measurement module are all electrically connected to the data processing module, and the data processing module is also electrically connected to the display module.
[0016] Preferably, the system also includes an adjustable temperature control module for maintaining a constant ambient temperature.
[0017] Compared with the prior art, the beneficial effects of this utility model are:
[0018] In this invention, a pulse generation module generates a pulse signal, and an adjustable signal amplification module is used to change the amplitude of the pulse to simulate load changes in actual use. Finally, a data acquisition module is used to collect parameters, which makes it easier to understand the peak power of the power battery and enhances its practicality. Attached Figure Description
[0019] Figure 1 This is a schematic diagram of the overall structure of the utility model;
[0020] Figure 2 This is a schematic diagram of the pulse generation module in the utility model.
[0021] Figure 3 This is a schematic diagram of the adjustable signal amplification module in the utility model;
[0022] Figure 4 This is a schematic diagram of the data acquisition module in the utility model.
[0023] Figure 5 This is a schematic diagram of the voltage measurement module in the utility model.
[0024] Figure 6 This is a schematic diagram of the current measurement module in the utility model.
[0025] In the picture:
[0026] 1. Timer module;
[0027] 2. Pulse generation module;
[0028] 3. Adjustable signal amplification module;
[0029] 4. Power battery;
[0030] 5. Data acquisition module; 50. Temperature measurement module; 51. Voltage measurement module; 52. Current measurement module; 53. Data processing module; 54. Display module;
[0031] 6. Adjustable constant temperature module. Implementation
[0032] The technical solutions of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.
[0033] Please see Figures 1-6 The present invention provides the following technical solution:
[0034] A power battery peak power testing system includes a timing module 1, a pulse generation module 2, an adjustable signal amplification module 3, a power battery 4, and a data acquisition module 5 connected in sequence. The timing module 1 controls the duration of the emitted pulse signal and the interval between two emitted pulse signals. The pulse generation module 2 generates the pulse signal, and the adjustable signal amplification module 3 changes the amplitude of the pulse signal. The data acquisition module 5 includes a temperature measurement module 50, a voltage measurement module 51, a current measurement module 52, a data processing module 53, and a display module 54. The temperature measurement module 50 measures the operating temperature of the power battery 4, the voltage measurement module 51 measures the operating voltage of the power battery 4, and the current measurement module 52 measures the operating current of the power battery 4. Both the timing module 1 and the data processing module 53 can use common 51 series and STM32 series microcontrollers, allowing for changes in conditions to measure the output of the power battery 4, resulting in more comprehensive and practical results.
[0035] In this embodiment, the pulse generation module 2 includes a 555 timer chip, a first resistor R1, a second resistor R2, and a first capacitor C1. The pulse generation module 2 is a gated multivibrator circuit. When pin 4 of the 555 timer chip is high, pin 3 of the 555 timer chip outputs a square wave pulse signal. When pin 4 of the 555 timer chip is low, pin 3 of the 555 timer chip does not output a signal. The timing module 1 controls the time for the pulse generation module 2 to generate the square wave pulse signal.
[0036] The first terminal of the first resistor R1 is connected to the power supply VCC. The second terminal of the first resistor R1 is connected to the first terminal of the second resistor R2. The second terminal of the second resistor R2 is connected to the first terminal of the first capacitor C1. The second terminal of the first capacitor C1 is grounded. Pin 1 of the 555 timer chip is grounded. Pin 2 of the 555 timer chip is connected to the second terminal of the second resistor R2. Pin 4 of the 555 timer chip is connected to timing module 1. Pin 6 of the 555 timer chip is connected to the second terminal of the second resistor R2. Pin 7 of the 555 timer chip is connected to the first terminal of the second resistor R2. Pin 8 of the 555 timer chip is connected to the power supply VCC.
[0037] Specifically, the adjustable signal amplification module 3 includes a third resistor R3, a fourth resistor R4, a first operational amplifier U1, a first potentiometer RP1, a fifth resistor R5, a sixth resistor R6, a second operational amplifier U2, and a second potentiometer RP2. Let the voltage at the non-inverting input terminal of the first operational amplifier U1 be U1, then the voltage U2 at the output terminal of the first operational amplifier U1 is calculated as U2 = (1 + RP1 / R4)U1, and the voltage U3 at the output terminal of the second operational amplifier U2 is calculated as U3 = (1 + RP2 / R6)U2.
[0038] The first terminal of the third resistor R3 is connected to pin 3 of the 555 timer chip, and the second terminal of the third resistor R3 is connected to the non-inverting input of the first operational amplifier U1. The first terminal of the fourth resistor R4 is grounded, and the second terminal of the fourth resistor R4 is connected to the inverting input of the first operational amplifier U1. The first terminal of the first potentiometer RP1 is connected to the inverting input of the first operational amplifier U1, and the second terminal of the first potentiometer RP1 is connected to the output of the first operational amplifier U1. The movable terminal of the first potentiometer RP1 is connected to the output of the first operational amplifier U1. The first terminal of the fifth resistor R5 is connected to the output of the first potentiometer RP1, and the second terminal of the fifth resistor R5 is connected to the non-inverting input of the second operational amplifier U2. The first terminal of the sixth resistor R6 is grounded, and the second terminal of the sixth resistor R6 is connected to the inverting input of the second operational amplifier U2. The first terminal of the second potentiometer RP2 is connected to the inverting input of the second operational amplifier U2, and the second terminal of the second operational amplifier U2 is connected to the output of the second operational amplifier U2. The movable terminal of the second potentiometer RP2 is connected to the output of the second operational amplifier U2.
[0039] Furthermore, the voltage measurement module 51 includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a second capacitor C2, a third operational amplifier U3, a ninth resistor R9, a third capacitor C3, and a first AD sampling module. The sixth resistor R6 and the seventh resistor R7 serve as sampling resistors, and the voltage is sampled by filtering, voltage tracking, and filtering in sequence.
[0040] The first terminal of the sixth resistor R6 is connected to the first output terminal of the power battery 4. The second terminal of the sixth resistor R6 is connected to the first terminal of the seventh resistor R7. The second terminal of the seventh resistor R7 is connected to the second output terminal of the power battery 4. The first terminal of the eighth resistor R8 is connected to the second terminal of the sixth resistor R6. The second terminal of the eighth resistor R8 is connected to the non-inverting input terminal of the third operational amplifier U3. The first terminal of the second capacitor C2 is connected to the second terminal of the eighth resistor R8. The inverting input terminal of the third operational amplifier U3 is connected to the output terminal of the third operational amplifier U3. The first terminal of the ninth resistor R9 is connected to the output terminal of the third operational amplifier U3. The second terminal of the ninth resistor R9 is connected to the first AD sampling module. The first terminal of the third capacitor C3 is connected to the second terminal of the ninth resistor R9. The second terminal of the third capacitor C3 is grounded.
[0041] In addition, the current measurement module 52 includes a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourth operational amplifier U4, a fourteenth resistor R14, a fourth capacitor C4, and a second AD sampling module. The tenth resistor R10, the eleventh resistor R11, the twelfth resistor R12, the thirteenth resistor R13, and the fourth operational amplifier U4 form a differential circuit, and the fourteenth resistor R14 and the fourth capacitor C4 form a filter circuit.
[0042] The first terminal of the tenth resistor R10 is connected to the first terminal of the sixth resistor R6, and the second terminal of the tenth resistor R10 is connected to the non-inverting input terminal of the fourth operational amplifier U4. The first terminal of the eleventh resistor R11 is connected to the second terminal of the sixth resistor R6, and the second terminal of the eleventh resistor R11 is connected to the inverting input terminal of the fourth operational amplifier U4. The first terminal of the twelfth resistor R12 is grounded, and the second terminal of the twelfth resistor R12 is connected to the second terminal of the tenth resistor R10. The first terminal of the thirteenth resistor R13 is connected to the second terminal of the eleventh resistor R11, and the second terminal of the thirteenth resistor R13 is connected to the output terminal of the fourth operational amplifier U4. The first terminal of the fourteenth resistor R14 is connected to the output terminal of the fourth operational amplifier U4, and the second terminal of the fourteenth resistor R14 is connected to the second AD sampling module. The first terminal of the fourth capacitor C4 is connected to the second terminal of the fourteenth resistor R14, and the second terminal of the fourth capacitor C4 is grounded.
[0043] It is worth noting that the temperature measurement module 50, voltage measurement module 51, and current measurement module 52 are all electrically connected to the data processing module 53, which is also electrically connected to the display module 54 for easy and timely monitoring.
[0044] It is worth noting that it also includes an adjustable temperature control module 6, which is used to keep the ambient temperature constant and to simulate different ambient temperatures.
[0045] When using the power battery peak power testing system of this utility model, the power battery 4 is fully charged and left to stand for a period of time to ensure that the power battery 4 is in a stable state. The timing module 1 controls the pulse generation module 2 to generate a pulse signal. The pulse generation module 2 is a gated multivibrator circuit. When the 4th pin of the 555 timer chip is at a high level, the 3rd pin of the 555 timer chip outputs a square wave signal. When the 4th pin of the 555 timer chip is at a low level, the 3rd pin of the 555 timer chip does not output. Then, the resistance values of the first potentiometer RP1 and the second potentiometer RP2 are adjusted to change the amplitude of the square wave signal. Finally, the temperature measurement module 50, the voltage measurement module 51 and the current measurement module 52 measure the working data of the power battery 4.
[0046] The timing module 1 controls the pulse generation module 2 to generate a square wave pulse signal for 10 seconds, and changes the amplitude of the square wave pulse signal through the adjustable signal amplification module 3. After one experiment, the signal is left to stand for about 1 hour before the next experiment is conducted. The operating temperature, output voltage and output current of the power battery 4 are measured under different capacities, different ambient temperatures and different square wave pulse signal amplitudes, and the peak power of the power battery 4 under different conditions is calculated.
[0047] The foregoing has shown and described the basic principles, main features, and advantages of this utility model. Those skilled in the art should understand that this utility model is not limited to the above embodiments. The embodiments and descriptions in the specification are merely preferred examples and are not intended to limit the utility model. Various changes and modifications can be made to this utility model without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed utility model. The scope of protection of this utility model is defined by the appended claims and their equivalents.
Claims
1. A power battery peak power testing system, comprising a timing module (1), a pulse generation module (2), an adjustable signal amplification module (3), a power battery (4), and a data acquisition module (5) connected in sequence, characterized in that: The timing module (1) is used to control the duration of the pulse signal and the interval between two pulse signals. The pulse generation module (2) is used to generate the pulse signal. The adjustable signal amplification module (3) is used to change the amplitude of the pulse signal. The data acquisition module (5) includes a temperature measurement module (50), a voltage measurement module (51), a current measurement module (52), a data processing module (53), and a display module (54). The temperature measurement module (50) is used to measure the operating temperature of the power battery (4). The voltage measurement module (51) is used to measure the operating voltage of the power battery (4). The current measurement module (52) is used to measure the operating current of the power battery (4).
2. The power battery peak power testing system according to claim 1, characterized in that: The pulse generation module (2) includes a 555 timer chip, a first resistor R1, a second resistor R2, and a first capacitor C1; The first end of the first resistor R1 is connected to the power supply VCC. The second end of the first resistor R1 is connected to the first end of the second resistor R2. The second end of the second resistor R2 is connected to the first end of the first capacitor C1. The second end of the first capacitor C1 is grounded. Pin 1 of the 555 timer chip is grounded. Pin 2 of the 555 timer chip is connected to the second end of the second resistor R2. Pin 4 of the 555 timer chip is connected to the timing module (1). Pin 6 of the 555 timer chip is connected to the second end of the second resistor R2. Pin 7 of the 555 timer chip is connected to the first end of the second resistor R2. Pin 8 of the 555 timer chip is connected to the power supply VCC.
3. The power battery peak power testing system according to claim 1, characterized in that: The adjustable signal amplification module (3) includes a third resistor R3, a fourth resistor R4, a first operational amplifier U1, a first potentiometer RP1, a fifth resistor R5, a sixth resistor R6, a second operational amplifier U2, and a second potentiometer RP2; The first terminal of the third resistor R3 is connected to pin 3 of the 555 timer chip, and the second terminal of the third resistor R3 is connected to the non-inverting input of the first operational amplifier U1. The first terminal of the fourth resistor R4 is grounded, and the second terminal of the fourth resistor R4 is connected to the inverting input of the first operational amplifier U1. The first terminal of the first potentiometer RP1 is connected to the inverting input of the first operational amplifier U1, and the second terminal of the first potentiometer RP1 is connected to the output of the first operational amplifier U1. The movable terminal of the first potentiometer RP1 is connected to the output of the first operational amplifier U1. The first terminal of the fifth resistor R5 is connected to the output of the first potentiometer RP1, and the second terminal of the fifth resistor R5 is connected to the non-inverting input of the second operational amplifier U2. The first terminal of the sixth resistor R6 is grounded, and the second terminal of the sixth resistor R6 is connected to the inverting input of the second operational amplifier U2. The first terminal of the second potentiometer RP2 is connected to the inverting input of the second operational amplifier U2, and the second terminal of the second operational amplifier U2 is connected to the output of the second operational amplifier U2. The movable terminal of the second potentiometer RP2 is connected to the output of the second operational amplifier U2.
4. The power battery peak power testing system according to claim 1, characterized in that: The voltage measurement module (51) includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a second capacitor C2, a third operational amplifier U3, a ninth resistor R9, a third capacitor C3, and a first AD sampling module; The first end of the sixth resistor R6 is connected to the first output terminal of the power battery (4), the second end of the sixth resistor R6 is connected to the first end of the seventh resistor R7, the second end of the seventh resistor R7 is connected to the second output terminal of the power battery (4), the first end of the eighth resistor R8 is connected to the second end of the sixth resistor R6, the second end of the eighth resistor R8 is connected to the non-inverting input terminal of the third operational amplifier U3, the first end of the second capacitor C2 is connected to the second end of the eighth resistor R8, the inverting input terminal of the third operational amplifier U3 is connected to the output terminal of the third operational amplifier U3, the first end of the ninth resistor R9 is connected to the output terminal of the third operational amplifier U3, the second end of the ninth resistor R9 is connected to the first AD sampling module, the first end of the third capacitor C3 is connected to the second end of the ninth resistor R9, and the second end of the third capacitor C3 is grounded.
5. The power battery peak power testing system according to claim 1, characterized in that: The current measurement module (52) includes a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourth operational amplifier U4, a fourteenth resistor R14, a fourth capacitor C4, and a second AD sampling module. The first terminal of the tenth resistor R10 is connected to the first terminal of the sixth resistor R6, and the second terminal of the tenth resistor R10 is connected to the non-inverting input terminal of the fourth operational amplifier U4. The first terminal of the eleventh resistor R11 is connected to the second terminal of the sixth resistor R6, and the second terminal of the eleventh resistor R11 is connected to the inverting input terminal of the fourth operational amplifier U4. The first terminal of the twelfth resistor R12 is grounded, and the second terminal of the twelfth resistor R12 is connected to the second terminal of the tenth resistor R10. The first terminal of the thirteenth resistor R13 is connected to the second terminal of the eleventh resistor R11, and the second terminal of the thirteenth resistor R13 is connected to the output terminal of the fourth operational amplifier U4. The first terminal of the fourteenth resistor R14 is connected to the output terminal of the fourth operational amplifier U4, and the second terminal of the fourteenth resistor R14 is connected to the second AD sampling module. The first terminal of the fourth capacitor C4 is connected to the second terminal of the fourteenth resistor R14, and the second terminal of the fourth capacitor C4 is grounded.
6. The power battery peak power testing system according to claim 1, characterized in that: The temperature measurement module (50), the voltage measurement module (51) and the current measurement module (52) are all electrically connected to the data processing module (53), and the data processing module (53) is also electrically connected to the display module (54).
7. The power battery peak power testing system according to claim 1, characterized in that: It also includes an adjustable temperature control module (6), which is used to maintain a constant ambient temperature.