Semiconductor packaging structure

Abstract

According to the semiconductor packaging structure provided by the invention, each chip is mounted on a base island, the base island is connected with the edge of a metal frame through a first frame connecting rib, and a first pin bonding pad is connected with the edge of the metal frame through a second frame connecting rib. And the pin bonding pad and the base island which are transversely cut for the first time are still conducted with the edge of the frame to realize electroplating. Compared with a traditional two-time electroplating process, the technological process of one-time electroplating treatment is simplified, side edge electroplating is achieved, the production efficiency is improved, and the production cost is reduced.

Description

Technical Field

[0001] This application belongs to the field of semiconductor technology, and in particular relates to a semiconductor packaging structure. Background Technology

[0002] The wettable flank process for DFN packages needs to effectively cover the exposed copper on the sides of the molded enclosure to provide reliable solder quality and testability during surface mounting. Current wettable flank processes typically involve multiple plating steps and complex cutting operations between plating cycles, resulting in a lengthy overall process that increases manufacturing costs and production time. Therefore, a packaging structure is needed to simplify the wettable flank process, reducing process steps and costs while maintaining product quality. Summary of the Invention

[0003] This application aims to solve or alleviate the technical problems existing in the prior art.

[0004] This application proposes a semiconductor packaging structure, including: a metal frame;

[0005] The metal frame includes multiple molding compound units, and each molding compound unit includes a chip;

[0006] Each of the molding compound units has a first pin pad on one side of its long side and a second pin pad on the other side of its long side. A third pin pad is provided between the first pin pad and the second pin pad.

[0007] Each chip is mounted on a base island, and the base island is connected to the edge of the metal frame via a first frame connecting rib. The first pin pad is connected to the edge of the metal frame via a second frame connecting rib.

[0008] In a preferred embodiment of this application, the number of the first pin pads is greater than the number of the second pin pads, the number of the third pin pads is less than the number of the first pin pads, and the number of the third pin pads is the same as the number of the second pin pads.

[0009] In a preferred embodiment of this application, there are two first pin pads, and one second pin pad and one third pin pad.

[0010] In a preferred embodiment of this application, the edge of the third pin pad has a notch.

[0011] In a preferred embodiment of this application, the cross-section of the third pin pad is larger than the cross-section of the first pin pad and the second pin pad.

[0012] In a preferred embodiment of this application, the thickness of the metal frame is 75um-125um, the thickness of the first frame connecting rib and the second frame connecting rib is 25um-75um, and the long side of the molding unit is 1050-1150um and the short side is 950-1050um.

[0013] Compared to existing technologies, the packaging structure provided in this application places each chip onto a base island. The base island is connected to the edge of the metal frame via a first frame connecting rib, and the first pin pad is connected to the edge of the metal frame via a second frame connecting rib. This ensures that the pin pads and base island remain electrically connected to the frame edge after the first lateral cut, enabling electroplating. Compared to traditional two-stage electroplating processes, this method simplifies the process flow to a single electroplating step, achieving side electroplating, improving production efficiency, and reducing production costs. Attached Figure Description

[0014] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. Some specific embodiments of this application will be described in detail below with reference to the accompanying drawings in an exemplary and non-limiting manner. The same reference numerals in the drawings designate the same or similar parts or components. Those skilled in the art should understand that these drawings are not necessarily drawn to scale. In the drawings:

[0015] Figure 1 This is a schematic diagram of the structure of a semiconductor package provided in an embodiment of this application;

[0016] Figure 2 This is a schematic diagram of the structure of the diced semiconductor package provided in the embodiments of this application; Detailed Implementation

[0017] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are merely some, not all, of the embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without creative effort should fall within the scope of protection of the present application.

[0018] like Figure 1 As shown, this application provides a semiconductor packaging structure, including: a metal frame 5;

[0019] The metal frame 5 includes a plurality of molding compound units 1, and each molding compound unit 1 includes a chip;

[0020] Each of the molding compound units 1 has a first pin pad 2 on one side of its long side, and a second pin pad 3 on the other side of its long side. A third pin pad 4 is provided between the first pin pad 2 and the second pin pad 3.

[0021] Each chip is mounted onto the base island 8, and the base island 8 is connected to the edge of the metal frame 5 through the first frame connecting rib 6. Each of the first pin pad 2, the second pin pad 3, and the third pin pad 4 is connected to the edge of the metal frame 5 through the second frame connecting rib 7.

[0022] In this embodiment, both the first frame connecting rib 6 and the second frame connecting rib 7 are made of metal.

[0023] In a preferred embodiment of this application, the number of the first pin pads 2 is greater than the number of the second pin pads 3, the number of the third pin pads 4 is less than the number of the first pin pads 2, and the number of the third pin pads 4 is the same as the number of the second pin pads 3.

[0024] In a preferred embodiment of this application, there are two first pin pads 2, and one second pin pad 3 and one third pin pad 4.

[0025] In a preferred embodiment of this application, the edge of the third pin pad 4 has a notch.

[0026] In a preferred embodiment of this application, the cross-section of the third pin pad 4 is larger than the cross-section of the first pin pad 2 and the second pin pad 3.

[0027] In a preferred embodiment of this application, the thickness of the metal frame 5 is 75um-125umm, the thickness of the first frame connecting rib 6 and the second frame connecting rib 7 is 25um-75um, and the long side of the molding unit is 1050-1150um and the short side is 950-1050um.

[0028] The packaging structure provided in this application involves mounting each chip onto a base island. The base island is connected to the edge of the metal frame via a first frame connecting rib, and the first pin pad is connected to the edge of the metal frame via a second frame connecting rib. This ensures that the pin pads and base island remain electrically connected to the frame edge after the first lateral cut, enabling electroplating. Compared to traditional two-stage electroplating processes, this method simplifies the process flow to a single electroplating step, achieving side electroplating, improving production efficiency, and reducing production costs.

[0029] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A semiconductor packaging structure, characterized in that, include: Metal frame; The metal frame includes multiple molding compound units, and each molding compound unit includes a chip; Each of the molded components has a first pin pad on one side of its long side, and a second pin pad on the other side of its long side. A third pin pad is provided between the first pin pad and the second pin pad. Each chip is set on a base island, and the base island is connected to the edge of the metal frame through a first frame connecting rib, and the first pin pad is connected to the edge of the metal frame through a second frame connecting rib.

2. The semiconductor packaging structure as described in claim 1, characterized in that, The number of the first pin pads is greater than the number of the second pin pads, the number of the third pin pads is less than the number of the first pin pads, and the number of the third pin pads is the same as the number of the second pin pads.

3. A semiconductor packaging structure as described in claim 1, characterized in that, There are two first pin pads, and one second pin pad and one third pin pad.

4. A semiconductor packaging structure as described in claim 3, characterized in that, The edge of the third pin pad has a notch.

5. A semiconductor packaging structure as described in claim 3, characterized in that, The cross-section of the third pin pad is larger than that of the first pin pad and the second pin pad.

6. A semiconductor packaging structure as described in any one of claims 1 to 5, characterized in that, The thickness of the metal frame is 75um-125umm, the thickness of the first frame connecting rib and the second frame connecting rib is 25um-75um, and the long side of the molding unit is 1050-1150um and the short side is 950-1050um.

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