Solar cell structure
By employing a multilayer passivation and antireflection structure with alternating n-type doped microcrystalline silicon and n-type highly doped polycrystalline silicon layers in TOPCon solar cells, the problems of poor front passivation and large parasitic absorption in TOPCon solar cells are solved, improving open-circuit voltage and current collection efficiency, and reducing light-induced degradation.
Patent Information
- Application Number
- CN202421956148.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-13
- Publication Date
- 2025-11-04
- Estimated Expiration
- 2034-08-13
AI Technical Summary
TOPCon solar cells have poor passivation on the front side, resulting in a low turn-on voltage, and the narrow optical bandgap of Poly-Si causes significant parasitic absorption.
Alternating n-type doped microcrystalline silicon layers and n-type highly doped polycrystalline silicon layers are set on the front and back sides of the solar cell, respectively, and combined with a transparent conductive thin film layer to form a multi-layer passivation and anti-reflection structure, which enhances the passivation effect and reduces parasitic absorption.
It increases the open-circuit voltage, reduces parasitic absorption, ensures the stability of electrode contact resistance, improves current collection efficiency, and avoids light-induced degradation.
Smart Images
Figure CN223515250U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of solar cells, in particular to a solar cell structure. BACKGROUND
[0002] TOPCon solar cells are the mainstream solar cells in the market. Compared with heterojunction solar cells, the passivation effect of the front surface of TOPCon solar cells is poor, resulting in a low open voltage.
[0003] In related technologies, Poly-Si is generally deposited on the front surface of the cell to enhance the passivation effect.
[0004] However, the optical band gap of Poly-Si is relatively narrow, which will cause a large parasitic absorption. CONTENT OF THE UTILITY MODEL
[0005] Therefore, it is necessary to provide a solar cell structure to solve the problem of large parasitic absorption caused by the deposition of Poly-Si on the front surface of the cell.
[0006] A solar cell structure, comprising:
[0007] an n-type silicon substrate;
[0008] a first passivation layer and a first anti-reflection layer, which are sequentially stacked on the light-receiving surface of the n-type silicon substrate in a direction away from the n-type silicon substrate, the first passivation layer comprising n-type doped microcrystalline silicon layers and n-type highly doped polysilicon layers arranged alternately;
[0009] a first electrode passing through the first anti-reflection layer to contact the n-type highly doped polysilicon layer.
[0010] In one of the embodiments, the n-type doped microcrystalline silicon layer comprises at least one of n-μc-SiOx:H or n-μc-Si:H.
[0011] In one of the embodiments, the solar cell structure comprises a p-type single crystal silicon arranged on the back surface of the n-type silicon substrate.
[0012] In one of the embodiments, the solar cell structure comprises:
[0013] a second passivation layer and a second anti-reflection layer, which are sequentially stacked on the back surface of the n-type silicon substrate in a direction away from the n-type silicon substrate;
[0014] a second electrode passing through the second anti-reflection layer to contact the second passivation layer.
[0015] In one of the embodiments, the second passivation layer comprises a p-type low-doped polysilicon.
[0016] In one of the embodiments, the first anti-reflective layer comprises at least one of a SiOx layer, a SiON layer and a SiNx layer.
[0017] In one of the embodiments, the first anti-reflective layer is a transparent conductive film layer.
[0018] In one of the embodiments, the solar cell structure comprises a first tunneling layer, which is located at a side of the first passivation layer close to the n-type silicon substrate.
[0019] In one of the embodiments, the surfaces of the first tunneling layer, the first passivation layer and the first anti-reflective layer are all texturing surfaces.
[0020] In one of the embodiments, the doping concentration of phosphorus in the n-type high-doped polysilicon layer is 1E18cm -3 -1E23cm -3 .
[0021] The solar cell structure, the first passivation layer comprises n-type doped microcrystalline silicon layers and n-type high-doped polysilicon layers arranged alternately, the n-type doped microcrystalline silicon layer is used as a passivation layer of a non-electrode area, which can enhance the passivation effect of the light-receiving surface of the cell, thereby improving the open-circuit voltage, and the band gap of the n-type doped microcrystalline silicon layer is wider than that of the n-type high-doped polysilicon layer, which can avoid aggravating parasitic absorption. Meanwhile, the n-type high-doped polysilicon layer is used in the electrode printing area, which can ensure the contact resistance of the electrode unchanged and the smooth collection of the current. In addition, since the technology of the n-type doped microcrystalline silicon layer is more mature than that of the p-type doped microcrystalline silicon layer, the n-type doped microcrystalline silicon layer is arranged on the front surface of the cell, which can further reduce the thickness of the n-type doped microcrystalline silicon layer, thereby further increasing the width of the band gap and reducing the parasitic absorption. BRIEF DESCRIPTION OF DRAWINGS
[0022] Figure 1 FIG. 1 is a structural schematic diagram of a solar cell structure according to an embodiment.
[0023] FIG. 1 is a structural schematic diagram of a solar cell structure according to an embodiment.
[0024] 210, first tunneling layer; 220, first passivation layer; 221, n-type high-doped polysilicon layer; 222, n-type doped microcrystalline silicon layer; 230, first anti-reflective layer; 240, first electrode;
[0025] 310, second tunneling layer; 320, second passivation layer; 330, second anti-reflective layer; 340, second electrode; 350, p-type single crystal silicon. DETAILED DESCRIPTION
[0026] In order to make the above objectives, features and advantages of the present application more clear and comprehensible, the specific embodiments of the present application will be described in detail below with reference to the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. However, the present application can be practiced in a number of different ways beyond the specific embodiments described herein and with modifications to be apparent to those skilled in the art, and thus the present application is not limited to the following disclosed embodiments.
[0027] In the description of the present application, it should be understood that, if there are terms such as "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.
[0028] In addition, if the terms "first", "second" appear, these terms are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features referred to. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, if the term "a plurality of" appears, the meaning of "a plurality of" is at least two, for example, two, three, etc., unless otherwise explicitly specified.
[0029] In the present application, unless otherwise explicitly specified and limited, if the terms "mounting", "connecting", "connecting", "fixing" and the like appear, these terms should be understood in a broad sense. For example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements, unless otherwise explicitly limited. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0030] In the present application, unless otherwise explicitly specified and limited, if there is a description such as "on" or "under" or the like between a first feature and a second feature, it can mean that the first and second features are in direct contact, or the first and second features are indirectly in contact through an intermediate medium. Moreover, the first feature can be "above", "over" and "on" the second feature, which can mean that the first feature is directly above or obliquely above the second feature, or only means that the first feature is horizontally higher than the second feature. The first feature can be "below", "under" and "under" the second feature, which can mean that the first feature is directly below or obliquely below the second feature, or only means that the first feature is horizontally lower than the second feature.
[0031] It should be noted that if an element is referred to as "fixed to" or "disposed on" another element, it can be directly on the other element or there can be an intermediate element. If an element is considered to be "connected" to another element, it can be directly connected to the other element or there can be an intermediate element. If present, the terms "vertical", "horizontal", "up", "down", "left", "right" and similar expressions used in the present application are only for illustrative purposes and do not represent the only implementation.
[0032] Referring to Figure 1 The solar cell structure provided by an embodiment of the present application includes an n-type silicon substrate 100, a first passivation layer 220 and a first anti-reflection layer 230, and a first electrode 240. The first passivation layer 220 and the first anti-reflection layer 230 are sequentially stacked on a light-receiving surface of the n-type silicon substrate 100 in a direction away from the n-type silicon substrate 100. The first passivation layer 220 includes n-type doped microcrystalline silicon layers 222 and n-type highly doped polysilicon layers 221 arranged alternately. The first electrode 240 penetrates the first anti-reflection layer 230 to contact the n-type highly doped polysilicon layers 221.
[0033] In the present embodiment, the first passivation layer 220 includes the n-type doped microcrystalline silicon layers 222 and the n-type highly doped polysilicon layers 221 arranged alternately. The n-type doped microcrystalline silicon layers 222 are used as passivation layers of non-electrode regions, which can enhance the passivation effect of the light-receiving surface of the cell, thereby improving the open-circuit voltage. Moreover, the n-type doped microcrystalline silicon layers 222 have wider band gaps than the n-type highly doped polysilicon layers 221, which can avoid aggravating parasitic absorption. Meanwhile, the n-type highly doped polysilicon layers 221 are used in the printing area of the first electrode 240, which can ensure that the contact resistance of the first electrode 240 remains unchanged and the current is collected smoothly.
[0034] In addition, since the technology of the n-type doped microcrystalline silicon layers 222 is more mature than that of the p-type doped microcrystalline silicon layers, the n-type doped microcrystalline silicon layers 222 are arranged on the front surface of the cell, which can further reduce the thickness of the n-type doped microcrystalline silicon layers 222, further increase the width of the band gap, and thereby reduce the parasitic absorption.
[0035] Specifically, the n-doped microcrystalline silicon layer 222 includes at least one of n-μc-SiOx:H or n-μc-Si:H.
[0036] In some embodiments, the n-doped microcrystalline silicon layer 222 is an n-μc-SiOx:H layer.
[0037] In some other embodiments, the n-doped microcrystalline silicon layer 222 is an n-μc-Si:H layer.
[0038] In other embodiments, the n-doped microcrystalline silicon layer 222 can include both n-μc-SiOx:H layer and n-μc-Si:H layer.
[0039] In the present embodiment, the n-doped microcrystalline silicon layer 222 includes at least one of n-μc-SiOx:H or n-μc-Si:H, which can enhance the passivation effect of the light-receiving surface of the cell, thereby improving the open circuit voltage, and the n-doped microcrystalline silicon layer 222 has a wider band gap than the n-type highly-doped polysilicon layer 221, which can avoid aggravating the parasitic absorption.
[0040] In some embodiments, the solar cell structure includes a p-type single crystal silicon 350 disposed on the back surface of the n-type silicon substrate 100.
[0041] In the present embodiment, the p-type single crystal silicon 350 is disposed on the back surface of the n-type silicon substrate 100 to form a PN junction with the n-type silicon substrate 100.
[0042] In some embodiments, the solar cell structure includes a second passivation layer 320 and a second anti-reflection layer 330, and a second electrode 340, along a direction away from the n-type silicon substrate 100, the second passivation layer 320 and the second anti-reflection layer 330 are sequentially stacked on the back surface of the n-type silicon substrate 100; the second electrode 340 passes through the second anti-reflection layer 330 to contact the second passivation layer 320.
[0043] In the present embodiment, along a direction away from the n-type silicon substrate 100, the second passivation layer 320 and the second anti-reflection layer 330 are sequentially stacked on the back surface of the n-type silicon substrate 100, the second passivation layer 320 is used for full-back-field passivation to improve the open circuit voltage, and the second anti-reflection layer 330 is used to increase the internal reflection of the cell.
[0044] In some embodiments, the second passivation layer 320 includes a p-type low-doped polysilicon, and the p-type single crystal silicon 350 and the p-type low-doped polysilicon are disposed on the back surface of the n-type silicon substrate 100, which can avoid the light-induced degradation.
[0045] Further, the solar cell structure further comprises a second tunneling layer 310, and the p-type monocrystalline silicon 350, the second tunneling layer 310, the second passivation layer 320 and the second anti-reflection layer 330 are sequentially stacked in a direction away from the n-type silicon substrate 100. The surface of the p-type monocrystalline silicon 350 is a textured surface, and the second tunneling layer 310, the second passivation layer 320 and the second anti-reflection layer 330 are all polished surfaces.
[0046] In some embodiments, the first anti-reflection layer 230 comprises at least one of a SiOx layer, a SiON layer and a SiNx layer.
[0047] In some of the embodiments, the first anti-reflection layer 230 is a SiOx layer, or the first anti-reflection layer 230 is a SiON layer, or the first anti-reflection layer 230 is a SiNx layer.
[0048] In some of the other embodiments, the first anti-reflection layer 230 comprises a SiOx layer and a SiON layer which are sequentially stacked, or the first anti-reflection layer 230 comprises a SiOx layer and a SiNx layer which are sequentially stacked, or the first anti-reflection layer 230 comprises a SiON layer and a SiNx layer which are sequentially stacked.
[0049] In some of the other embodiments, the first anti-reflection layer 230 comprises a SiOx layer, a SiON layer and a SiNx layer which are sequentially stacked in a direction away from the n-type silicon substrate 100.
[0050] In some of the other embodiments, the first anti-reflection layer 230 is a transparent conductive film layer.
[0051] In the present embodiment, the first anti-reflection layer 230 is a transparent conductive film layer, and the transparent conductive film layer is used to reduce the reflectivity of the surface of the solar cell and to improve the lateral conduction of the solar cell.
[0052] In other embodiments, the first anti-reflection layer 230 comprises at least one of a SiOx layer, a SiON layer, a SiNx layer and a transparent conductive film layer.
[0053] For example, the first anti-reflection layer 230 comprises a SiOx layer, a SiON layer, a SiNx layer and a transparent conductive film layer which are sequentially stacked in a direction away from the n-type silicon substrate 100.
[0054] In some embodiments, the solar cell structure comprises a first tunneling layer 210, and the first tunneling layer 210 is located on a side of the first passivation layer 220 which is close to the n-type silicon substrate 100.
[0055] The first tunneling layer 210 and the second tunneling layer 310 have good chemical passivation performance, and can prevent the movement of minority carriers to the surface to form a selective passivation contact. The first tunneling layer 210 and the second tunneling layer 310 each include a SiOx layer.
[0056] In some embodiments, the surfaces of the first tunneling layer 210, the first passivation layer 220, and the first anti-reflection layer 230 are all texturing surfaces.
[0057] In the present embodiment, the texturing surfaces are used to further reduce the reflectivity of light and increase the absorption rate of light.
[0058] In some embodiments, the second anti-reflection layer 330 includes at least one of a SiOx layer, a SiON layer, a SiNx layer, and a transparent conductive film layer.
[0059] For example, in some embodiments, the second anti-reflection layer 330 is a SiOx layer, or the second anti-reflection layer 330 is a SiON layer, or the second anti-reflection layer 330 is a SiNx layer.
[0060] In other embodiments, the second anti-reflection layer 330 includes a SiOx layer and a SiON layer stacked, or the second anti-reflection layer 330 includes a SiOx layer and a SiNx layer stacked, or the second anti-reflection layer 330 includes a SiON layer and a SiNx layer stacked.
[0061] In other embodiments, the second anti-reflection layer 330 includes a SiOx layer, a SiON layer, and a SiNx layer stacked in sequence along the direction away from the n-type silicon substrate 100.
[0062] Of course, the second anti-reflection layer 330 can also be a transparent conductive film layer, or the first anti-reflection layer 230 includes a SiOx layer, a SiON layer, a SiNx layer, and a transparent conductive film layer stacked in sequence.
[0063] In some embodiments, the doping concentration of phosphorus in the n-type high-doped polysilicon layer 221 is 1E18cm -3 -1E23cm -3 The doping concentration of boron in the p-type doped polysilicon layer is 1E17cm -3 -1E22cm -3 .
[0064] Specifically, in the production process, first, SiOx and n-Poly-Si are deposited on the light-receiving surface of the n-type silicon substrate 100 by CVD (PECVD or LPCVD), then n-Poly-Si in the non-printing area is removed by laser or mask and wet etching, and n-Poly-Si in the printing area is reserved, n-Poly-Si can not only passivate the surface, but also ensure low contact resistance. Then, the n-type doped microcrystalline silicon layer 222 is deposited by PECVD, which can passivate the light-receiving surface of the cell and improve the open circuit voltage; and has a wide band gap and high light transmittance, ensuring short-circuit current. Then, boron diffusion is performed on the back surface of the n-type silicon substrate 100 to form a PN junction. Then, p-Poly-Si is deposited on the back surface by CVD to passivate the full back surface and improve the open circuit voltage.
[0065] In the present application, the first passivation layer 220 includes n-type doped microcrystalline silicon layers 222 and n-type highly doped polysilicon layers 221 arranged alternately, the n-type doped microcrystalline silicon layer 222 is used as a passivation layer in the non-electrode area, which can enhance the passivation effect of the light-receiving surface of the cell, thereby improving the open circuit voltage, and the n-type doped microcrystalline silicon layer 222 has a wider band gap than the n-type highly doped polysilicon layer 221, which can avoid aggravating parasitic absorption. At the same time, the printing area of the first electrode 240 uses the n-type highly doped polysilicon layer 221, which can ensure that the contact resistance of the first electrode 240 remains unchanged and ensure the smooth collection of current.
[0066] In addition, since the n-type doped microcrystalline silicon layer 222 is more mature than the p-type doped microcrystalline silicon layer, the n-type doped microcrystalline silicon layer 222 is arranged on the front surface of the cell, which can further reduce the thickness of the n-type doped microcrystalline silicon layer 222, further increase the width of the band gap, and thereby reduce parasitic absorption. The back surface of the n-type silicon substrate 100 is provided with a p-type single crystal silicon 350 and a p-type low-doped polysilicon, which can avoid light-induced attenuation. The first anti-reflection layer 230 is a transparent conductive film layer, which not only reduces the reflectivity of the surface of the cell, but also improves the lateral conduction of the cell.
[0067] The technical features of the above-described embodiments can be combined in any manner. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described, but as long as the combinations of the technical features do not exist, they should be considered as the scope of the present disclosure.
[0068] The above embodiments only express several implementation ways of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation to the patent scope of the application. It should be pointed out that for ordinary skilled persons in the art, several modifications and improvements can be made without departing from the concept of the present application, which all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.
Claims
1. A solar cell structure, characterized in that, The solar cell structure includes: n-type silicon substrate (100); The first passivation layer (220) and the first antireflection layer (230) are stacked sequentially on the light-receiving surface of the n-type silicon substrate (100) along a direction away from the n-type silicon substrate (100). The first passivation layer (220) includes an alternately arranged n-type doped microcrystalline silicon layer (222) and an n-type highly doped polycrystalline silicon layer (221). The first electrode (240) passes through the first antireflection layer (230) to contact the n-type highly doped polysilicon layer (221).
2. The solar cell structure according to claim 1, characterized in that, The n-type doped microcrystalline silicon layer (222) is an n-μc-SiOx:H layer; Alternatively, the n-type doped microcrystalline silicon layer (222) is an n-μc-Si:H layer; Alternatively, the n-type doped microcrystalline silicon layer (222) may also include both an n-μc-SiOx:H layer and an n-μc-Si:H layer.
3. The solar cell structure according to claim 1, characterized in that, The solar cell structure includes a p-type monocrystalline silicon (350) disposed on one side of the back surface of the n-type silicon substrate (100).
4. The solar cell structure according to claim 3, characterized in that, The solar cell structure includes: A second tunneling layer (310) is disposed on the side of the p-type monocrystalline silicon (350) away from the n-type silicon substrate (100); The second passivation layer (320) and the second antireflection layer (330) are sequentially stacked on the back surface of the n-type silicon substrate (100) along a direction away from the n-type silicon substrate (100); The second electrode (340) passes through the second antireflection layer (330) to contact the second passivation layer (320).
5. The solar cell structure according to claim 4, characterized in that, The second passivation layer (320) comprises p-type lightly doped polysilicon.
6. The solar cell structure according to claim 1, characterized in that, The first antireflection layer (230) includes at least one of a SiOx layer, a SiON layer, and a SiNx layer.
7. The solar cell structure according to claim 1, characterized in that, The first antireflective layer (230) is a transparent conductive thin film layer.
8. The solar cell structure according to claim 1, characterized in that, The solar cell structure includes a first tunneling layer (210) located on the side of the first passivation layer (220) close to the n-type silicon substrate (100).
9. The solar cell structure according to claim 8, characterized in that, The surfaces of the first tunneling layer (210), the first passivation layer (220), and the first antireflection layer (230) are all textured.
10. The solar cell structure according to claim 3, characterized in that, The surface of the p-type monocrystalline silicon (350) is textured.