Semiconductor packaging assembly, MEMS detector and electronic equipment
By using copper-copper bonding and an inert metal protective layer, the problems of high cost and complex process in vacuum packaging of MEMS devices are solved, achieving efficient and low-cost packaging results.
Patent Information
- Application Number
- CN202423034893.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-09
- Publication Date
- 2025-11-07
- Estimated Expiration
- 2034-12-09
AI Technical Summary
Existing vacuum packaging methods for MEMS devices mostly use precious metals, resulting in high production costs and complex processes.
The encapsulation process uses copper-copper bonding and is combined with an inert metal protective layer, which simplifies the process and reduces costs.
It enables low-cost, high-quality vacuum packaging of MEMS devices, improves the strength and reliability of the packaging structure, and simplifies the packaging process.
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Figure CN223522296U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of semiconductor packaging, in particular to a semiconductor packaging assembly, a MEMS detector and an electronic device. BACKGROUND
[0002] With the rapid development of micro-electro-mechanical system (MEMS) technology, MEMS devices have been widely used in various fields. MEMS devices need to be vacuum packaged, and vacuum packaging is a key technology for protecting MEMS devices, improving their stability and reliability, and can ensure the high performance and long-term stability of MEMS devices. The inventors found that the prior art has the following problems in the process of implementing the present application: The traditional vacuum packaging of MEMS devices mostly uses eutectic bonding such as Au / Sn (gold-tin) or Al / Ge (aluminum-germanium), or uses gold-gold bonding or gold-silicon bonding. These vacuum packaging methods mostly require the use of noble metals, resulting in high production cost and complex process. SUMMARY
[0003] Therefore, the present application provides a semiconductor packaging assembly, a MEMS detector and an electronic device to improve the problems of high packaging cost and complex process in the prior art.
[0004] To achieve the above-mentioned purpose, the technical scheme of the embodiments of the present application is as follows:
[0005] In a first aspect, the embodiments of the present application provide a semiconductor packaging assembly, comprising a first packaging structure and a second packaging structure;
[0006] The first packaging structure comprises a first substrate, a first metallization layer and a first bonding structure layer which are sequentially stacked on the first substrate; the first bonding structure layer comprises a first main body layer and a first protective layer;
[0007] The second packaging structure comprises a second substrate, a second metallization layer and a second bonding structure layer which are sequentially stacked on the second substrate; the second bonding structure layer comprises a second main body layer and a second protective layer;
[0008] The first bonding structure layer is used to bond with the second bonding structure layer to form a packaging structure, the first main body layer and the second main body layer are respectively copper layers, and the first protective layer and the second protective layer are respectively inert metal layers.
[0009] In one of the embodiments, the first metallization layer and the second metallization layer respectively comprise a plurality of metal film layers, and the plurality of metal film layers comprise Cr / Ti layers, Ni layers and Cu layers which are stacked.
[0010] In one of the embodiments, the thickness of the first main layer and the second main layer is 0.1-10 μm respectively.
[0011] And / or, the thickness of the first protective layer and the second protective layer is 0.01-0.5 μm respectively.
[0012] In one of the embodiments, the thickness of the first main layer and the second main layer is 1-5 μm respectively.
[0013] In one of the embodiments, the material of the first protective layer and the second protective layer is platinum or gold respectively.
[0014] In one of the embodiments, the second packaging structure further comprises a MEMS structure arranged on the second substrate, and the MEMS structure is located in the space surrounded by the second bonding structure layer.
[0015] In one of the embodiments, the first substrate further comprises an air absorption layer and an anti-reflection structure arranged on the surface close to the second substrate.
[0016] In one of the embodiments, the first substrate further comprises an air absorption layer and an anti-reflection structure arranged on the surface close to the second substrate.
[0017] In one of the embodiments, the second packaging structure further comprises a MEMS structure arranged on the second substrate, and the MEMS structure is located in the space surrounded by the second bonding structure layer.
[0018] The semiconductor packaging assembly provided by the embodiments of the present application comprises a first packaging structure and a second packaging structure, bonding structure layers (a first bonding structure layer and a second bonding structure layer) are arranged on the first packaging structure and the second packaging structure respectively, and the main layers (a first main layer and a second main layer) of the two bonding structure layers are copper layers, which can form a packaging structure through copper-copper bonding. The copper-copper bonding method greatly reduces the production cost compared with the packaging method using noble metals, and the protective layers (a first protective layer and a second protective layer) are arranged on the main layers, the protective layers are made of inert metals, which can effectively prevent the oxidation of the copper layers, help to reduce the temperature of copper-copper bonding, simplify the packaging process, improve the bonding strength, and help to improve the overall quality of the MEMS detector. The MEMS detector and the electronic device provided by the embodiments of the present application comprise the semiconductor packaging assembly described above, and therefore also have the beneficial effects described above. BRIEF DESCRIPTION OF DRAWINGS
[0019] Figure 1 FIG. 1 is a structural schematic diagram of a semiconductor packaging assembly according to an embodiment of the present application.
[0020] Figure 2 FIG. 2 is a structural schematic diagram of a semiconductor packaging assembly according to another embodiment of the present application.Figure 1 A top view schematic diagram of a first package structure of a semiconductor package assembly.
[0021] Figure 3 A schematic diagram of a structure of a MEMS detector of an embodiment of the present application.
[0022] Figure 4 A schematic diagram of a structure of a MEMS detector of an embodiment of the present application. Figure 3 A schematic diagram of a structure of a MEMS detector of an embodiment of the present application.
[0023] The meanings of the respective reference signs in the drawings are as follows:
[0024] 1. first package structure; 11. first substrate; 12. first metallization layer; 13. first bonding structure layer; 131. first main layer; 132. first protection layer;
[0025] 2. second package structure; 21. second substrate; 22. second metallization layer; 23. second bonding structure layer; 231. second main layer; 232. second protection layer; 24. MEMS structure;
[0026] 3. bonding joint layer. DETAILED DESCRIPTION
[0027] The technical solutions of the present application are further described in detail below in combination with the drawings and specific embodiments of the present application.
[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terminology used in the description of the present application herein only for the purpose of describing specific embodiments of the present application, and is not intended to limit the implementation of the present application. The term "and / or" used herein includes any and all combinations of one or more related listed items.
[0029] In the description of the present application, it should be understood that the terms "center", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application. In the description of the present application, unless otherwise stated, the meaning of "a plurality of" is two or more.
[0030] In the description of the present application, it should be noted that unless specifically stated and limited otherwise, the terms "mounting", "connection", "connecting" should be understood broadly, for example, can be fixedly connected, can be detachably connected, or integrally connected; can be directly connected, or indirectly connected through an intermediate medium, can be the internal communication of two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0031] Please refer to Figure 1 The semiconductor package assembly of the embodiment of the present application comprises a first package structure 1 and a second package structure 2.
[0032] As shown in Figure 1 and Figure 2 , the first package structure 1 comprises a first substrate 11, a first metallization layer 12 and a first bonding structure layer 13 which are sequentially stacked on the first substrate 11; the first bonding structure layer 13 comprises a first main body layer 131 and a first protective layer 132.
[0033] The second package structure 2 comprises a second substrate 21, a second metallization layer 22 and a second bonding structure layer 23 which are sequentially stacked on the second substrate 21; the second bonding structure layer 23 comprises a second main body layer 231 and a second protective layer 232.
[0034] The first bonding structure layer 13 is used to bond with the second bonding structure layer 23 to form a package structure, the first main body layer 131 and the second main body layer 231 are respectively copper layers, and the first protective layer 132 and the second protective layer 232 are respectively inert metal layers.
[0035] Specifically, in the present embodiment, the two substrates (the first substrate 11 and the second substrate 21) are both silicon wafers, and the first substrate 11 is a double- polished wafer. The two metallization layers (the first metallization layer 12 and the second metallization layer 22) respectively comprise a plurality of metal film layers, which can be, for example, Cr / Ti layers, Ni layers and Cu layers which are sequentially stacked, and the Cu layer is arranged close to the side of the main body layer (the first main body layer 131 or the second main body layer 231). The materials of the two protective layers (the first protective layer 132 and the second protective layer 232) can be inert metals such as platinum or gold. The thickness of the two main body layers ranges from 0.1 μm to 10 μm, and is preferably 1 μm to 5 μm. Compared with the conventional packaging process, the thickness of the main body layer of the present embodiment is smaller, which is beneficial to the light and thin of the MEMS device. The thickness of the two protective layers ranges from 0.01 μm to 0.5 μm.
[0036] As shown in Figure 3As shown, another embodiment of the present application also provides a MEMS detector formed by bonding the first packaging structure 1 and the second packaging structure 2 in the above embodiment, that is, the two bonding structure layers (the first bonding structure layer 13 and the second bonding structure layer 23) of the two packaging structures (the first packaging structure 1 and the second packaging structure 2) are bonded to form the packaging structure after copper bonding. Figure 4 As shown, the MEMS detector of the present embodiment is formed by bonding, and the first bonding structure layer 13 and the second bonding structure layer 23 are combined to form a bonding combination layer 3.
[0037] Specifically, the MEMS structure 24 is also provided on the second substrate 21, which is arranged on the surface of the second substrate 21 close to the first substrate 11 and located in the space surrounded by the second bonding structure layer 23.
[0038] The getter layer (not shown) and the anti-reflection structure (not shown) can also be provided on the first substrate 11, both of which are arranged on the surface of the first substrate 11 close to the second substrate 21 and located in the space surrounded by the first bonding structure layer 13. The anti-reflection structure can be an AR film layer (anti-reflection film layer) or some uneven microstructure layer for increasing transmission and reducing reflection. The getter layer is used to maintain vacuum.
[0039] The specific manufacturing method of the MEMS detector of the present embodiment is as follows:
[0040] S1, provide a double-throw wafer as the first substrate 11, deposit a first metal layer 12 on the first substrate 11, and then evaporate or sputter a first bonding structure layer 13 on the first metal layer 12 by LIFT-OFF process (lift-off process), or the first bonding structure layer 13 can also be prepared by thick photoresist lithography and electroplating method. Before preparing the first protective layer 132, the first main layer 131 can be planarized, and the roughness and height difference of the surface of the first main layer 131 is usually eliminated by CMP (chemical mechanical polishing) process, and then the first protective layer 132 is deposited on the surface of the first main layer 131 by the above similar process, and the protective layer is deposited on the surface of the first main layer 131 to obtain the first packaging structure 1.
[0041] The getter layer and the anti-reflection structure are provided on the first substrate 11.
[0042] S2, provide a silicon wafer as the second substrate 21, deposit a second metal layer 22 on the second substrate 21, and then prepare a second bonding structure layer 23 on the second metal layer 22 to obtain a second packaging structure 2. The preparation method is the same as that of S1, which will not be described here.
[0043] The MEMS structure 24 is arranged on the second substrate 21.
[0044] S3, cleaning the first packaging structure 1 and the second packaging structure 2 to remove oil stains, oxides and other impurities on the wafer surface. The cleaning agent can be selected from acetone, IPA (isopropyl alcohol), ethanol or deionized water, etc. After cleaning, the two packaging structures are dried to remove the surface moisture.
[0045] S4, the first packaging structure 1 and the second packaging structure 2 can also be heat treated. The two packaging structures (the first packaging structure 1 and the second packaging structure 2) are heat treated in a reducing atmosphere. The reducing gas can be selected from hydrogen or formic acid, etc. The bonding structure layer is bombarded by argon plasma to achieve atomic level surface cleanliness. This step is not necessary. The two packaging structures after heat treatment can further avoid the oxidation of copper in the main body layer, which is beneficial to reduce the bonding temperature.
[0046] S4, using an automatic device to align the positions of the two bonding structure layers, and applying a certain pressure to the two substrates to form a preliminary contact between the two bonding structure layers.
[0047] S5, in a vacuum bonding device, the two packaging structures in preliminary contact are heat-pressed and bonded. First, the bonding cavity is vacuumed to 10 Pa to 30 Pa. The two substrates are heated and pressurized, so that the bonding structure layers of the two substrates diffuse atoms after contacting each other to form a common bonding layer 3. The bonding temperature is controlled at 200℃ to 300℃, the pressure is controlled at 2000N to 8000N, and the bonding time is 10 minutes to 60 minutes. After bonding, slow cooling to room temperature, the cooling rate is not more than 200℃ per hour, to avoid cracks or delamination due to excessive thermal stress, affecting the bonding quality.
[0048] The bonding layer 3 of the embodiment is formed by the mutual diffusion and combination of copper atoms in the two bonding structure layers (the first bonding structure layer 13 and the second bonding structure layer 23). At this time, the inert metal in the two protective layers (the first protective layer 132 and the second protective layer 232) will diffuse into the copper atoms, and the concentration of the inert metal decreases from the contact surface of the two bonding structure layers to both sides.
[0049] Another embodiment of the application also provides an electronic device, which includes the MEMS probe of the above-mentioned embodiments. The electronic device can be an infrared thermal imager.
[0050] The semiconductor packaging assembly, the MEMS detector and the electronic equipment provided by the embodiments of the present application are beneficial to reducing the size design of the MEMS detector, because the copper layer always keeps solid state in the process of copper-copper bonding, and there is no problem of overflow of eutectic welding or soft soldering. The copper-copper bonding packaging mode significantly reduces the packaging cost, simplifies the packaging process, provides a vacuum packaging technology of MEMS Wafer to Wafer, and realizes a more efficient and lower-cost vacuum packaging mode. The embodiments of the present application not only simplify the packaging process, but also improve the quality and reliability of the packaging structure. The design of the protective layer of the embodiments of the present application can prevent the copper layer from being oxidized, and effectively reduce the temperature of the thermal compression bonding. The bonding combination layer formed by the copper-copper bonding has good mechanical strength, which is beneficial to improving the overall quality of the MEMS detector and improving the performance and operation reliability of the MEMS detector.
[0051] It should be noted that in this document, the terms "comprising", "containing" or any other variant thereof are intended to cover non-exclusive inclusions, so that a process, method, article or device that includes a series of elements not only includes those elements, but also includes other elements not explicitly listed, or includes elements inherent to such a process, method, article or device. Without more limitations, the element defined by the statement "comprising a" does not exclude the presence of other identical elements in the process, method, article or device that includes the element.
[0052] The above is only a specific embodiment of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present application, which should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.
Claims
1. A semiconductor package assembly, comprising: The semiconductor package assembly comprises a first package structure (1) and a second package structure (2); The first package structure (1) comprises a first substrate (11), a first metallization layer (12) and a first bonding structure layer (13) which are sequentially stacked on the first substrate (11); the first bonding structure layer (13) comprises a first main layer (131) and a first protective layer (132); The second package structure (2) comprises a second substrate (21), a second metallization layer (22) and a second bonding structure layer (23) which are sequentially stacked on the second substrate (21); the second bonding structure layer (23) comprises a second main layer (231) and a second protective layer (232); The first bonding structure layer (13) is used to bond with the second bonding structure layer (23) to form a package structure; the first main layer (131) and the second main layer (231) are copper layers respectively; and the first protective layer (132) and the second protective layer (232) are inert metal layers respectively.
2. The semiconductor package assembly of claim 1, wherein, The first metallization layer (12) and the second metallization layer (22) respectively comprise a plurality of metal film layers.
3. The semiconductor package assembly of claim 2, wherein, The plurality of metal film layers comprise a Cr / Ti layer, a Ni layer and a Cu layer which are stacked.
4. The semiconductor package assembly of claim 1, wherein, The thickness of the first main layer (131) and the second main layer (231) is 0.1 μm-10 μm respectively. The thickness of the first protective layer (132) and the second protective layer (232) is 0.01 μm-0.5 μm respectively.
5. The semiconductor package assembly of claim 4, wherein, The thickness of the first main layer (131) and the second main layer (231) is 1 μm-5 μm respectively.
6. The semiconductor package assembly of claim 1, wherein, The material of the first protective layer (132) and the second protective layer (232) is platinum or gold respectively.
7. A MEMS probe, characterized by, The MEMS detector is a package structure bonded by the semiconductor package assembly according to any one of claims 1-6.
8. The MEMS probe of claim 7, wherein, The second package structure (2) further comprises a MEMS structure (24) disposed on the second substrate (21), and the MEMS structure (24) is located in a space surrounded by the second bonding structure layer (23).
9. The MEMS probe of claim 7, wherein, The first substrate (11) further comprises a getter layer and an anti-reflection structure on a surface close to the second substrate (21).
10. An electronic device, comprising: The semiconductor package assembly comprises a MEMS detector according to any one of claims 7-9. The semiconductor package assembly comprises a MEMS detector according to any one of claims 7-9.