Liquid crystal panel driving circuit comprising multifunctional time sequence control module, display device and liquid crystal panel driving equipment

Abstract

The embodiment of the utility model relates to a liquid crystal panel driving circuit comprising a multifunctional time sequence control module, a display device and liquid crystal panel driving equipment, the circuit comprises the time sequence control module and a power management module, the time sequence control module comprises a first port, and the first port is connected with a liquid crystal panel; the power management module comprises a second port which is connected with the liquid crystal panel. The time sequence control module comprises a level conversion unit and a time sequence control unit, the signal output end of the level conversion unit is connected with the first port, and the signal input end of the level conversion unit is connected with the time sequence control unit; the signal output end of the time sequence control unit is connected with the first port; the power management module is connected with the time sequence control module so as to provide power for the time sequence control module. According to the embodiment of the invention, the problem of interface mismatching between the level conversion unit and the time sequence control unit is avoided, the system debugging convenience is higher, and the driving circuit design and manufacturing efficiency is higher.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display panel, in particular to a liquid crystal panel driving circuit containing a multifunctional timing control module, a display device and a liquid crystal panel driving equipment. BACKGROUND

[0002] In the process of display panel driving design, two core components are often involved, one is TCON IC (Timing controller IC) and the other is LSIC (Level shifter IC). TCON IC and LSIC cooperate with each other to generate the driving timing required by the display screen, or in other words, TCON IC and LSIC realize the output of GOA (Gate on array) timing (the timing of driving the screen to scan line by line, including frame start scanning signal STV, frame end reset signal STV0, line scanning clock signal CLK1-CLK10, and pull-down maintenance unit control signal LC1 / LC2, etc.) according to the timing requirements of a certain screen.

[0003] At present, TCON IC and LSIC are usually two independent chips, which will cause some problems. For example, TCON IC and LSIC come from different manufacturers, and the logic compatibility is poor. The interface matching of TCON IC and LSIC is poor. When replacing LSIC, it is necessary to re-adjust with TCON IC. Therefore, the current scheme of separating TCON IC and LSIC will cause inconvenience in system debugging, and the efficiency of driving circuit design and manufacturing is low. SUMMARY

[0004] In view of this, in order to solve the above-mentioned part or all technical problems, the present application provides a liquid crystal panel driving circuit containing a multifunctional timing control module, a liquid crystal panel driving equipment and a display device.

[0005] In the first aspect, the present application provides a liquid crystal panel driving circuit containing a multifunctional timing control module, which comprises a timing control module and a power management module. The timing control module comprises a first port, and the first port is connected with a liquid crystal panel to output a control signal to the liquid crystal panel. The power management module comprises a second port, and the second port is connected with the liquid crystal panel to provide power to the liquid crystal panel. The timing control module comprises a level conversion unit and a timing control unit. The signal output end of the level conversion unit is connected with the first port, and the signal input end of the level conversion unit is connected with the timing control unit. The signal output end of the timing control unit is connected with the first port. The power management module is connected with the timing control module to provide power to the timing control module.

[0006] In a possible implementation, the power management module includes a general power management unit and a Gamma power management unit, the Gamma power management unit is connected with the general power management unit; the general power management unit is configured to convert an input voltage to obtain a converted first voltage, output the first voltage to the liquid crystal panel through a second port, and obtain a converted second voltage and output the second voltage to the Gamma power management unit; and the Gamma power management unit is configured to generate a Gamma voltage and a reference voltage according to the second voltage, and output the Gamma voltage and the reference voltage to the liquid crystal panel through the second port.

[0007] In a possible implementation, the power management module inputs the gate control voltage to the timing control module through a voltage input end of the timing control module, and inputs the gate control voltage to the level conversion unit by the timing control module.

[0008] In a possible implementation, the power management module inputs the digital power voltage to the timing control unit by the timing control module through a voltage input end of the timing control module.

[0009] In a possible implementation, the power management module inputs the gate control voltage to the timing control module through a voltage input end of the timing control module, and inputs the gate control voltage to the level conversion unit by the timing control module.

[0010] In a possible implementation, the main power output end of the main board is connected with the power management module on the control board.

[0011] In a possible implementation, the main power output end of the main board is connected with the power management module on the control board.

[0012] In a possible implementation, the power management module inputs the gate control voltage to the timing control module through a voltage input end of the timing control module, and inputs the gate control voltage to the level conversion unit by the timing control module.

[0013] In one possible implementation, the power management module is connected to the voltage input terminal of the master control chip, and the master control chip inputs the digital power voltage to the timing control unit.

[0014] In a fourth aspect, the embodiments of the present application provide a display device, comprising a mainboard, a control board and a liquid crystal panel, the mainboard is connected with the control board, and the control board is connected with the liquid crystal panel; the mainboard is provided with a master control chip included in the liquid crystal panel driving apparatus described in the third aspect, the master control chip comprises a timing control module in the liquid crystal panel driving apparatus, and the control board is provided with a power management module included in the liquid crystal panel driving apparatus; the master control module is used for providing timing signals and control signals for the timing control module; and the liquid crystal panel is used for displaying according to the signals output by the control board.

[0015] The liquid crystal panel driving circuit, the liquid crystal panel driving apparatus and the display device provided by the embodiments of the present application comprise a multifunctional timing control module, the level conversion unit and the timing control unit are integrated into the same timing control module, the timing control module is connected with the power management module, the first port of the timing control module is connected with the liquid crystal panel to output control signals to the liquid crystal panel, the second port of the power management module is connected with the liquid crystal panel to provide power for the liquid crystal panel, the signal output terminal of the level conversion unit is connected with the first port, the signal input terminal is connected with the timing control unit, the signal output terminal of the timing control unit is connected with the first port, and the power management module provides power for the timing control module, so that the same hardware module comprising the level conversion function and the timing control function is used to perform timing control on the liquid crystal panel. Compared with the existing TCONIC and LSIC which are separately arranged, the circuit provided by the embodiments of the present application has higher integration, the hardware connection between the level conversion unit and the timing control unit is fixed, the signal transmission protocol is also fixed, the problem of interface mismatch between the level conversion unit and the timing control unit is avoided, the convenience of system debugging is higher, and the efficiency of driving circuit design and manufacturing is higher. BRIEF DESCRIPTION OF DRAWINGS

[0016] The drawings herein are incorporated into the description and constitute a part of the description, show embodiments consistent with the present application, and together with the description serve to explain the principles of the present application.

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced as follows, and obviously, other drawings can also be obtained by those skilled in the art without creative labor.

[0018] One or more embodiments are illustrated by way of example in the drawings in which like reference numerals indicate like elements, and in which: the drawings are not necessarily to scale, except as otherwise noted, and in which:

[0019] Figure 1 A structural schematic diagram of a liquid crystal panel driving circuit comprising a multifunctional timing control module according to an embodiment of the present application;

[0020] Figure 2 A structural schematic diagram of a liquid crystal panel driving circuit comprising a multifunctional timing control module according to another embodiment of the present application;

[0021] Figure 3 A structural schematic diagram of a power management module according to an embodiment of the present application;

[0022] Figure 4 A structural schematic diagram of a display device according to an embodiment of the present application;

[0023] Figure 5 A structural schematic diagram of a liquid crystal panel driving apparatus according to an embodiment of the present application;

[0024] Figure 6 A structural schematic diagram of a liquid crystal panel driving apparatus according to another embodiment of the present application;

[0025] Figure 7 A structural schematic diagram of a display device according to another embodiment of the present application.

[0026] Reference Signs:

[0027] 100 - liquid crystal panel driving circuit comprising a multifunctional timing control module; 101 - timing control module; 1011 - timing control unit; 1012 - level conversion unit; 102 - power management module; 1021 - general power management unit; 1022 - Gamma power management unit; 401 - main board; 402 - control board; 403 - liquid crystal panel; 500 - liquid crystal panel driving apparatus. DETAILED DESCRIPTION

[0028] Various exemplary embodiments of the present application will now be described in detail with reference to the accompanying drawings. If desired, the exemplary embodiments can be mixed. Obviously, the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. It should be noted that the relative arrangement, numerical expression, and numerical value of the components and steps set forth in these embodiments do not limit the scope of the present application, unless otherwise specifically stated.

[0029] Those skilled in the art can understand that the terms "first", "second" and the like in the embodiments of the present application are only used to distinguish different steps, devices or modules, and do not represent any specific technical meaning, nor represent a logical sequence between them.

[0030] It should also be understood that in the present embodiment, "a plurality of" can mean two or more, and "at least one" can mean one, two or more.

[0031] It should also be understood that for any component, data or structure mentioned in the embodiments of the present application, it can be understood as one or more in general, without explicit limitation or in the context of the opposite indication.

[0032] In addition, the term "and / or" in the present application is only a description of the association relationship between the associated objects, which means that there can be three relationships, for example, A and / or B can represent: A exists alone, A and B exist together, and B exists alone. In addition, the character " / " in the present application generally represents an "or" relationship between the front and rear associated objects.

[0033] It should also be understood that the description of the embodiments of the present application focuses on the differences between the embodiments, and the same or similar parts can be referred to each other, and for the sake of brevity, will not be repeated.

[0034] The following description of at least one exemplary embodiment is merely illustrative in nature and does not in any way limit the application and its application or use.

[0035] Techniques, circuits and devices known to those of ordinary skill in the relevant art can not be discussed in detail, but should be considered as part of the specification where appropriate.

[0036] It should be noted that similar reference numbers and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0037] It should be noted that the embodiments and features in the embodiments of the present application can be combined with each other without conflict. In order to understand the embodiments of the present application, the following will be described in detail with reference to the drawings and in combination with the embodiments. Obviously, the described embodiments are part of the embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor are within the scope of protection of the present application.

[0038] The TCON used by the liquid crystal panel driving circuit controls the LSIC to output a specific timing through certain logic. The LSIC pulls up the level input therein, such as pulling up the high level DVDD 3V3 from 3.3V level to VGH (different panel voltages are different, such as 36V, etc.), and pulling up the low level 0V input therein to VGL (different panel voltages are different, such as -10V, etc.). The TCON IC often inputs a square wave with a high level of 3.3V and a low level of 0V to the LSIC, and the LSIC pulls up the square wave to a high level of VGH and a low level of VGL. Moreover, in order to save the number of IO ports of the TCON or the LSIC, the commonly used LSIC is generally designed in a binary output mode, which requires the LSIC to have certain logic processing capability, rather than only pulling up the level of the input signal. For example, when the rising edge of CPV1 input by the TCON IC comes, the rising edge of CLK1 is output, and when the rising edge of CPV2 input by the TCON IC comes, the falling edge of CLK1 is output. In this way, the required specific timing can be continuously looped. Only the timing with a high level of VGH and a low level of VGL can drive the panel TFT (Thin Film Transistor) to realize switching.

[0039] However, the current display driving mode still has some problems, especially some problems often encountered in the process of lighting the screen and debugging. The problems existing in the separation of the TCON IC and the LSIC mainly include the following:

[0040] 1. There are many LSIC manufacturers, and the LSICs of different manufacturers have various characteristics and rich logic, which causes logic confusion when the TCON IC is adapted with the LSIC, and increases the workload.

[0041] 2. When connecting TCONIC and LSIC in hardware, the TCON ports of TCONIC (IO ports with TCON functions, such as STV_IN / STV0_IN / CPV1 / CPV2 / LC_IN, etc.) and the TCON ports of LSIC may not correspond. For example, if the CPV1 PIN of LSIC is connected to a general IO port of TCON IC instead of a specific TCON port, the general IO port of TCON IC cannot output the CPV1 control signal, and therefore LSIC cannot output the specific timing required by the LCD panel. Moreover, even if TCONIC is connected to TCON ports and LSIC is connected to specific TCON ports (each TCON IC and LSIC has a certain number of TCON ports, and each TCON port has a specific function, especially for LSIC. Although the TCON ports of TCON IC can be configured to specific functions through registers, such as STV_IN / STV0_IN / CPV1 / CPV2, corresponding connections are generally required for standardization), the connection methods are diverse, making it difficult to unify or standardize the hardware and software.

[0042] 3. Separating the TCON IC and LSIC often leads to problems caused by LSIC switching. For example, when it is necessary to replace the LSIC, the replacement LSIC is incompatible with the existing LSIC logic, so it is necessary to test the screen for the new hardware, resulting in poor compatibility.

[0043] In summary, using the existing method of separating TCONIC and LSIC leads to numerous problems during the debugging and use of LCD panels. This application's embodiment integrates the functions of TCONIC and LSIC into a completely new hardware module, effectively solving the problems listed above, improving circuit design and manufacturing efficiency, and reducing circuit design and manufacturing costs.

[0044] Figure 1 This is a schematic diagram of a liquid crystal panel driving circuit 100 including a multi-functional timing control module, provided in an embodiment of this application. This circuit is typically used in display devices and specifically includes: a timing control module 101 and a power management module 102.

[0045] The timing control module 101 and the power management module 102 mentioned above can be separate chips or circuit boards composed of multiple discrete components.

[0046] like Figure 1 As shown, the timing control module 101 includes a first port P1, which is connected to the LCD panel to output control signals to the LCD panel; the power management module 102 includes a second port P2, which is connected to the LCD panel to provide power to the LCD panel.

[0047] Generally, the first port P1 and the second port P2 can be connected with the liquid crystal panel through wires. For example, the timing control module 101 and the power management module 102 can be arranged on a driving board, and the driving board is connected with the liquid crystal panel through a FFC (Flexible Flat Cable).

[0048] In the embodiment, the timing control module 101 includes a timing control unit 1011 and a level conversion unit 1012. As shown in the figure, a signal output end of the level conversion unit 1012 is connected with the first port P1, and a signal input end of the level conversion unit 1012 is connected with the timing control unit 1011. A signal output end of the timing control unit 1011 is connected with the first port P1. Figure 1

[0049] Specifically, the timing control unit 1011 is configured to generate a timing signal according to an external control signal and a certain logic, and output the timing signal to the level conversion unit 1012. The signal input end of the level conversion unit 1012 receives the timing signal and converts the level thereof. For example, the high level DVDD 3V3 is pulled up from 3.3V level to VGH, and for another example, the low level 0V input therein is reduced to VGL. The timing control unit 1011 generally inputs a square wave with a high level of 3.3V and a low level of 0V to the level conversion unit 1012, and the level conversion unit 1012 pulls up the square wave to a square wave with a high level of VGH and a low level of VGL.

[0050] As shown in the figure, the level conversion unit 1012 receives signals such as CPV1, CPV2, STV_IN, STV0_IN, LC_IN sent by the timing control unit 1011, and outputs signals such as STV, STV0, CLK1-CLK10 (the number of CLKs is different according to the timing control unit 1011), LC1&LC2, VSS1 / VSS2 after level conversion, and outputs the signals to the liquid crystal panel through the first port. At the same time, the timing control unit 1011 outputs P-P data and data latch signals LOCK, and outputs these signals to the liquid crystal panel through the first port. Figure 2

[0051] In the embodiment, the power management module 102 is connected with the timing control module 101 to provide power supply for the timing control module 101.

[0052] As shown in the figure, the power management module 102 includes a power supply unit 1021 and a power management unit 1022. The power supply unit 1021 is connected with the power management unit 1022, and the power management unit 1022 is connected with the timing control module 101. Figure 2 ​​As shown, the power management module 102 operates normally under an externally input 12V power supply and with the necessary registers written, outputting various voltages to power other modules. Specifically, it provides the timing control module 101 with DVDD1V1 (1.1V digital power supply voltage), DVDD3V3 (3.3V digital power supply voltage), VGL, and VGH voltages. The timing control unit 1011 included in the timing control module 101 receives the DVDD1V1 and DVDD3V3 signals, and the level conversion unit 1012 included in the timing control module 101 receives the DVDD3V3 signal and the VGL and VGH signals.

[0053] like Figure 2 As shown, the power management module 102 outputs AVDD (Analog Voltage Driver), HAVDD (High-Voltage Analog Voltage Driver), DVDD1V8 (1.8V digital power supply voltage), DVDD1V9 (1.9V digital power supply voltage), DVDD3V3, VGH, VGL, etc., to the LCD panel through the second port. Under normal power supply conditions and with correctly written register values, the power management module 102 can also provide the data driver module (sourcedriver) on the LCD panel with Gamma voltages such as GM1 / GM2 / GM3...GM13 / GM14 (assuming 14 GM nodes are needed) and reference voltages VCOM (VCOM1 / VCOM2), etc.

[0054] Optional, such as Figure 2 As shown, the power management module 102, the timing control unit 1011, and the level conversion unit 1012 may also include communication signal transmission terminals, which communicate with each other via an IIC bus (including SDA and SDL lines). Typically, the IIC bus can also be connected to the main control chip on the motherboard, which controls the timing control unit 1011, the level conversion unit 1012, and the power management module 102.

[0055] The liquid crystal panel driving circuit provided by the embodiment of the present application comprises a multifunctional timing control module, the level conversion unit and the timing control unit are integrated into the same timing control module, the timing control module is connected with the power management module, the first port of the timing control module is connected with the liquid crystal panel to output a control signal to the liquid crystal panel, the second port of the power management module is connected with the liquid crystal panel to provide power for the liquid crystal panel, the signal output end of the level conversion unit is connected with the first port, the signal input end is connected with the timing control unit, the signal output end of the timing control unit is connected with the first port, and the power management module provides power for the timing control module, so that the same hardware module comprising the level conversion function and the timing control function is used to perform timing control on the liquid crystal panel, the circuit provided by the embodiment of the present application has higher integration, the hardware connection between the level conversion unit and the timing control unit is fixed, the signal transmission protocol is also fixed, the problem of interface mismatch between the level conversion unit and the timing control unit is avoided, the system debugging is more convenient, and the driving circuit design and manufacturing are more efficient.

[0056] In some optional implementation manners of the embodiment, as shown in Figure 3 The power management module 102 comprises a general power management unit 1021 and a Gamma power management unit 1022, and the Gamma power management unit 1022 is connected with the general power management unit 1021.

[0057] The general power management unit 1021 is used to convert the input voltage to obtain a converted first voltage, output the first voltage to the liquid crystal panel through the second port, and obtain a converted second voltage and output the second voltage to the Gamma power management unit 1022.

[0058] As shown in Figure 3 The general power management unit 1021 receives an external input 12V voltage, converts the voltage to obtain DVDD1V8, DVDD3V3, HAVDD, AVDD, VGH, VGL and other voltages, and outputs the DVDD1V8, DVDD3V3 and HAVDD among them as the first voltage to the liquid crystal panel. At the same time, the DVDD3V3 and AVDD among them are output as the second voltage to the Gamma power management unit 1022.

[0059] The Gamma power management unit 1022 is used to generate a Gamma voltage and a reference voltage according to the second voltage, and output the Gamma voltage and the reference voltage to the liquid crystal panel through the second port.

[0060] As shown in Figure 3As shown, the Gamma voltage generated by the Gamma power management unit 1022 includes GM1 / GM2 / GM3...GM13 / GM14 (assuming 14 GM nodes are needed), and the reference voltage includes VCOM1 / VCOM2, and the Gamma voltage and the reference voltage can be output to the data driver on the liquid crystal panel.

[0061] At present, the functions of the general power management unit 1021 and the Gamma power management unit 1022 are usually realized by using two chips of PMIC (Power Management IC) and GMIC (Gamma Management IC). In the embodiment, the two functions are integrated into the same hardware module, so that the circuit structure is simplified, the number of external lines is reduced, the wiring difficulty is reduced, and the efficiency of circuit design and manufacturing is improved.

[0062] In some optional implementation manners of the embodiment, the power management module 102 inputs the gate control voltage to the timing control module 101 through the voltage input end of the timing control module 101, and the timing control module 101 inputs the gate control voltage to the level conversion unit 1012.

[0063] The gate control voltage is a voltage used for driving the switch of the GOA on the liquid crystal panel, such as Figure 2 As shown, VGH and VGL are gate control voltages. Optionally, as shown in FIG. 6, the power management module 102 includes a general power management unit 1021, which can generate VGH and VGL. VGH and VGL can be output to the timing control module 101 through the interface between the timing control module 101 and the power management module 102, and then input to the level conversion unit 1012 through the internal circuit of the timing control module 101, so that the level conversion unit 1012 converts the high and low levels of the timing signal according to VGH and VGL. Figure 3

[0064] In the embodiment, the power management module outputs the gate control voltage to the timing control module, so that a separate signal transmission line does not need to be arranged between the power management module and the level conversion unit, and the integration of the system is improved.

[0065] In some optional implementation manners of the embodiment, the power management module 102 inputs the digital power voltage to the timing control unit 1011 through the voltage input end of the timing control module 101 by the timing control module 101.

[0066] As shown in FIG. 6, the power management module 102 includes a general power management unit 1021 and a Gamma power management unit 1022. The general power management unit 1021 can generate a general voltage VDD, and the Gamma power management unit 1022 can generate a Gamma voltage and a reference voltage. Figure 2 ​As shown, the digital power supply voltage DVDD1V1 and DVDD3V3 output by the power management module 102 are output to the timing control module 101, and the timing control module 101 inputs the digital power supply voltage to the timing control unit 1011.

[0067] In this embodiment, the power management module outputs the digital power supply voltage to the timing control module 101, so that a separate signal transmission line does not need to be arranged between the power management module and the timing control unit, and the integration of the system is improved.

[0068] Figure 4 A structural schematic diagram of a display device provided in this embodiment is shown in the figure. The display device specifically includes a main board 401, a control board 402, and a liquid crystal panel 403. The main board 401 is connected to the control board 402, and the control board 402 is connected to the liquid crystal panel 403. The main board 401 and the control board 402 can be connected by a flat wire including a plurality of pins. The control board 402 and the liquid crystal panel 403 can be connected by an FFC wire. Generally, the control board 402 is connected to an X-PCB board (such as XLL, XLR, XRL, and XRR in the figure) on the liquid crystal panel 403 by the FFC wire. Figure 4

[0069] In this embodiment, the main board 401 is provided with a main control chip (for example, a SOC), and the control board 402 is provided with the liquid crystal panel driving circuit including the multifunctional timing control module. Generally, the timing control module 101 and the power management module 102 included in the liquid crystal panel driving circuit including the multifunctional timing control module can be in the form of a chip and arranged on the control board 402 (TCON board).

[0070] In this embodiment, the main control chip is used to provide the liquid crystal panel driving circuit including the multifunctional timing control module with timing signals and control signals. The liquid crystal panel 403 is used to display according to the signals output by the control board 402.

[0071] Optionally, the main control chip can be a SOC or a chip with functions such as logical operation, such as an MCU. The main control chip can run a program stored in advance, so as to generate timing signals and control signals, etc., to control the operation of the timing control module 101 and the power management module 102.

[0072] The signals output by the timing control module 101 and the power management module 102 can be output to the liquid crystal panel 403 through the interface between the control board 402 and the liquid crystal panel.

[0073] ​The display device provided by the embodiment of the present application effectively utilizes the high-integration timing control module by arranging the liquid crystal panel driving circuit containing the multifunctional timing control module on the control board, improves the integration of the driving circuit of the display device, simplifies the layout of the driving circuit, and further helps to improve the design and manufacturing efficiency of the display device.

[0074] In some optional implementation manners of the embodiment, the main power output end of the main board 401 is connected with the power management module 102 on the control board 402.

[0075] Specifically, the main board 401 can provide a main power voltage, for example, 12V, and output the 12V voltage to the power management module 102, and the power management module 102 generates various voltages.

[0076] The current display driving mode usually separates the SOC from the TCON IC and the LSIC, or integrates the SOC with the TCON IC, so that the TCON board forms a TCON-less board. This architecture also has the problems described above, and specifically mainly includes the following:

[0077] 1. When the SOC is adapted with the LSIC, the logic is easy to be confused, and the workload is increased.

[0078] 2. When the SOC and the LSIC are connected by hardware, the TCON port of the SOC and the TCON port of the LSIC may not correspond. Moreover, even if the SOC is connected to the TCON port and the LSIC is connected to a specific TCON port, the connection method is various, and it is difficult to make the hardware and software unified or standardized.

[0079] 3. Separating the SOC from the LSIC also often encounters problems caused by LSIC switching. For example, when the LSIC needs to be replaced, the replaced LSIC is not compatible with the existing LSIC logic, so the new hardware needs to be pointed to the screen, and the compatibility is poor.

[0080] In summary, using the existing SOC and LSIC separation mode, many problems will be encountered in the process of debugging and using the liquid crystal panel 403. The embodiment of the present application can well solve the above problems by integrating the functions of the SOC and the LSIC into one chip, and can improve the circuit design and manufacturing efficiency, and reduce the circuit design and manufacturing cost.

[0081] Figure 5 A structure schematic diagram of a liquid crystal panel driving device 500 provided by the embodiment of the present application is shown in FIG. 5. The circuit includes a master control chip 501 and the liquid crystal panel driving circuit 100 containing the multifunctional timing control module described in the above embodiment.

[0082] In the embodiment, the main control chip 501 comprises a main control module 5011, and the timing control module 101 comprised in the liquid crystal panel driving circuit comprising a multifunctional timing control module.

[0083] Specifically, the main control chip 501 can be a SOC chip, or a chip of a type such as MCU. The timing control module 101 is integrated in the main control chip 501, that is, the main control chip 501 can realize the functions of the timing control unit 1011 and the level conversion unit 1012.

[0084] In the embodiment, the data output end of the main control module 5011 is connected with the timing control unit 1011 comprised in the timing control module 101, and the communication signal transmission end of the main control module 5011 is connected with the timing control unit 1011, the level conversion unit 1012 comprised in the timing control module 101, and the power management module 102 comprised in the liquid crystal panel driving circuit comprising a multifunctional timing control module.

[0085] As shown in Figure 6 , the data output end of the main control module 5011 can output image data to the timing control unit 1011, and the timing control unit 1011 transmits the data to the liquid crystal panel. The connection mode among the timing control unit 1011, the level conversion unit 1012, and the power management module 102 can refer to the above Figure 2 The corresponding embodiment is not described herein.

[0086] Optionally, the main control chip 501 and the power management module 102 can be arranged on the same circuit board, or can be arranged on different circuit boards. For example, the main control chip 501 can be arranged on the main board 401, and the power management module 102 can be arranged on the control board 402, and the two circuit boards are connected through wires.

[0087] As shown in Figure 6 , the communication signal transmission end of the main control module 5011 is connected with the timing control unit 1011, the level conversion unit 1012, and the power management module 102 through an IIC (Inter-Integrated Circuit) bus (including SDA and SDL lines), so that the main control module 5011 can control the timing control unit 1011, the level conversion unit 1012, and the power management module 102.

[0088] This embodiment further improves the integration level of the LCD panel driving circuit by integrating the timing control module and the main control module into the same main control chip. Compared with the existing schemes where the main control chip and TCON IC and LSIC are set separately, the circuit provided by this embodiment has a higher degree of integration. Moreover, the hardware connection between the main control chip, the level conversion unit and the timing control unit is fixed, and the signal transmission protocol is also fixed, which avoids the problem of interface mismatch between the main control chip, the level conversion unit and the timing control unit. The system debugging is more convenient, and the design and manufacturing efficiency of the driving circuit is higher.

[0089] In some optional implementations of this embodiment, the power management module 102 inputs the gate control voltage to the timing control module 101 through the voltage input terminal of the main control chip 501, and the timing control module 101 inputs the gate control voltage to the level conversion unit 1012.

[0090] The gate control voltage is the voltage used to drive the switches on the GOA (Gateway Orifice) of the LCD panel, such as... Figure 6 As shown, VGH and VGL are the gate control voltages. Optional, such as... Figure 3 As shown, the power management module 102 includes a general power management unit 1021, which can generate VGH and VGL. VGH and VGL can be output to the timing control module 101 through the interface between the main control chip 501 and the power management module 102, and then input to the level conversion unit 1012 through the internal circuitry of the timing control module 101, so that the level conversion unit 1012 can convert the high and low levels of the timing signal according to VGH and VGL.

[0091] In this embodiment, the gate control voltage is output to the main control chip through the power management module, and then the main control chip outputs the gate control voltage to the timing control module. This eliminates the need for a separate signal transmission line between the power management module and the level conversion unit, thus improving the system integration.

[0092] In some optional implementations of this embodiment, the power management module 102 inputs the digital power supply voltage to the timing control unit 1011 through the voltage input terminal of the main control chip 501.

[0093] like Figure 6 As shown, the DVDD1V1 and DVDD3V3 output by the power management module 102 are digital power supply voltages. The digital power supply voltages are output to the main control chip 501, and the main control chip 501 inputs the digital power supply voltages to the timing control unit 1011.

[0094] The embodiment outputs the digital power voltage to the master control chip through the power management module, and outputs the digital power to the time sequence control unit by the master control chip, so that the separate signal transmission line is not arranged between the power management module and the time sequence control unit, and the integration of the system is improved.

[0095] Figure 7 Another structure schematic diagram of a display device is provided in the embodiment, and the display device specifically comprises a main board 401, a control board 402 and a liquid crystal panel 403. The main board 401 is connected with the control board 402, and the control board 402 is connected with the liquid crystal panel 403. The main board 401 and the control board 402 can be connected by a flat wire containing a plurality of pins. The control board 402 and the liquid crystal panel 403 can be connected by an FFC wire. Generally, the control board 402 is connected with an X-PCB board (such as XLL, XLR, XRL and XRR in the liquid crystal panel 403) by the FFC wire. Figure 7

[0096] In the embodiment, the main board 401 is provided with the master control chip 501 included in the liquid crystal panel driving device, and the master control chip 501 comprises the time sequence control module 101 in the liquid crystal panel driving device. The control board 402 is provided with the power management module 102 included in the liquid crystal panel driving device.

[0097] Generally, the power management module 102 can be in the form of a chip and arranged on the control board 402 (TCON board).

[0098] In the embodiment, the master control module 5011 is used to provide the time sequence control module 101 with time sequence signals and control signals.

[0099] Optionally, the master control chip 501 can be an SOC or a chip with functions such as logical operation, such as an MCU. The master control chip 501 can be integrated with the time sequence control module 101 and the master control module 5011. The master control module 5011 can contain a processor, and the processor can run a program stored in advance to generate time sequence signals and control signals to control the operation of the time sequence control module 101 and the power management module 102.

[0100] The time sequence control module 101 can output the output signals to the liquid crystal panel 403 through an interface between the control board 402 and the liquid crystal module. The power management module 102 can also output the output signals to the liquid crystal panel 403 through the interface.

[0101] ​The display device provided by the embodiment of the present application effectively utilizes the high integration of the master control chip by arranging the master control chip containing a timing control module on the mainboard and arranging the power management module on the control board, improves the integration of the driving circuit of the display device, simplifies the layout of the driving circuit, and further helps to improve the design and manufacturing efficiency of the display device.

[0102] Those skilled in the art will further appreciate that the units and algorithm steps of the examples described in connection with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, various aspects of examples have been described generally in terms of their functionality without loss of generality. Whether such functionality is implemented as hardware or software depends on the particular application and design constraints imposed on the overall architecture. Skilled persons can implement the described functionality in varying ways for each particular application, but such implementation should not be interpreted to cause a departure from the scope of the present application.

[0103] The steps of the circuits or algorithms described in connection with the embodiments disclosed herein can be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module can be located in random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0104] It should be understood that the terms used herein are for the purpose of describing particular example embodiments only and are not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms "comprises", "comprising", "includes", "including" and "has" are inclusive and therefore specify the presence of stated features, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and / or groups thereof. The steps, processes, and operations described herein are not to be construed as necessarily requiring their occurrence in the particular order in which they are described unless expressly specified as such. It is also to be understood that additional or alternative steps can be employed.

[0105] The above description is merely that of specific embodiments of the present application, and thus is not intended to limit the present application. Various modifications to these embodiments can be apparent to those skilled in the art, and the generic principles defined herein can be applied to other embodiments without departing from the spirit or scope of the application. Accordingly, the present application is not intended to be limited to the examples described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A liquid crystal panel drive circuit comprising a multi-function timing control module, characterized by, The circuit comprises a timing control module and a power management module, the timing control module comprises a first port connected with a liquid crystal panel to output a control signal to the liquid crystal panel, and the power management module comprises a second port connected with the liquid crystal panel to provide power supply for the liquid crystal panel. The timing control module comprises a level conversion unit and a timing control unit, a signal output end of the level conversion unit is connected with the first port, and a signal input end of the level conversion unit is connected with the timing control unit; a signal output end of the timing control unit is connected with the first port. The power management module is connected with the timing control module to provide power supply for the timing control module.

2. The circuit of claim 1, wherein, The power management module comprises a general power management unit and a Gamma power management unit, and the Gamma power management unit is connected with the general power management unit. The general power management unit is used to convert an input voltage to obtain a converted first voltage, and output the first voltage to the liquid crystal panel through the second port; and obtain a converted second voltage and output the second voltage to the Gamma power management unit. The Gamma power management unit is used to generate a Gamma voltage and a reference voltage according to the second voltage, and output the Gamma voltage and the reference voltage to the liquid crystal panel through the second port. The power management module inputs a gate control voltage to the timing control module through a voltage input end of the timing control module, and inputs the gate control voltage to the level conversion unit by the timing control module.

3. The circuit of claim 1, wherein, The power management module inputs a digital power voltage to the timing control unit by the timing control module through a voltage input end of the timing control module.

4. The circuit of claim 1, wherein, The display device comprises a main board, a control board and a liquid crystal panel, the main board is connected with the control board, and the control board is connected with the liquid crystal panel.

5. A display device, characterized by comprising: The main board is provided with a main control chip, and the control board is provided with the liquid crystal panel driving circuit comprising a multifunctional timing control module according to any one of claims 1-4. The main control chip is used to provide timing signals and control signals for the liquid crystal panel driving circuit comprising a multifunctional timing control module. The liquid crystal panel is used to display according to the signals output by the control board. A main power output end of the main board is connected with a power management module on the control board.

6. The display device according to claim 5, wherein The liquid crystal panel driving device comprises a main control chip and the liquid crystal panel driving circuit comprising a multifunctional timing control module according to any one of claims 1-4.

7. A liquid crystal panel drive device characterized by comprising: The main control chip comprises a main control module, and the liquid crystal panel driving circuit comprising a multifunctional timing control module comprises a timing control module. ​ The data output end of the master control module is connected with a timing control unit included in the timing control module, and the communication signal transmission end of the master control module is connected with the timing control unit, a level conversion unit included in the timing control module, and a power management module included in the liquid crystal panel driving circuit including the multifunctional timing control module.

8. The liquid crystal panel driving device according to claim 7, wherein The power management module inputs a gate control voltage to the timing control module through the voltage input end of the master control chip, and inputs the gate control voltage to the level conversion unit by the timing control module.

9. The liquid crystal panel driving apparatus according to claim 7, wherein The power management module inputs a digital power voltage to the timing control unit by the master control chip through the voltage input end of the master control chip.

10. A display device, characterized by comprising: The display device includes a main board, a control board and a liquid crystal panel, the main board is connected with the control board, and the control board is connected with the liquid crystal panel. The main board is provided with a master control chip included in the liquid crystal panel driving device according to any one of claims 7-9, the master control chip includes a timing control module in the liquid crystal panel driving device, and the control board is provided with a power management module included in the liquid crystal panel driving device. The master control module is used for providing timing signals and control signals for the timing control module. The liquid crystal panel is used for displaying according to the signals output by the control board.

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