Self-learning short-circuit protection circuit
By using a self-learning short-circuit protection circuit and leveraging an FPGA control unit and a high-speed ADC module to achieve concurrent processing, the problem of misjudgment by traditional microcontrollers under abnormal loads is solved, thus improving the system's safety and timeliness.
Patent Information
- Application Number
- CN202422986905.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-05
- Publication Date
- 2025-11-07
- Estimated Expiration
- 2034-12-05
AI Technical Summary
Traditional microcontrollers cannot simultaneously collect load voltage and current for judgment and processing when the load is abnormal, resulting in high misjudgment and reduced system safety and timeliness.
A self-learning short-circuit protection circuit is adopted, which utilizes an FPGA control unit, a high-speed ADC acquisition module, switching devices, and memory to achieve concurrent processing and self-learning. The short-circuit condition is determined by comparing load data through the parallel processing capability of the FPGA, and the switching devices are driven to turn off quickly.
It improves the speed and accuracy of short-circuit protection, reduces the false alarm rate, and enhances the security and timeliness of the system.
Smart Images

Figure CN223527766U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to short circuit protection field especially relates to a self -learning short circuit protection circuit. BACKGROUND
[0002] In the traditional singlechip, whether it is von neumann architecture or haver architecture, it is first address and then executes, and the process of execution is sequential execution in essence, when there is a special situation interruption, but when the interruption is executed, the subsequent service program is still sequentially executed. Such execution mode cannot collect load voltage and current to judge and handle at the same time when the load is abnormal, and the misjudgment is high, therefore, the safety and timeliness of the system are reduced. SUMMARY
[0003] The utility model discloses a self -learning short circuit protection circuit which overcomes the defects in the prior art.
[0004] The utility model discloses a self -learning short circuit protection circuit which overcomes the defects in the prior art.
[0005] A self -learning short circuit protection circuit, including: FPGA control unit, drive module, conversion module, memory, switching device and output collection module,
[0006] FPGA control unit is connected with drive module, conversion module, memory electricity respectively, and drive module is connected with switching device electricity, and it is used for controlling the on-off of switching device, and conversion module is connected with output collection module electricity, and it is used for transmitting the voltage or current that gathers to FPGA control unit in,
[0007] The input end of the switching device is used for electrically connecting the input power supply, the output end of the switching device is electrically connected with the output collection module, and the output end of the output collection module is also used for being electrically connected with the load.
[0008] In an embodiment, the drive module includes any combination of IGBT drive unit, MOSFET drive unit, SIC drive unit.
[0009] In an embodiment, the drive module is any one of IGBT drive unit, MOSFET drive unit, SIC drive unit.
[0010] In an embodiment, the conversion module includes output current high-speed AD conversion module and output voltage high-speed AD conversion module, the output current high-speed AD conversion module is electrically connected with the output collection module and the FPGA control unit respectively, and the output voltage high-speed AD conversion module is electrically connected with the output collection module and the FPGA control unit respectively.
[0011] In an embodiment, the short-circuit protection circuit further comprises a display screen, which is electrically connected with the FPGA control unit.
[0012] In an embodiment, the short-circuit protection circuit further comprises an absorption circuit, an input end of which is electrically connected with an input end of the switching device, and an output end of which is electrically connected with an output end of the switching device.
[0013] In an embodiment, the input power supply is a three-phase input power supply.
[0014] In an embodiment, the FPGA control unit is a self-learning FPGA chip.
[0015] In an embodiment, the switching device comprises any combination of IGBT tube, MOSFET tube and SIC tube.
[0016] In an embodiment, the switching device is any one of IGBT tube, MOSFET tube and SIC tube.
[0017] The advantages and beneficial effects of the present application compared with the prior art are as follows:
[0018] The present application is a self-learning short-circuit protection circuit, which adopts a high-speed output acquisition module, an FPGA control unit, a high-speed switching device and a memory, and utilizes the high-speed ADC output acquisition module to collect the voltage and current at the load end into the FPGA control unit. Since the FPGA is a logic device based on gates and a flip-flop, it can complete the edge triggering of the clock, thereby realizing true concurrent processing. Through the parallel processing capability of the FPGA, all the collected data are compared with the data in the FLSAH memory to determine whether the short-circuit phenomenon occurs at the rear-end load. If the load has a short-circuit condition, the switching device is directly driven to quickly shut down. If the rear-end load is a capacitive or inductive load, which leads to an excessively large starting current and misreports a short circuit, the voltage and current waveform data of this time are saved through the high-speed processing capability of the FPGA. If the same load is started again next time, the load will be normally output. The more various loads are recorded, and the more the FPGA learns, the lower the misjudgment rate of the load short circuit is. The short-circuit protection circuit of the present application can improve the rapid response and the continuous judgment and processing after interruption, reduce the misjudgment probability, and improve the safety and timeliness of the system. BRIEF DESCRIPTION OF DRAWINGS
[0019] Figure 1 It is a principle block diagram of the self-learning short-circuit protection circuit of an embodiment of the present application;
[0020] Figure 2 It is a principle block diagram of the self-learning short-circuit protection circuit of an embodiment of the present application; Figure 1The circuit diagram of the output voltage high-speed AD conversion module of the self-learning short-circuit protection circuit shown in the figure;
[0021] Figure 3 For Figure 1 The circuit diagram of the output current high-speed AD conversion module of the self-learning short-circuit protection circuit shown in the figure;
[0022] Figure 4 For Figure 1 The circuit diagram of the FPGA control unit of the self-learning short-circuit protection circuit shown in the figure;
[0023] Figure 5 For Figure 1 The circuit diagram of the memory of the self-learning short-circuit protection circuit shown in the figure;
[0024] Figure 6 For Figure 1 The circuit diagram of the driving module of the self-learning short-circuit protection circuit shown in the figure. DETAILED DESCRIPTION
[0025] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The preferred embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.
[0026] Please refer to Figures 1 to 6 A self-learning short-circuit protection circuit, comprising: a FPGA control unit, a driving module, a conversion module, a memory, a switching device and an output acquisition module. It should be noted that in the present embodiment, the input power supply is a three-phase input power supply. The FPGA control unit is a self-learning FPGA chip, please refer to Figure 4 . Wherein, FPGA (Field Programmable Gate Array) is a field programmable gate array, which is a digital circuit-based integrated chip.
[0027] Further, the FPGA control unit, as the wisdom brain of the entire system, establishes close electrical connections with the driving module, the conversion module, and the memory through high-speed data buses. This not only ensures the efficiency and accuracy of data transmission, but also endows the system with powerful data processing and logical judgment capabilities, providing a solid foundation for realizing complex short-circuit protection. The driving module, as a bridge connecting the FPGA control unit and the switching device, undertakes the task of accurately controlling the on-off state of the switching device. It quickly and accurately adjusts the switching state according to the instructions from the FPGA, effectively manages the distribution and shutdown of the input power, and thus can quickly respond when a short-circuit fault occurs to protect the circuit from damage. The conversion module plays a key role in signal conversion and transmission, and can preprocess the voltage or current signals captured by the output acquisition module and safely and accurately transmit them to the FPGA control unit for analysis. It can monitor the circuit state in real time and discover potential problems in a timely manner. Please refer to Figure 5 The memory, i.e. non-volatile memory, is responsible for storing system configuration information, historical fault records, and short-circuit protection strategies optimized through learning algorithms. This enables the circuit system to quickly recover to working state after power-off restart, and continuously optimize its protection performance using historical data, realizing true self-learning. The switching device, as the direct executor of circuit on-off, has its input end directly connected to the input power, and its output end connected to the load through the output acquisition module. The output acquisition module not only monitors the voltage and current at the output end of the switching device, but also safely delivers processed power to the load device through its output end, ensuring the stability and efficiency of the entire power transmission link.
[0028] The FPGA control unit is electrically connected with the driving module, the conversion module, and the memory; the driving module is electrically connected with the switching device for controlling the on-off of the switching device; the conversion module is electrically connected with the output acquisition module for transmitting the collected voltage or current to the FPGA control unit;
[0029] The input end of the switching device is electrically connected to the input power, and the output end of the switching device is electrically connected to the output acquisition module. The output end of the output acquisition module is also electrically connected to the load.
[0030] Please refer to Figure 6The driving module includes any combination of IGBT driving units, MOSFET driving units, and SIC driving units. The driving module can be any one of an IGBT driving unit, a MOSFET driving unit, and a SIC driving unit. The driving module can be any one of an IGBT driving unit, a MOSFET driving unit, and a SIC driving unit or any combination thereof. In this way, various options can be combined to select the most suitable driving unit for driving the switching device.
[0031] Referring to Figure 2 and Figure 3 The conversion module includes an output current high-speed AD conversion module and an output voltage high-speed AD conversion module. The output current high-speed AD conversion module is electrically connected to the output acquisition module and the FPGA control unit, respectively. The output voltage high-speed AD conversion module is electrically connected to the output acquisition module and the FPGA control unit, respectively.
[0032] Specifically, the output current high-speed AD conversion module is seamlessly electrically connected to the output acquisition module and the FPGA (Field Programmable Gate Array) control unit. This ensures that the analog current signal obtained from the output acquisition module can be converted into a digital signal in real time and accurately, and efficiently transmitted to the FPGA control unit for further processing, thereby realizing precise control and regulation of current output.
[0033] Similarly, the output voltage high-speed AD conversion module is also electrically connected to the output acquisition module and the FPGA control unit. It is responsible for converting the analog voltage signal collected by the output acquisition module into a digital signal, and also transmitting these digital signals to the FPGA control unit. According to these digital signals, the FPGA control unit can adjust the parameters of voltage output in real time to ensure the stable operation and accurate output of the system. In this way, the accuracy and speed of the system are improved, and the flexibility and scalability of the system are also enhanced, providing strong support for various complex application scenarios.
[0034] It should also be noted that the short-circuit protection circuit further includes a display screen, which is electrically connected to the FPGA control unit. The display screen is used to display the working condition of the short-circuit protection circuit, including the high and low of voltage and current, etc. In this way, by setting the display screen, users can conveniently debug and obtain parameters in real time.
[0035] In addition, the short-circuit protection circuit further includes an absorption circuit, the input end of which is electrically connected to the input end of the switching device, and the output end of which is electrically connected to the output end of the switching device. The absorption circuit is used for protection, protecting the switching device from damage. In this way, by setting the absorption circuit, the system's reliability can be effectively improved by removing the spurs and interference voltage in the circuit.
[0036] It should be noted that the switching device includes any combination of IGBT tube, MOSFET tube, SIC tube. The switching device is any one of IGBT tube, MOSFET tube, SIC tube. The switching device can be any one or any combination of IGBT tube, MOSFET tube, SIC tube.
[0037] The utility model discloses a high -speed ADC sampling chip, FPGA, high -speed switching device, memory have been adopted. Utilize high -speed ADC acquisition chip to gather the voltage and current of load end to the chip. Because FPGA is all based on the logic device of gate level, also based on flip -flop, can complete the edge trigger of clock, thereby realizes the concurrent processing of true sense, through the parallel processing capacity of FPGA, all data that ADC chip U29, U16 gather are compared with the data in U31 in FLSAH simultaneously to judge whether the short circuit phenomenon of rear -end load has taken place, if the load has short circuit situation directly drive switch tube (Sic, MOSFET, IGBT etc.) fast cut -out, if is the capacitive or inductive load of rear -end load start -up, leads to start -up current too big false alarm short circuit, then through the high -speed processing capacity of FPGA, this voltage and current waveform data are saved, if next time again start -up same load, then will normal output. Same principle various kinds of loads are recorded more and more, through the continuous learning of FPGA, and the misjudgment rate of load short circuit is lower.
[0038] The above-described embodiments only express several embodiments of the utility model, and the description is more specific and detailed, but it cannot be understood as the limitation of the utility model patent scope. It should be noted that for ordinary skilled persons in the art, without departing from the concept of the utility model, a number of variations and improvements can be made, which belong to the protection scope of the utility model. Therefore, the protection scope of the utility model patent should be subject to the appended claims.
Claims
1. A self-learning short-circuit protection circuit, characterized by The short-circuit protection circuit comprises an FPGA control unit, a driving module, a conversion module, a memory, a switching device and an output collection module. The FPGA control unit is electrically connected with the driving module, the conversion module and the memory respectively. The driving module is electrically connected with the switching device and is used for controlling the on-off of the switching device. The conversion module is electrically connected with the output collection module and is used for transmitting the collected voltage or current to the FPGA control unit.
2. The self-learning short circuit protection circuit of claim 1, wherein, The input end of the switching device is used for electrically connecting an input power supply.
3. The self-learning short circuit protection circuit of claim 1, wherein, The output end of the switching device is electrically connected with the output collection module.
4. The self-learning short circuit protection circuit of claim 1, wherein, The output end of the output collection module is also used for electrically connecting a load.
5. The self-learning short circuit protection circuit of claim 1, wherein, The driving module comprises any combination of an IGBT driving unit, a MOSFET driving unit and a SIC driving unit.
6. The self-learning short circuit protection circuit of claim 1, wherein, The driving module is any one of an IGBT driving unit, a MOSFET driving unit and a SIC driving unit.
7. The self-learning short circuit protection circuit of claim 1, wherein, The conversion module comprises an output current high-speed AD conversion module and an output voltage high-speed AD conversion module.
8. The self-learning short circuit protection circuit of claim 1, wherein, The output current high-speed AD conversion module is electrically connected with the output collection module and the FPGA control unit respectively.
9. The self-learning short circuit protection circuit of claim 1, wherein, The output voltage high-speed AD conversion module is electrically connected with the output collection module and the FPGA control unit respectively.
10. The self-learning short circuit protection circuit of claim 1, wherein, The short-circuit protection circuit further comprises a display screen which is electrically connected with the FPGA control unit. The short-circuit protection circuit further comprises an absorption circuit. The input end of the absorption circuit is electrically connected with the input end of the switching device. The output end of the absorption circuit is electrically connected with the output end of the switching device. The input power supply is a three-phase input power supply. The FPGA control unit is a self-learning FPGA chip. The switching device comprises any combination of an IGBT tube, a MOSFET tube and a SIC tube. The switching device is any one of an IGBT tube, a MOSFET tube and a SIC tube.