Wiring structure for improving impedance of signal wiring at BGA (Ball Grid Array) bonding pad

Abstract

The utility model belongs to the field of semiconductor manufacturing and chip packaging, and particularly relates to a wiring structure for improving the impedance of a signal wire at a BGA bonding pad, which is characterized in that a transmission line connected with the BGA bonding pad is arranged around the axis of the BGA bonding pad in adjacent laminates of the BGA bonding pad to introduce an additional wire with a certain length, so that an inductive load is generated along a signal path, and the impedance of the signal wire at the BGA bonding pad is improved. And the capacitive load caused by the BGA bonding pad is compensated. Impedance of a BGA bonding pad end can be effectively improved, insertion loss and return loss caused in a signal transmission process are effectively reduced, and signal transmission quality is improved. According to the wiring structure, more space and copper layers are reserved for signal wiring, which is crucial to a high-speed interface with a large number of I / Os. In addition, the wiring structure does not need to excavate many copper layers above the BGA bonding pad, so that the risk of cracking of the substrate is reduced, and the reliability of packaging is improved.

Description

Technical Field

[0001] This application relates to the fields of semiconductor manufacturing and chip packaging technology, and in particular to a wiring structure that improves the impedance of signal traces at BGA pads. Background Technology

[0002] Currently, the impedance requirement for signal transmission paths is generally around 500hm. For packaging substrates, the impedance of the entire transmission path can be divided into the impedance of traces, vias, and Ball Grid Array (BGA) pads. Impedance matching at the trace level can be adjusted by changing the trace width, spacing, and stack-up structure to ensure a good match between the trace impedance and the impedance of the chip's output port. Due to limitations in substrate manufacturer process capabilities and industry-standard design specifications, the impedance at vias and BGA pads is often lower than 500hm.

[0003] Traditional methods involve hollowing out multiple copper layers around plated through-holes (PTHs) and BGA pads. These holes are typically similar in size to the anti-pads of the PTH or BGA solder balls. However, because these holes occupy a significant amount of space and involve numerous layers, the space available for signals is limited, especially for interfaces with a large number of inputs and outputs (I / Os). Furthermore, it is known in the industry that large voids spanning several layers in the copper can lead to a high risk of dielectric layer cracking and delamination, which significantly increases the risk of substrate cracking and thus reduces package reliability. Utility Model Content

[0004] This application provides a routing structure that improves the impedance of signal traces at BGA pads. By introducing additional inductors to compensate for the impedance at BGA pads, it not only reserves more space / layers for signal traces but also achieves better package reliability.

[0005] Therefore, according to one aspect of this application, a wiring structure for improving the impedance of signal traces at BGA pads is provided, comprising BGA pads, transmission lines, and a conductive medium. The transmission line is located in an adjacent layer of the BGA pad, and the conductive medium is located in a layer of the transmission line on the side opposite to the BGA pad. The transmission line is arranged around the axis of the BGA pad, one end of the transmission line is electrically connected to the BGA pad, and the other end of the transmission line is electrically connected to the conductive medium.

[0006] Optionally, the projection of the transmission line falls within the projection area of ​​the BGA pad along its axial direction.

[0007] Optionally, the transmission line is arc-shaped.

[0008] Optionally, the center angle of the transmission line is 45°, 90°, 180° or 300°.

[0009] Optionally, the transmission line is spiral-shaped.

[0010] Optionally, the transmission line is in the form of a planar spiral.

[0011] Optionally, the transmission line is a microstrip line with an impedance of 50Ω.

[0012] The beneficial effects of the wiring structure provided in this application for improving the impedance of signal traces at BGA pads are as follows: By introducing an additional trace of a certain length in the adjacent layer of the BGA pad through the transmission line connecting the BGA pad, arranged around the axis of the BGA pad, an inductive load is generated along the signal path to compensate for the capacitive load caused by the BGA pad. This effectively increases the impedance at the BGA pad end, allowing for corresponding design based on the different impedance requirements of different signals, thus improving the impedance matching degree in the signal transmission path; it effectively reduces insertion loss and return loss during signal transmission, improving signal transmission quality; and there are no strict trace width requirements for this section of trace, meeting the production requirements of most substrate manufacturers.

[0013] Furthermore, compared to traditional methods of controlling impedance around BGA pads, the routing structure of this application reserves more space and copper layers for signal routing, which is crucial for high-speed interfaces with a large number of I / Os. In addition, this routing structure eliminates the need to cut out many copper layers above the BGA pads, reducing the risk of substrate cracking and thus improving package reliability. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0015] in:

[0016] Figure 1 This is a schematic diagram of the standard routing method for signal transmission lines connecting to BGA pads;

[0017] Figure 2 This is a schematic diagram of a wiring structure for increasing the impedance of signal traces at BGA pads, as shown in one embodiment of this application.

[0018] Figure 3These are TDR diagrams of the packaging substrate after using the wiring structures corresponding to different arc-shaped transmission lines in the embodiments of this application;

[0019] Figure 4 This is a return loss diagram of the packaging substrate after using the wiring structure corresponding to different arc-shaped transmission lines in the embodiments of this application;

[0020] Figure 5 This is an insertion loss diagram of the packaging substrate after using the wiring structure corresponding to different arc-shaped transmission lines in the embodiments of this application;

[0021] Figure 6 This is a comparison diagram of the wiring structure used in the embodiments of this application in a 10-layer package substrate and a TDR with a hole cut out above the BGA pads;

[0022] Figure 7 This is a comparison diagram of the return loss of the wiring structure used in the embodiments of this application in a 10-layer package substrate and the return loss of the substrate with the hole cut out above the BGA pads.

[0023] Figure 8 This is a comparison diagram of the insertion loss of the wiring structure used in the embodiments of this application in a 10-layer package substrate and the insertion loss of the substrate with the hole cut out above the BGA pads.

[0024] Figure 9 This is an impedance comparison diagram of using the wiring structure of the embodiment of this application in a 14-layer package substrate with one layer cut out on top and five layers cut out above the BGA pads;

[0025] Figure 10 This is a comparison diagram of return loss when using the wiring structure of the embodiment of this application on a 14-layer package substrate with one layer cut out on top, and five layers cut out above the BGA pads.

[0026] Figure 11 This is a comparison diagram of insertion loss when using the wiring structure of the present application embodiment on a 14-layer package substrate with one layer cut out on top, versus cutting out five layers above the BGA pads.

[0027] Explanation of key component symbols:

[0028] 100, BGA pad; 200, BGA solder ball; 300, transmission line; 400, conductive medium. Detailed Implementation

[0029] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many other different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of this application.

[0030] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0031] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0033] It should be noted that the conventional routing method for signal transmission lines connecting BGA pads is as follows: Figure 1 As shown, in order to reduce losses in the transmission path, the transmission path is made as short as possible to reduce transmission loss. With this routing method, the characteristic impedance around the BGA pad is much lower than the system impedance. In high-speed interfaces such as DDR5, impedance mismatch will greatly affect the interconnect behavior, such as causing greater signal reflection and transmission loss, thereby reducing system performance.

[0034] For single-ended signal traces, the traditional approach is to hollow out multiple copper layers around the BGA pads, with the vias typically similar in size to the anti-pads of the BGA solder balls. However, because these vias occupy a significant amount of space and numerous layers, the space available for the signal is limited, especially for interfaces with a large number of inputs and outputs (I / O). Furthermore, it is known in the industry that large voids spanning several copper layers can lead to a high risk of dielectric layer cracking and delamination, which significantly increases the risk of substrate cracking and thus reduces package reliability.

[0035] To address the aforementioned problems, according to one aspect of this application, embodiments of this application provide a routing structure that increases the impedance of signal traces at BGA pads, such as... Figure 2As shown, the wiring structure includes a BGA pad 100, a transmission line 300, and a conductive dielectric 400. The transmission line 300 is located in an adjacent layer (not shown) to the BGA pad 100, and the conductive dielectric 400 is located in a layer (not shown) on the side of the layer containing the transmission line 300 away from the BGA pad 100. The transmission line 300 is arranged around the axis of the BGA pad 100, with one end electrically connected to the BGA pad 100 and the other end electrically connected to the conductive dielectric 400. The transmission line 300 can be a microstrip line with an impedance of 50Ω.

[0036] In the axial direction of the BGA pad 100, the projection of the transmission line 300 falls within the projection area of ​​the BGA pad 100.

[0037] In this embodiment, an additional trace of a certain length is introduced in the adjacent layer of the BGA pad 100 by means of a transmission line 300 connecting the BGA pad 100, arranged around the axis of the BGA pad 100. This generates an inductive load along the signal path to compensate for the capacitive load caused by the BGA pad 100. This effectively increases the impedance at the BGA pad 100 end, allowing for corresponding design based on the different impedance requirements of different signals, thus improving impedance matching in the signal transmission path. It also effectively reduces insertion loss and return loss during signal transmission, improving signal transmission quality. Furthermore, there are no strict trace width requirements for this trace, meeting the production requirements of most substrate manufacturers.

[0038] Furthermore, compared to traditional methods of controlling impedance around BGA pads, the routing structure of this application reserves more space and copper layers for signal routing, which is crucial for high-speed interfaces with a large number of I / Os. In addition, this routing structure eliminates the need to cut out many copper layers above the BGA pads 100, reducing the risk of substrate cracking and thus improving package reliability.

[0039] Understandably, the winding angle of transmission line 300 is used to control the length of transmission line 300. For example... Figures 3-5 As shown, a comparison is made between a circular arc transmission line 300 with center angles of 45°, 90°, 180°, and 300° and a conventional no-wound design. It is observed that good impedance matching can be achieved by adjusting the length of the transmission line 300 (i.e., the center angle corresponding to the circular arc transmission line 300). Significant improvements in return loss and insertion loss are also observed compared to the conventional design.

[0040] It is conceivable that in other embodiments, the transmission line 300 may also be wound in a spiral shape, preferably a planar spiral shape.

[0041] Because BGA pad 100 exhibits a capacitive effect, the characteristic impedance around BGA pad 100 is much lower than the system impedance. The traditional optimization method is to remove multiple layers directly above BGA pad 100, with the cut-out size being similar to that of BGA pad 100.

[0042] In one embodiment, simulation verification and comparison are performed based on a 10-layer packaging substrate, comparing the wiring structure with that of the embodiments of this application using traditional optimization methods. Figures 6-8 As shown, viod1 represents a 1-layer cutout directly above the BGA pad, viod2 represents a 2-layer cutout, and so on. From the TDR impedance results, it can be seen that the lowest impedance (36.5) when cutting out 3 layers in the conventional optimization method is comparable to the routing structure in this embodiment (36.1). Within the 0-10GHz bandwidth range, the return loss results show that within the 0-4.5GHz bandwidth range, the routing structure with 2 layers cut out in the conventional optimization method is comparable to the routing structure in this embodiment; within the 4.5-10GHz bandwidth range, the routing structure in this embodiment is superior to the conventional optimization method. Within the 0-10GHz bandwidth range, the insertion loss results show that the routing structure with 2 layers cut out in the conventional optimization method is comparable to the routing structure in this embodiment. Therefore, the routing structure in this embodiment is more conducive to retaining more trace space and copper layers, achieving better package reliability.

[0043] It is conceivable that in other embodiments, the wiring structure described in this application embodiment, combined with the method of hollowing out the top, can also be used to increase the impedance of the signal traces at the BGA pads. For example... Figures 9-11 As shown, based on a 14-layer package substrate, simulation verification was conducted by comparing the wiring structure of this application embodiment with one layer cut out on top (i.e., the 12th layer is cut out in conjunction with the wiring on the 13th layer, which is represented by dashed lines in the figure) with five layers cut out above the BGA pads (i.e., the 13th to 9th layers are cut out, which is represented by solid lines in the figure). The comparison shows that, in terms of impedance matching, return loss, and insertion loss, the wiring structure of this application embodiment with one layer cut out on top is superior to the method of cutting out multiple layers above the BGA pads.

[0044] According to another aspect of this application, embodiments of this application also provide a routing method to increase the impedance of signal traces at BGA pads, such as... Figure 2 As shown, the transmission line 300 connecting the BGA pad 100 is arranged around the axis of the BGA pad 100 in a layer (not shown) adjacent to the BGA pad 100 to generate an inductive load along the signal path and compensate for the capacitive load caused by the BGA pad 100.

[0045] In the axial direction of the BGA pad 100, the projection of the signal transmission line 300 in the layer adjacent to the BGA pad 100 falls into the projection area of ​​the BGA pad 100.

[0046] Optionally, as needed, the transmission line 300 can be designed as an arc or a planar spiral in the layer adjacent to the BGA pad 100.

[0047] In summary, implementing the wiring structure provided in this application's embodiments compensates for the capacitive load of the BGA pads by introducing additional inductance. Impedance discontinuities have been addressed by using trace windings near the BGA pads. Results show that the impedance around the BGA pads can be optimized to levels close to system requirements. With proper impedance matching, simulations at 10 GHz yielded good electrical performance.

[0048] Compared to traditional methods for controlling impedance around BGA pads, the routing structure of this application reserves more space and copper layers for signal routing, which is crucial for high-speed interfaces with a large number of I / Os. Furthermore, the routing structure of this application does not require extensive copper layer removal above the BGA pads, which significantly reduces the risk of substrate cracking, thereby improving package reliability.

[0049] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0050] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A routing structure for improving the impedance of signal traces at BGA pads, characterized in that, The device includes BGA pads, transmission lines, and a conductive medium. The transmission lines are located in the adjacent layer of the BGA pads, and the conductive medium is located in the layer of the transmission lines on the side opposite to the BGA pads. The transmission lines are arranged around the axis of the BGA pads, with one end electrically connected to the BGA pads and the other end electrically connected to the conductive medium.

2. The wiring structure for improving the impedance of signal traces at BGA pads according to claim 1, characterized in that, Along the axial direction of the BGA pad, the projection of the transmission line falls within the projection area of ​​the BGA pad.

3. The wiring structure for increasing the impedance of signal traces at BGA pads according to claim 1, characterized in that, The transmission line is arc-shaped.

4. The wiring structure for improving the impedance of signal traces at BGA pads according to claim 3, characterized in that, The center angle of the transmission line is 45°, 90°, 180° or 300°.

5. The routing structure for improving the impedance of signal traces at BGA pads according to claim 1, characterized in that, The transmission line is spiral-shaped.

6. The wiring structure for improving the impedance of signal traces at BGA pads according to claim 5, characterized in that, The transmission line is in the shape of a planar spiral.

7. The routing structure for improving the impedance of signal traces at BGA pads according to claim 1, characterized in that, The transmission line is a microstrip line with an impedance of 50Ω.

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