Cleaning device of chip testing equipment and chip testing equipment
By designing a cleaning device for chip testing equipment, a first adsorption mechanism is used to transport the entire chip, and a second adsorption mechanism is used to suck up debris. Combined with vision components and drive components, the problem of the inability to clean damaged chips in the existing technology is solved, and a highly efficient and automated cleaning effect is achieved.
Patent Information
- Application Number
- CN202422393842.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-30
- Publication Date
- 2025-11-14
- Estimated Expiration
- 2034-09-30
AI Technical Summary
Existing technologies cannot perform targeted cleaning for chip damage, resulting in low cleaning efficiency of chip test kits.
A cleaning device for chip testing equipment is designed, comprising a support base, a first adsorption mechanism and a second adsorption mechanism. The first adsorption mechanism is used to adsorb and transport the entire chip, and the second adsorption mechanism is used to suck up chip fragments. Combined with vision components and drive components, automated cleaning is achieved.
This technology enables targeted cleaning based on chip damage, improving the cleaning efficiency and effectiveness of chip test boxes, reducing labor costs, and enhancing the stability and automation of the cleaning device.
Smart Images

Figure CN223543634U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of semiconductor chip technology, and in particular to a cleaning device and chip testing equipment for chip testing. Background Technology
[0002] After chip fabrication and packaging, multiple electrical performance tests are typically performed as needed. Common tests include UIS (Unclamped Inductive Switching) failure, DC testing, and AC testing. If a chip fails the AC test, it may crack; some chips may break into fragments, while others may develop one or more cracks, but their overall shape remains unchanged. While existing cleaning devices exist for cleaning chip test cases, they cannot be tailored to the specific damage condition of the chip. Therefore, there is an urgent need to design a cleaning device that can clean the test case based on the specific damage condition of the chip. Utility Model Content
[0003] The first objective of this invention is to provide a cleaning device for chip testing equipment, thereby solving the technical problem in the prior art that the test box cannot be cleaned in the case of chip damage.
[0004] The second aspect of this invention aims to provide a chip testing device that includes the aforementioned cleaning apparatus.
[0005] According to the first aspect of the present invention, the present invention provides a cleaning device for chip testing equipment, comprising:
[0006] Support base;
[0007] A first adsorption mechanism is mounted on the support base and configured to controllably adsorb the entire chip under test that is cracked inside the test box of the chip testing equipment, and to transport the entire chip under test.
[0008] A second adsorption mechanism is mounted on the support base and has a receiving box. The second adsorption mechanism is configured to controllably draw air to suck fragments of the cracked chip under test inside the test box into the receiving box.
[0009] Optionally, the second adsorption mechanism includes:
[0010] A vacuum generator, which is connected to both the support base and the receiving box;
[0011] A first suction nozzle is connected to the bottom of the vacuum generator and has a first suction port for sucking up fragments of the cracked chip under test.
[0012] Optionally, the size of the first adsorption port is larger than the size of the mounting position on the test box where the chip under test is placed, and the first adsorption port is configured to completely cover the mounting position when adsorbing fragments of the chip under test.
[0013] Optionally, the receiving box includes:
[0014] The first housing has an air port that communicates with the vacuum generator;
[0015] The second box is located below the first box and is detachably connected to the first box.
[0016] Optionally, the first adsorption mechanism includes:
[0017] An adsorption rod, wherein the adsorption rod has an air passage inside, and the air passage is connected to an air extraction device;
[0018] The second suction nozzle is disposed at the bottom of the adsorption rod and has a second adsorption port communicating with the air passage. The second adsorption port is used to adsorb the entire chip under test.
[0019] The waste box contains a second adsorption port that adsorbs the entire chip under test and transports it to the waste box.
[0020] Optionally, the cleaning device further includes:
[0021] A vision component, mounted on the support, is used to obtain the damage status of the chip under test on the test box.
[0022] Optionally, the cleaning device further includes:
[0023] A first drive assembly is mounted on the support base and connected to the first adsorption mechanism and the second adsorption mechanism respectively, for controlled movement of the first adsorption mechanism and the second adsorption mechanism along the longitudinal direction of the cleaning device.
[0024] Optionally, the cleaning device further includes:
[0025] The controller is connected to the vision component and the first drive component respectively, and is configured to control the first adsorption mechanism or the second adsorption mechanism to clean the cracked chip under test in the test box according to the damage condition of the chip under test on the test box.
[0026] Optionally, the cleaning device further includes:
[0027] A second drive assembly, mounted on the support and connected to the vision assembly, is used to controllably move the vision assembly longitudinally along the cleaning device.
[0028] According to the second aspect of the present invention, the present invention also provides a chip testing device, comprising:
[0029] A truss is arranged along the left-right direction of the chip testing equipment;
[0030] At least one test box is located below the truss and is spaced apart along the left and right directions of the chip testing equipment;
[0031] As described above, the cleaning device is slidably connected to the truss and can be controlled to slide in the left-right direction of the chip testing equipment to move above the corresponding test box, thereby cleaning the cracked chip under test inside the test box.
[0032] In the cleaning device of this chip testing equipment, a first adsorption mechanism and a second adsorption mechanism are respectively mounted on a support base. The first adsorption mechanism is configured to controllably adsorb the entire cracked chip under test inside the test box of the chip testing equipment, and can transport the entire chip under test. The second adsorption mechanism is configured to controllably evacuate air to suck the fragments of the cracked chip under test inside the test box into a receiving box. The above technical solution designs two adsorption mechanisms. The first adsorption mechanism is used to adsorb the cracked entire chip, which is convenient for recycling and analysis. The second adsorption mechanism can suck the chip fragments in the test box into the receiving box, which can clean the test box. It is highly targeted and can adopt different cleaning methods according to the damage of the chip, which can meet various user needs.
[0033] The above and other objects, advantages and features of this utility model will become more apparent to those skilled in the art from the following detailed description of specific embodiments of this utility model in conjunction with the accompanying drawings. Attached Figure Description
[0034] The following sections will describe some specific embodiments of the present invention in a detailed manner by way of example and not limitation, with reference to the accompanying drawings. The same reference numerals in the drawings denote the same or similar parts or components. Those skilled in the art should understand that these drawings are not necessarily drawn to scale. In the drawings:
[0035] Figure 1 This is a schematic structural diagram of a cleaning device from one angle according to one embodiment of the present invention;
[0036] Figure 2 This is a schematic structural diagram of a cleaning device from another angle according to one embodiment of the present invention;
[0037] Figure 3 This is a schematic structural diagram of a test box according to an embodiment of the present invention;
[0038] Figure 4 This is a schematic structural diagram of a waste box according to an embodiment of the present utility model;
[0039] Figure 5 This is a schematic structural diagram of a vacuum generator according to an embodiment of the present invention;
[0040] Figure 6 This is a schematic structural diagram of a receiving box according to an embodiment of the present utility model;
[0041] Figure 7 This is a schematic structural diagram of a first adsorption mechanism according to an embodiment of the present invention;
[0042] Figure 8 This is a schematic structural diagram of a chip testing device according to an embodiment of the present invention.
[0043] Explanation of reference numerals in the attached figures:
[0044] 100-Cleaning device, 10-Support base, 20-First adsorption mechanism, 21-Adsorption rod, 22-Second suction nozzle, 221-Second adsorption port, 30-Second adsorption mechanism, 31-Collection box, 311-First box body, 32-Second box body, 311-Air port, 32-Vacuum generator, 33-First suction nozzle, 331-First adsorption port, 40-Vision component, 50-First drive component, 60-Second drive component, 200-Waste box, 300-Truss, 400-Test box. Detailed Implementation
[0045] The embodiments of this utility model are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this utility model, and should not be construed as limiting this utility model.
[0046] In the description of this utility model, it should be understood that the terms "upper", "lower", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.
[0047] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature, that is, include one or more of that feature. In the description of this utility model, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified. When a feature "includes or contains" one or more of the features it encompasses, unless otherwise specifically described, this indicates that other features are not excluded and may be further included.
[0048] Unless otherwise expressly specified and limited, the term "connection" and similar terms should be interpreted broadly. For example, it can refer to a fixed connection, a detachable connection, or an integral connection; it can refer to a mechanical connection or an electrical connection; it can refer to a direct connection or an indirect connection through an intermediate medium; it can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art should be able to understand the specific meaning of the above terms in this utility model according to the specific circumstances.
[0049] Unless otherwise specified, all terms (including technical and scientific terms) used in the description of this embodiment have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.
[0050] Figure 1 This is a schematic structural diagram of a cleaning device 100 from one angle according to one embodiment of the present invention. Figure 2 This is a schematic structural diagram of the cleaning device 100 from another angle according to one embodiment of the present invention. Figure 3 This is a schematic structural diagram of a test box 400 according to an embodiment of the present invention. Figure 4 This is a schematic structural diagram of a waste box 200 according to an embodiment of the present utility model.
[0051] like Figures 1-4 As shown, the cleaning device 100 of the chip testing equipment includes a support base 10, a first adsorption mechanism 20, and a second adsorption mechanism 30. The first adsorption mechanism 20 is mounted on the support base 10 and is configured to controllably adsorb and transport broken, whole chips under test within the test cassette 400 of the chip testing equipment. The second adsorption mechanism 30 is mounted on the support base 10 and has a receiving cassette 31. The second adsorption mechanism 30 is configured to controllably extract air to draw fragments of the broken chips under test from the test cassette 400 into the receiving cassette 31.
[0052] Here, it can be understood that the first adsorption mechanism 20 and the second adsorption mechanism 30 are respectively installed on the support base 10, and the support base 10 can fix the first adsorption mechanism 20 and the second adsorption mechanism 30. A cracked whole chip under test inside the test box 400 refers to a chip under test with surface cracks but not completely cracked. Such a chip under test still has research value. The user can use the first adsorption mechanism 20 to transport the whole chip under test to the waste box 200 for collection, so that the whole chip under test can be retrieved later. Fragments of the cracked chip under test inside the test box 400 can be considered to have no research value. The user can use the second adsorption mechanism 30 to suck the fragments into the collection box 31, and then clean up the fragments gathered in the collection box 31.
[0053] The above technical solution incorporates two adsorption mechanisms. The first adsorption mechanism 20 adsorbs the entire broken chip for easy recycling and analysis. The second adsorption mechanism 30 draws the chip fragments from the test box 400 into a collection box, cleaning the test box 400. This invention provides a highly targeted solution, employing different cleaning methods depending on the chip's damage, thus meeting various user needs.
[0054] Figure 5 This is a schematic structural diagram of a vacuum generator 32 according to one embodiment of the present invention. In some embodiments, such as Figure 5 As shown, the second adsorption mechanism 30 includes a vacuum generator 32 and a first suction nozzle 33. The vacuum generator 32 is connected to the support base 10 and the receiving box 31. The first suction nozzle 33 is connected to the bottom of the vacuum generator 32 and has a first adsorption port 331 for sucking up fragments of the cracked chip under test.
[0055] The vacuum generator 32 utilizes a positive pressure air source to generate negative pressure, and then injects compressed air at high speed through a nozzle connected to the central interface. This creates a jet at the nozzle exit, generating a suction flow that continuously draws away the air around the nozzle exit, thus reducing the pressure inside the vacuum generator 32 to below atmospheric pressure, creating a certain degree of vacuum. In this way, the vacuum generator 32 can adsorb fragments of the cracked chip under test through the first adsorption port 331. After entering the cavity of the vacuum generator 32 through the first adsorption port 331, the fragments enter the collection box 31, allowing for unified collection and facilitating subsequent centralized cleaning of the fragments. This effectively improves the cleaning efficiency of the test box 400.
[0056] The vacuum generator 32 can quickly generate negative pressure in a short time. The "adsorption force" generated by the negative pressure can effectively suck the debris in the test box 400 into the collection box 31. It is not only fast and convenient, but also can completely clean the debris in the test box 400, thereby improving the cleaning effect of the test box 400.
[0057] The vacuum generator 32 also has the advantages of simple structure and light weight, which is conducive to the assembly of the cleaning device 100 and also helps to improve the structural stability of the cleaning device 100.
[0058] When a chip fails to break into many small fragments during testing, the chip fragments inside the test box 400 are too small to be handled manually. The second adsorption mechanism 30 uses vacuum adsorption to quickly clean the broken chip fragments inside the test box 400, which can reduce labor costs and make it convenient and quick to clean the small chip fragments, thereby improving cleaning efficiency and cleaning effect.
[0059] In some embodiments, the size of the first adsorption port 331 is larger than the size of the mounting position on the test box 400 where the chip under test is placed, and the first adsorption port 331 is configured to completely cover the mounting position when adsorbing fragments of the chip under test.
[0060] In some embodiments, the mounting position inside the test box 400 may be square, and the first adsorption port 331 may be circular. The diameter of the first adsorption port 331 is larger than the side length of the mounting position, so that the first adsorption port 331 can completely cover the mounting position. This can effectively ensure that the second adsorption mechanism 30 cleans all the fragments of the tested chip inside the entire test box 400 through the first adsorption port 331, thereby improving the cleaning effect of the cleaning device 100.
[0061] In other embodiments, the shapes of the first adsorption port 331 and the mounting position can be set according to actual needs. For example, the first adsorption port 331 can be set as square and the mounting position can be set as circular.
[0062] Figure 6 This is a schematic structural diagram of a receiving box 31 according to one embodiment of the present invention. In some embodiments, such as Figure 6 As shown, the receiving box 31 includes a first box body 311 and a second box body 312. The first box body 311 has an air port 3111 that communicates with the vacuum generator 32. The second box body 312 is located below the first box body 311 and is detachably connected to the first box body 311.
[0063] Specifically, an air vent 3111 is provided on the side of the first box 311 away from the second box 312. Chip fragments enter the cavity through the first suction port 331 of the vacuum generator 32, and then enter the first box 311 through the air vent 3111 connected to the vacuum generator 32, thus being collected uniformly in the receiving box 31. The first box 311 and the second box 312 are detachably connected, allowing for quick disassembly and convenient periodic cleaning of the chip fragments in the receiving box 31.
[0064] Figure 7This is a schematic structural diagram of the first adsorption mechanism 20 according to one embodiment of the present invention. In some embodiments, such as Figure 7 As shown, the first adsorption mechanism 20 includes an adsorption rod 21, a second suction nozzle 22, and a waste container 200. The adsorption rod 21 has an internal air passage that communicates with a vacuum device. The second suction nozzle 22 is located at the bottom of the adsorption rod 21 and has a second adsorption port 221 communicating with the air passage. The second adsorption port 221 is used to adsorb the entire chip under test. The second adsorption port 221 adsorbs the entire chip under test and transports it to the waste container 200. See also... Figure 4 The waste box 200 has multiple spaces for placing the entire chip under test.
[0065] The air extraction device is connected to the air passage inside the adsorption rod 21. When the air extraction device extracts air, the air at the second adsorption port 221 is drawn into the air extraction device, and a vacuum is gradually formed inside the air passage. A vacuum adsorption force is formed at the second adsorption port 221. The entire chip under test is adsorbed by this vacuum adsorption force. This can efficiently process the entire chip under test in the test box 400 and improve the cleaning efficiency of the test box 400.
[0066] In some embodiments, the diameter of the second adsorption port 221 can be made smaller, thus reducing the impact and wear on the second adsorption port 221, extending the service life of the first adsorption mechanism 20, and helping to reduce maintenance costs and frequency. A smaller diameter of the second adsorption port 221 also helps reduce the risk of clogging of the second suction nozzle 22. During adsorption, there may be tiny particles or impurities on the surface of the chip being tested. A smaller second adsorption port 221 is less likely to be clogged by these tiny particles or impurities, thereby improving the adsorption stability of the first adsorption mechanism 20.
[0067] In some embodiments, the degree of cracking of the chip under test can be observed and judged by the naked eye. Based on the degree of cracking, the first adsorption mechanism 20 or the second adsorption mechanism 30 can be selected to clean the chip under test within the test box 400. Alternatively, the first adsorption mechanism 20 and / or the second adsorption mechanism 30 can be used to clean the chip under test according to customer needs.
[0068] In some embodiments, see Figure 1 The cleaning device 100 also includes a vision component 40, which is mounted on the support base 10 and used to obtain the damage status of the chip under test on the test box 400. Here, using the vision component 40 to replace manual observation of the chip under test can improve the efficiency and accuracy of the judgment.
[0069] The vision component 40 includes a camera and a lens. The vision component 40 generates an image of the chip under test on the test box 400 and transmits the image to an image analysis tool, such as a computer, for analysis. The image analysis tool determines the damage condition of the chip under test by analyzing the area and grayscale value of the chip under test in the image. This embodiment, through the vision component 40, enables automated detection of damage to the chip under test, improving the accuracy and efficiency of damage assessment and thus enhancing the cleaning efficiency of the test box 400.
[0070] In some embodiments, the cleaning device 100 further includes a first drive assembly 50. The first drive assembly 50 is mounted on the support base 10 and is connected to the first adsorption mechanism 20 and the second adsorption mechanism 30 respectively, for controlled movement of the first adsorption mechanism 20 and the second adsorption mechanism 30 along the longitudinal direction of the cleaning device 100.
[0071] The first driving component 50 can drive the first adsorption mechanism 20 and the second adsorption mechanism 30 to move longitudinally along the cleaning device 100. Thus, when the cleaning device 100 needs to adsorb the entire chip under test, the first adsorption mechanism 20 is controlled to move directly above the test box 400, and then driven to move downwards longitudinally along the cleaning device 100, allowing the first adsorption mechanism 20 to adsorb the entire chip under test within the test box 400. When the cleaning device 100 needs to clean fragments of a cracked chip under test, the second adsorption mechanism 30 is controlled to move directly above the test box 400, and then driven to move downwards longitudinally along the cleaning device 100, allowing the second adsorption mechanism 30 to adsorb the fragments of the cracked chip under test within the test box 400.
[0072] In some embodiments, the cleaning device 100 further includes a controller connected to the vision component 40 and the first drive component 50, respectively, and configured to control the first adsorption mechanism 20 or the second adsorption mechanism 30 to clean the cracked test chip inside the test box 400 according to the damage condition of the test chip on the test box 400. Here, the cracked test chip refers to two types of test chips with different degrees of cracking: one is a whole test chip with cracks on the surface but not completely cracked, and the other is fragments of a completely cracked test chip.
[0073] When the vision component 40 detects the entire chip under test, the controller controls the first adsorption mechanism 20 to clean the entire chip under test inside the test box 400. When the vision component 40 detects fragments of a cracked chip under test, the controller controls the second adsorption mechanism 30 to clean the fragments of the chip under test.
[0074] This embodiment utilizes a controller to precisely control the operating status of the cleaning device 100, achieving automated control, which can improve the operating efficiency and stability of the cleaning device 100, thereby improving cleaning efficiency and cleaning effect.
[0075] In some embodiments, the cleaning device 100 further includes a second drive assembly 60, which is mounted on the support base 10 and connected to the vision assembly 40 for controlled movement of the vision assembly 40 along the longitudinal direction of the cleaning device 100.
[0076] This embodiment uses the second driving component 60 to adjust the focal length of the vision component 40, so that the cracked chip under test in the test box 400 can be clearly imaged, ensuring the stable imaging quality of the vision component 40 and improving the accuracy of the detection by the vision component 40.
[0077] Figure 8 This is a schematic structural diagram of a chip testing device according to one embodiment of the present invention. The present invention also provides a chip testing device, such as… Figure 8 As shown, and see Figure 3 The chip testing equipment includes a truss 300, at least one test box 400, and the aforementioned cleaning device 100. The truss 300 is arranged along the left-right direction of the chip testing equipment. The test boxes 400 are located below the truss 300 and are spaced apart along the left-right direction of the chip testing equipment. Each of the plurality of waste boxes 200 is positioned close to one test box 400. The cleaning device 100 is slidably connected to the truss 300 and is controlled to slide along the left-right direction of the chip testing equipment to move above the corresponding test box 400, thereby cleaning the cracked chip under test within the test box 400.
[0078] Here, the arrangement direction of the test box 400 is consistent with the arrangement direction of the truss 300. The test box 400 is used to load the chip under test. Figure 3 The diagram illustrates the position of the test box 400 in a test station. In the chip testing equipment, multiple test stations are arranged side by side, so that the cleaning device 100 can clean the test boxes 400 at different stations when it moves along the truss 300.
[0079] The support base 10 of the cleaning device 100 is slidably connected to the truss 300, controlling the cleaning device 100 to slide in the left-right direction along the chip testing equipment. Depending on the condition of the cracked chip under test inside the test box 400 to be cleaned, the first adsorption mechanism 20 or the second adsorption mechanism 30 moves above the test box 400. The first adsorption mechanism 20 or the second adsorption mechanism 30 moves longitudinally along the cleaning device 100 under the movement of the first drive assembly 50, thereby cleaning the cracked chip under test inside the test box 400.
[0080] A waste container 200 is located next to the test box 400, which facilitates the movement of the cracked whole chip under test inside the test box 400 into the waste container 200 via the first adsorption mechanism 20. Meanwhile, fragments of the cracked chip under test inside the test box 400 are sucked into a collection box 31 by the second adsorption mechanism 30, thus ensuring that the fragments are collected uniformly in the collection box 31. This facilitates subsequent centralized cleaning of chip fragments and effectively improves the cleaning efficiency of the test box 400.
[0081] In the cleaning device of this chip testing equipment, a first adsorption mechanism and a second adsorption mechanism are respectively mounted on a support base. The first adsorption mechanism is configured to controllably adsorb the entire chip being tested that has cracked inside the test box 400 and transport the entire chip to a waste box. The second adsorption mechanism is configured to controllably extract air to suck the fragments of the chip being cracked inside the test box 400 into a collection box. The above technical solution designs two adsorption mechanisms. The first adsorption mechanism is used to adsorb the entire cracked chip for easy recycling and analysis, while the second adsorption mechanism can suck the chip fragments from the test box 400 into the collection box, effectively cleaning the test box 400. This design is highly targeted, allowing different cleaning methods to be used depending on the chip's damage condition, thus meeting various user needs.
[0082] Therefore, those skilled in the art should recognize that although many exemplary embodiments of the present invention have been shown and described in detail herein, many other variations or modifications conforming to the principles of the present invention can be directly determined or derived from the disclosure of the present invention without departing from the spirit and scope of the present invention. Therefore, the scope of the present invention should be understood and recognized as covering all such other variations or modifications.
Claims
1. A cleaning device for a chip testing equipment, characterized in that, include: Support base; A first adsorption mechanism is mounted on the support base and configured to controllably adsorb the entire chip under test that is cracked inside the test box of the chip testing equipment, and to transport the entire chip under test. A second adsorption mechanism is mounted on the support base and has a receiving box. The second adsorption mechanism is configured to controllably draw air to suck fragments of the cracked chip under test inside the test box into the receiving box.
2. The cleaning device according to claim 1, characterized in that, The second adsorption mechanism includes: A vacuum generator, which is connected to both the support base and the receiving box; A first suction nozzle is connected to the bottom of the vacuum generator and has a first suction port for sucking up fragments of the cracked chip under test.
3. The cleaning device according to claim 2, characterized in that, The size of the first adsorption port is larger than the size of the mounting position on the test box where the chip under test is placed, and the first adsorption port is configured to completely cover the mounting position when adsorbing fragments of the chip under test.
4. The cleaning device according to claim 2, characterized in that, The receiving box includes: The first housing has an air port that communicates with the vacuum generator; The second box is located below the first box and is detachably connected to the first box.
5. The cleaning device according to claim 1, characterized in that, The first adsorption mechanism includes: An adsorption rod, wherein the adsorption rod has an air passage inside, and the air passage is connected to an air extraction device; The second suction nozzle is disposed at the bottom of the adsorption rod and has a second adsorption port communicating with the air passage. The second adsorption port is used to adsorb the entire chip under test. The waste box contains a second adsorption port that adsorbs the entire chip under test and transports it to the waste box.
6. The cleaning device according to claim 1, characterized in that, Also includes: A vision component, mounted on the support, is used to obtain the damage status of the chip under test on the test box.
7. The cleaning device according to claim 6, characterized in that, Also includes: A first drive assembly is mounted on the support base and connected to the first adsorption mechanism and the second adsorption mechanism respectively, for controlled movement of the first adsorption mechanism and the second adsorption mechanism along the longitudinal direction of the cleaning device.
8. The cleaning device according to claim 7, characterized in that, Also includes: The controller is connected to the vision component and the first drive component respectively, and is configured to control the first adsorption mechanism or the second adsorption mechanism to clean the cracked chip under test in the test box according to the damage condition of the chip under test on the test box.
9. The cleaning device according to claim 6, characterized in that, Also includes: A second drive assembly, mounted on the support and connected to the vision assembly, is used to controllably move the vision assembly longitudinally along the cleaning device.
10. A chip testing device, characterized in that, include: A truss is arranged along the left-right direction of the chip testing equipment; At least one test box is located below the truss and is spaced apart along the left and right directions of the chip testing equipment; The cleaning device according to any one of claims 1-9 is slidably connected to the truss and can be controlled to slide in the left-right direction of the chip testing equipment to move above the corresponding test box, thereby cleaning the cracked chip under test inside the test box.