Switching device and test system
By designing an adapter device that includes a circuit board and a multi-functional module, the problem of unstable testing of memory cards under the SD 7.0 standard was solved, enabling efficient card opening and reset functions, thus improving the convenience and testing efficiency of memory cards.
Patent Information
- Application Number
- CN202423162023.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-19
- Publication Date
- 2025-11-14
- Estimated Expiration
- 2034-12-19
AI Technical Summary
Existing technologies lack convenient and efficient adapters under the SD 7.0 standard, resulting in unstable memory cards during pre-shipment testing and difficulty in operating efficiently in various application scenarios.
An adapter device was designed, comprising a circuit motherboard, a host interface, a CMOS logic circuit module, a status display module, a memory card interface, and a reset module. It can be directly plugged into the host device to perform card opening operations, and the status display module displays the card opening progress and the reset module performs reset operations, thereby improving convenience.
It makes opening memory cards more convenient, can directly display the opening progress and reset failed cards, thus improving the stability and efficiency of testing.
Smart Images
Figure CN223552100U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of memory card testing technology, and more particularly to an adapter and testing system. Background Technology
[0002] The SD 7.0 standard, representing the latest development in memory card technology, introduces PCIe 3.0 and NVMe 1.3 as new bus standards, significantly improving the transfer speed and storage capacity of memory cards. Compared to previous versions, SD 7.0 not only maintains backward compatibility but also greatly enhances performance, enabling memory cards to approach or even reach the performance levels of SSDs.
[0003] To ensure that memory cards can operate stably and efficiently under the SD 7.0 standard in various application scenarios, they need to be tested before leaving the factory. Therefore, there is an urgent need for an adapter with high convenience. Utility Model Content
[0004] The purpose of this application is to provide an adapter and testing system to improve the convenience of opening memory cards.
[0005] This application discloses an adapter for connecting a memory card and a host device. The adapter includes a main board with a host interface, a CMOS logic circuit module, a status display module, a memory card interface, and a reset module. The CMOS logic circuit module is connected to the host interface, which is used to connect to the host device. The memory card interface is connected to the CMOS logic circuit module, which is used to connect to a memory card. The status display module is connected to the CMOS logic circuit module, and the reset module is connected to the memory card interface.
[0006] The CMOS logic circuit module is used to monitor the test status of the memory card, the status display module is used to display the test status of the memory card, and the reset module is used to reset the status of the memory card.
[0007] Optionally, the adapter further includes a base, which is disposed on the circuit board. The base includes a bottom frame and a cap. The bottom frame surrounds the memory card interface and is used to limit the memory card in the horizontal direction. The cap is connected to the bottom frame and can cover the bottom frame to limit the memory card in the vertical direction.
[0008] Optionally, the CMOS logic circuit module, the status display module, the reset module, the memory card interface, and the base are all disposed on the front side of the circuit motherboard. The front side of the circuit motherboard includes a first region and a second region. The host interface is located at the end of the circuit motherboard, and the first region is located between the host interface and the second region. The CMOS logic circuit module, the status display module, and the reset module are all located in the first region, and the memory card interface and the base are all located in the second region.
[0009] Optionally, the adapter further includes a voltage conversion module, a pin header selection module, and a resistor module. The voltage conversion module is connected to the host interface, which includes a first host voltage pin and a second host voltage pin. The voltage conversion module includes a voltage conversion input terminal and a voltage conversion output terminal. The voltage conversion input terminal of the voltage conversion module is connected to the second host voltage pin. The memory card interface includes a first storage voltage pin and a second storage voltage pin.
[0010] The needle selection module includes a needle cap, a first sub-selection module, and a second sub-selection module; the first sub-selection module includes a first selectable needle row, a second selectable needle row, and a third selectable needle row; the second selectable needle row includes a fourth selectable needle row and a fifth selectable needle row.
[0011] One end of the first select pin is connected to the first host voltage pin, one end of the second select pin is connected to the first storage voltage pin, and the third select pin is connected to the first host voltage pin; the pin cap can be selectively connected to the first select pin and the second select pin, or the second select pin and the third select pin.
[0012] One end of the fourth select pin is connected to the second host voltage pin, and one end of the fifth select pin is connected to the second storage voltage pin. The pin cap can turn the fourth select pin and the fifth select pin on or off.
[0013] The resistor module includes a first sub-resistor module and a second sub-resistor module; the first sub-resistor module includes a first resistor, a second resistor, a third resistor, and a fourth resistor; the second sub-resistor module includes a fifth resistor and a sixth resistor; the resistance values of the first resistor, the second resistor, the third resistor, the fourth resistor, the fifth resistor, and the sixth resistor are all 0;
[0014] The first resistor and the second resistor are connected in parallel. The input terminals of the first resistor and the second resistor are connected to the first host voltage pin, and the output terminals of the first resistor and the second resistor are connected to the first storage voltage pin.
[0015] The third resistor and the fourth resistor are connected in parallel, the input terminals of the third resistor and the fourth resistor are connected to the voltage conversion output terminal, and the input terminals of the third resistor and the fourth resistor are connected to the first storage voltage pin.
[0016] The fifth resistor and the sixth resistor are connected in parallel. The input terminals of the fifth resistor and the sixth resistor are connected to the second host voltage pin, and the output terminals of the fifth resistor and the sixth resistor are connected to the second storage voltage pin.
[0017] Optionally, the bottom frame includes a fixing part and a limiting ring. The fixing part is connected to the circuit board, and the limiting ring is located inside the fixing part. The outer ring of the limiting ring abuts against the inner ring of the fixing part, and the inner ring of the limiting ring is used to limit the memory card. The limiting ring and the fixing part are detachably connected for replacing limiting rings of different specifications.
[0018] Optionally, the adapter includes multiple CMOS logic circuit modules, multiple status display modules, multiple memory card interfaces, multiple reset modules, and multiple bases. Each CMOS logic circuit module is connected to the host interface. Each CMOS logic circuit module, each status display module, each memory card interface, each reset module, and each base are connected in a one-to-one correspondence. The multiple memory card interfaces are arranged at equal intervals in the second area, and the line spacing from each memory card interface to the host interface is equal.
[0019] Optionally, the CMOS logic circuit module is an EML7S08 chip, the memory card interface is a PCIe connector, and the memory card interface supports the PCIe 3.0 protocol.
[0020] Optionally, the adapter also includes a heating module that covers the base to provide a testing environment with different temperatures for the memory card.
[0021] Optionally, the heating module includes a heating wire, a heat insulation layer, and an internally hollow cover. The heat insulation layer is disposed on the inner wall of the cover, and the heating wire is disposed on the side of the heat insulation layer opposite to the cover.
[0022] This application also discloses a testing system, which includes a host device and an adapter. The adapter has a memory card interface for connecting to the memory card. The adapter is plugged into the host device, and the host device tests the memory card through the adapter.
[0023] Compared to existing adapters, the adapter of this application sets up a host interface, a CMOS logic circuit module, a status display module, a memory card interface, and a reset module on the circuit motherboard. The adapter can be directly plugged into the host device to perform card opening operations. The status display module can display the card opening progress or card opening status. The reset module can directly reset the memory card if the card opening fails, and then try to open the card again, thereby improving the convenience of opening memory cards. Attached Figure Description
[0024] The accompanying drawings, which form part of the specification, are used to provide a further understanding of the embodiments of this application and illustrate the implementation methods of this application, together with the textual description, to explain the principles of this application. Obviously, the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any creative effort. In the drawings:
[0025] Figure 1 This is a schematic diagram of a testing system according to an embodiment of this application;
[0026] Figure 2 This is a schematic diagram of an adapter according to an embodiment of this application;
[0027] Figure 3 This is a schematic diagram of an adapter device according to an embodiment of the present application, including a voltage conversion module, a pin header selection module, and a resistor module;
[0028] Figure 4 This is a schematic diagram of an adapter device including a base, according to an embodiment of this application;
[0029] Figure 5 This is a schematic diagram of the bottom frame of one embodiment of this application;
[0030] Figure 6 This is a schematic diagram of an adapter device according to an embodiment of the present application, including multiple memory card interfaces;
[0031] Figure 7 This is a schematic diagram of a single heating module according to an embodiment of this application;
[0032] Figure 8 This is a schematic diagram of a plurality of heating modules according to an embodiment of this application.
[0033] Among them, 10 is the test system; 20 is the host device; 30 is the adapter device; 100 is the circuit board; 110 is the host interface; 111 is the first host voltage pin; 112 is the second host voltage pin; 200 is the voltage conversion module; 300 is the pin header selection module; 320 is the first sub-selection module; 321 is the first selection pin header; 322 is the second selection pin header; 323 is the third selection pin header; 330 is the second sub-selection module; 331 is the fourth selection pin header; 332 is the fifth selection pin header; 400 is the resistor module; 410 is the first sub-resistor module; 411 is the first resistor; 412 is the second resistor; Resistor; 413, Third Resistor; 414, Fourth Resistor; 420, Second Sub-Resistor Module; 421, Fifth Resistor; 422, Sixth Resistor; 510, CMOS Logic Circuit Module; 520, Status Display Module; 530, Memory Card Interface; 531, First Storage Voltage Pin; 532, Second Storage Voltage Pin; 600, Reset Module; 700, Base; 710, Base Frame; 711, Fixing Part; 712, Limiting Ring; 720, Cap; 810, First Area; 820, Second Area; 900, Heating Module; 910, Heating Wire; 920, Insulation Layer; 930, Cover. Detailed Implementation
[0034] It should be understood that the terminology, specific structural and functional details used herein are merely for describing particular embodiments and are representative. However, this application may be implemented in many alternative forms and should not be construed as being limited to the embodiments set forth herein.
[0035] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating relative importance or implying the number of technical features indicated. Therefore, unless otherwise stated, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature; "multiple" means two or more. The term "comprising" and any variations thereof mean non-exclusive inclusion, where one or more other features, integers, steps, operations, units, components, and / or combinations thereof may be present or added.
[0036] In addition, terms such as “center,” “horizontal,” “up,” “down,” “left,” “right,” “vertical,” “horizontal,” “top,” “bottom,” “inner,” and “outer” that indicate orientation or positional relationship are based on the orientation or relative positional relationship shown in the accompanying drawings. They are only for the purpose of simplifying the description of this application and do not indicate that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.
[0037] Furthermore, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium, or internal connections between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0038] The present application will now be described in detail with reference to the accompanying drawings and optional embodiments.
[0039] Figure 1 This is a schematic diagram of a testing system according to an embodiment of this application, as shown below. Figure 1 As shown, the testing system 10 includes a host device 20 and an adapter 30. The memory card interface 530 on the adapter 30 is used to connect to the memory card. The adapter 30 is plugged into the host device 20. The host device 20 tests the memory card through the adapter 30. The card opening program is set in the host device 20.
[0040] This application also discloses an adapter 30, which can be used in the test system 10 described above. Regarding the adapter 30, this application provides the following design:
[0041] Figure 2 This is a schematic diagram of an adapter device according to an embodiment of this application, as shown below. Figure 2 As shown, this application discloses an adapter 30, which is used to connect a memory card and a host device 20. The adapter 30 includes a circuit board 100, on which a host interface 110, a CMOS logic circuit module 510, a status display module 520, a memory card interface 530, and a reset module 600 are disposed. The CMOS logic circuit module 510 is connected to the host interface 110 and is used to connect to the host device 20. The memory card interface 530 is connected to the CMOS logic circuit module 510 and is used to connect to a memory card. The status display module 520 is connected to the CMOS logic circuit module 510. The reset module 600 is connected to the memory card interface 530.
[0042] The CMOS logic circuit module 510 is used to monitor the test status of the memory card, the status display module 520 is used to display the test status of the memory card, and the reset module 600 is used to reset the status of the memory card.
[0043] The status display module 520 can be an LED indicator or a display screen. Preferably, the display module 520 in this application is an LED indicator, which has lower cost and lower energy consumption. For example, the LED indicator is in two different states when the memory card is being activated and after the activation is completed, so as to facilitate intuitive understanding of the activation status or process.
[0044] For example, when it is necessary to unlock the memory card, the memory card is connected to the adapter 30, the adapter 30 is plugged into the PCIE interface of the host device 20, the unlocking program is stored in the host device 20, and the host device 20 writes the unlocking program into the memory card to complete the unlocking operation.
[0045] Compared to existing adapters, the adapter 30 of this application has a host interface 110, a CMOS logic circuit module 510, a status display module 520, a memory card interface 530, and a reset module 600 on the circuit motherboard 100. The adapter 30 can be directly plugged into the host device 20 to perform card opening operations. The status display module 520 can display the card opening progress and status. The reset module 600 can directly reset the memory card if the card opening fails, and then try to open the card again, which improves the convenience of opening memory cards.
[0046] The adapter 30 of this application is used to open memory cards that support the PCIe 3.0 protocol. The CMOS logic circuit module 510 is an EML7S08 chip, capable of operating at speeds equivalent to low-power Schottky TTL (LS-TTL) transistors. The memory card interface 530 is a PCIe connector, supporting the PCIe 3.0 protocol, enabling testing of the memory card's transmission speed under the PCIe 3.0 protocol.
[0047] like Figure 3 As shown, the adapter 30 further includes a voltage conversion module 200, a pin header selection module 300, and a resistor module 400. The voltage conversion module 200 is connected to the host interface 110, which includes a first host voltage pin 111 and a second host voltage pin 112. The voltage conversion module 200 includes a voltage conversion input terminal and a voltage conversion output terminal. The voltage conversion input terminal of the voltage conversion module 200 is connected to the second host voltage pin 112. The memory card interface 530 includes a first storage voltage pin 531 and a second storage voltage pin 532.
[0048] The needle selection module 300 includes a needle cap, a first sub-selection module 320, and a second sub-selection module 330; the first sub-selection module 320 includes a first selection needle row 321, a second selection needle row 322, and a third selection needle row 323; the second sub-selection module 330 includes a fourth selection needle row 331 and a fifth selection needle row 332.
[0049] One end of the first select pin 321 is connected to the first host voltage pin 111, one end of the second select pin 322 is connected to the first storage voltage pin 531, and the third select pin 323 is connected to the first host voltage pin 111; the pin cap can be optionally connected to the first select pin 321 and the second select pin 322 or the second select pin 322 and the third select pin 323.
[0050] One end of the fourth select pin 331 is connected to the second host voltage pin 112, and one end of the fifth select pin 332 is connected to the second storage voltage pin 532. The pin cap can turn the fourth select pin 331 and the fifth select pin 332 on or off.
[0051] The resistor module 400 includes a first sub-resistor module 410 and a second sub-resistor module 420; the first sub-resistor module 410 includes a first resistor 411, a second resistor 412, a third resistor 413 and a fourth resistor 414; the second sub-resistor module 420 includes a fifth resistor 421 and a sixth resistor 422; the resistance values of the first resistor 411, the second resistor 412, the third resistor 413, the fourth resistor 414, the fifth resistor 421 and the sixth resistor 422 are all 0.
[0052] The first resistor 411 and the second resistor 412 are connected in parallel. The input terminals of the first resistor 411 and the second resistor 412 are connected to the first host voltage pin 111, and the output terminals of the first resistor 411 and the second resistor 412 are connected to the first storage voltage pin 531.
[0053] The third resistor 413 and the fourth resistor 414 are connected in parallel. The input terminals of the third resistor 413 and the fourth resistor 414 are connected to the voltage conversion output terminal, and the input terminals of the third resistor 413 and the fourth resistor 414 are connected to the first storage voltage pin 531.
[0054] The fifth resistor 421 and the sixth resistor 422 are connected in parallel. The input terminals of the fifth resistor 421 and the sixth resistor 422 are connected to the second host voltage pin 112, and the output terminals of the fifth resistor 421 and the sixth resistor 422 are connected to the second storage voltage pin 532.
[0055] For example, the first host voltage pin 112 outputs a voltage of 1.8V, the second host voltage pin 112 outputs a voltage of 3.3V, and the voltage conversion output terminal of the voltage conversion module 200 outputs a voltage of 1.8V.
[0056] Sufficient power supply voltage to the memory card can be ensured by the pin header selection module 300 and the resistor module 400. When opening the memory card, an ammeter can be directly connected to the selection pin header in the pin header selection module 300 to measure the current value on the adapter 30, calculate the power consumption of the adapter 30, and troubleshoot the reasons for card opening failure, thereby improving the reliability of the adapter 30.
[0057] like Figure 4 As shown, the adapter 30 also includes a base 700, which is disposed on the circuit board 100. The base 700 includes a bottom frame 710 and a cap 720. The bottom frame 710 surrounds the memory card interface 530 and is used to limit the memory card in the horizontal direction. The cap 720 is connected to the bottom frame 710 and can cover the bottom frame 710 to limit the memory card in the vertical direction.
[0058] Compared to soldering the SD card socket onto the circuit board 100, this application uses a base 700 consisting of a bottom frame 710 and a cap 720 to fix the memory card, which makes it easier to connect the memory card to the adapter 30, reduces the difficulty of operation, and avoids damage to the adapter 30.
[0059] Furthermore, in combination Figures 3-5 As shown, the bottom frame 710 includes a fixing part 711 and a limiting ring 712. The fixing part 711 is connected to the circuit board 100. The limiting ring 712 is located inside the fixing part 711, and the outer ring of the limiting ring 712 abuts against the inner ring of the fixing part 711. The inner ring of the limiting ring 712 is used to limit the memory card. The limiting ring 712 and the fixing part 711 are detachably connected, allowing for the replacement of limiting rings 712 of different specifications. In this way, memory cards of different sizes can be fixed by replacing different limiting rings 712, improving the adaptability of the adapter 30.
[0060] The CMOS logic circuit module 510, the status display module 520, the reset module 600, the memory card interface 530, and the base 700 are all disposed on the front side of the circuit motherboard 100. The front side of the circuit motherboard 100 includes a first region 810 and a second region 820. The host interface 110 is located at the end of the circuit motherboard 100. The first region 810 is located between the host interface 110 and the second region 820. The CMOS logic circuit module 510, the status display module 520, and the reset module 600 are all located within the first region 810, and the memory card interface 530 and the base 700 are all located within the second region 820.
[0061] After the conversion device is plugged into the host device 20, the back of the circuit motherboard 100 is close to the host device 20. This makes it more convenient for the operator to operate by placing the CMOS logic circuit module 510, the status display module 520 and the reset module 600 in the first area 810, and the memory card interface 530 and the base 700 in the second area 820.
[0062] like Figure 6 As shown, the adapter 30 includes multiple CMOS logic circuit modules 510, multiple status display modules 520, multiple memory card interfaces 530, multiple reset modules 600, and multiple bases 700. Each CMOS logic circuit module 510 is connected to the host interface 110. Each CMOS logic circuit module 510, each status display module 520, each memory card interface 530, each reset module 600, and each base 700 are connected in a one-to-one correspondence. The multiple memory card interfaces 530 are arranged at equal intervals in the second area 820, and the line spacing from each memory card interface 530 to the host interface 110 is equal.
[0063] Preferably, there are three of each: the CMOS logic circuit module 510, the status display module 520, the memory card interface 530, the reset module 600, and the base 700. This allows for simultaneous card opening tests on three memory cards, improving opening efficiency. Furthermore, the equal spacing between the traces from each memory card interface 530 and the host interface 110 ensures consistent signal attenuation between each host interface 110 and the memory card interface 530, guaranteeing the accuracy of the card opening test.
[0064] like Figure 4This application also includes a heating module 900. Specifically, the adapter 30 further includes a heating module 900, which covers the base 700 to provide a testing environment of different temperatures for the memory card. This eliminates the need to place the host device 20 in a temperature chamber for testing, making it more convenient, especially when testing only a small number of memory cards, thus saving energy.
[0065] The heating module 900 includes a heating wire 910, an insulation layer 920, and a hollow housing 930. The insulation layer 920 is disposed on the inner wall of the housing 930, and the heating wire 910 is disposed on the side of the insulation layer 920 facing away from the housing 930. The temperature inside the housing 930 is controlled by the heating of the heating wire 910. The heating wire 910 can be directly connected to a host device via the host interface 110, and the host can set and control the temperature of the heating wire 910. Alternatively, a power module can be separately disposed on the circuit board 100 and connected to the heating wire 910 to control the temperature of the heating wire 910.
[0066] like Figure 7 As shown, when there are multiple memory card interfaces 530, a heating module 900 is used. The cover 930 covers all the bases 700, so that all the memory cards in the bases 700 are located in the same cover 930, and all the memory cards in the bases 700 can be heated simultaneously.
[0067] like Figure 8 As shown, when there are multiple memory card interfaces 530, there are multiple heating modules 900. The number of memory card interfaces 530 is equal to the number of heating modules 900. Each heating module 900 has a cover 930 covering a separate base 700, so that the memory card in each base 700 is located in a different cover 930 for heating. Compared with setting only one heating module 900, setting multiple heating modules 900 allows for individual control of the temperature in each heating module 900, improving the flexibility of the adapter 30.
[0068] It should be noted that the inventive concept of this application can form many embodiments, but due to the limited space of the application documents, they cannot all be listed. Therefore, without conflict, the embodiments described above or the technical features can be arbitrarily combined to form new embodiments. After the embodiments or technical features are combined, the original technical effect will be enhanced.
[0069] The above description, in conjunction with specific optional embodiments, provides a further detailed explanation of this application and should not be construed as limiting the specific implementation of this application to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of this application, and all such modifications or substitutions should be considered within the scope of protection of this application.
Claims
1. A switching device, characterized in that, The adapter is used to connect a memory card and a host device. The adapter includes a main circuit board, which is provided with a host interface, a CMOS logic circuit module, a status display module, a memory card interface, and a reset module. The CMOS logic circuit module is connected to the host interface, and the host interface is used to connect to the host device. The memory card interface is connected to the CMOS logic circuit module, and the memory card interface is used to connect to the memory card. The status display module is connected to the CMOS logic circuit module, and the reset module is connected to the memory card interface. The CMOS logic circuit module is used to monitor the test status of the memory card, the status display module is used to display the test status of the memory card, and the reset module is used to reset the status of the memory card.
2. The adapter according to claim 1, characterized in that, The adapter also includes a base, which is mounted on the circuit board. The base includes a bottom frame and a cap. The bottom frame surrounds the memory card interface and is used to limit the memory card in the horizontal direction. The cap is connected to the bottom frame and can cover the bottom frame to limit the memory card in the vertical direction.
3. The adapter according to claim 2, characterized in that, The CMOS logic circuit module, the status display module, the reset module, the memory card interface, and the base are all disposed on the front side of the circuit motherboard. The front side of the circuit motherboard includes a first area and a second area. The host interface is located at the end of the circuit motherboard. The first area is located between the host interface and the second area. The CMOS logic circuit module, the status display module, and the reset module are all located in the first area, and the memory card interface and the base are all located in the second area.
4. The adapter according to claim 1, characterized in that, The adapter also includes a voltage conversion module, a pin header selection module, and a resistor module. The voltage conversion module is connected to the host interface, which includes a first host voltage pin and a second host voltage pin. The voltage conversion module includes a voltage conversion input terminal and a voltage conversion output terminal. The voltage conversion input terminal of the voltage conversion module is connected to the second host voltage pin. The memory card interface includes a first storage voltage pin and a second storage voltage pin. The needle selection module includes a needle cap, a first sub-selection module, and a second sub-selection module; the first sub-selection module includes a first selectable needle row, a second selectable needle row, and a third selectable needle row; the second selectable needle row includes a fourth selectable needle row and a fifth selectable needle row. One end of the first select pin is connected to the first host voltage pin, one end of the second select pin is connected to the first storage voltage pin, and the third select pin is connected to the first host voltage pin; the pin cap can be selectively connected to the first select pin and the second select pin, or the second select pin and the third select pin. One end of the fourth select pin is connected to the second host voltage pin, and one end of the fifth select pin is connected to the second storage voltage pin. The pin cap can turn the fourth select pin and the fifth select pin on or off. The resistor module includes a first sub-resistor module and a second sub-resistor module; the first sub-resistor module includes a first resistor, a second resistor, a third resistor, and a fourth resistor; the second sub-resistor module includes a fifth resistor and a sixth resistor; the resistance values of the first resistor, the second resistor, the third resistor, the fourth resistor, the fifth resistor, and the sixth resistor are all 0; The first resistor and the second resistor are connected in parallel. The input terminals of the first resistor and the second resistor are connected to the first host voltage pin, and the output terminals of the first resistor and the second resistor are connected to the first storage voltage pin. The third resistor and the fourth resistor are connected in parallel, the input terminals of the third resistor and the fourth resistor are connected to the voltage conversion output terminal, and the input terminals of the third resistor and the fourth resistor are connected to the first storage voltage pin. The fifth resistor and the sixth resistor are connected in parallel. The input terminals of the fifth resistor and the sixth resistor are connected to the second host voltage pin, and the output terminals of the fifth resistor and the sixth resistor are connected to the second storage voltage pin.
5. The adapter according to claim 2, characterized in that, The bottom frame includes a fixing part and a limiting ring. The fixing part is connected to the circuit board. The limiting ring is located inside the fixing part. The outer ring of the limiting ring abuts against the inner ring of the fixing part. The inner ring of the limiting ring is used to limit the memory card. The limiting ring and the fixing part are detachably connected for replacing limiting rings of different specifications.
6. The adapter according to claim 3, characterized in that, The adapter includes multiple CMOS logic circuit modules, multiple status display modules, multiple memory card interfaces, multiple reset modules, and multiple bases. Each CMOS logic circuit module is connected to the host interface. Each CMOS logic circuit module, each status display module, each memory card interface, each reset module, and each base are connected in a one-to-one correspondence. The multiple memory card interfaces are arranged at equal intervals in the second area, and the line spacing from each memory card interface to the host interface is equal.
7. The adapter according to claim 1, characterized in that, The CMOS logic circuit module is an EML7S08 chip, the memory card interface is a PCIe connector, and the memory card interface supports the PCIe 3.0 protocol.
8. The adapter according to any one of claims 3 and 6, characterized in that, The adapter also includes a heating module, which covers the base to provide a testing environment with different temperatures for the memory card.
9. The adapter according to claim 8, characterized in that, The heating module includes a heating wire, a heat insulation layer, and a hollow cover. The heat insulation layer is disposed on the inner wall of the cover, and the heating wire is disposed on the side of the heat insulation layer away from the cover.
10. A testing system, characterized in that, The testing system includes a host device and an adapter as described in any one of claims 1-9, wherein a memory card interface on the adapter is used to connect to the memory card, the adapter is plugged into the host device, and the host device tests the memory card through the adapter.