VCA810-based automatic gain control circuit

Abstract

The utility model belongs to the technical field of sonar, and particularly relates to an automatic gain control circuit based on VCA810. Comprising an FPGA; a DA conversion circuit; the DA conversion circuit is connected between the FPGA and the anti-phase driving circuit, and the DA conversion circuit is connected between the FPGA and the anti-phase driving circuit; and the VCA810 amplification circuit is connected to the output end of the anti-phase driving circuit. According to the utility model, the VCA810 chip is adopted and has the advantages of low noise, high gain precision and the like, the gain range of the first-level VCA810 is-40-40dB, and the output gain is dynamically adjustable. The control mode of the program control gain is high in precision and small in gain gradient, and sonar imaging is facilitated.

Description

Technical Field

[0001] This utility model belongs to the field of sonar technology, and specifically relates to an automatic gain control circuit based on VCA810. Background Technology

[0002] Because the distance between the transmitter and receiver in the channel varies, the amplitude of the signal received by the receiver at different distances will also differ. Therefore, the amplifier circuit needs to be designed with a dynamic chip capable of automatically adjusting the receiving gain, so as to output a received signal with the same amplitude after receiving the transmitted signal at different distances, thereby facilitating the acquisition and processing of the received signal by the digital processing chip. Therefore, the application of automatic gain control circuits in sonar systems has significant practical implications. Utility Model Content

[0003] The purpose of this invention is to provide an automatic gain control circuit based on VCA810. By using an automatic gain circuit in hardware to process the received signal, all received signals passing through the automatic gain circuit can be adjusted according to the size of the operating distance. An FPGA is used to control the control voltage of the automatic gain circuit, thereby changing the magnitude of the circuit gain.

[0004] To solve the above-mentioned technical problems, this utility model provides an automatic gain control circuit based on VCA810, comprising:

[0005] FPGA;

[0006] DA conversion circuit;

[0007] An inverting drive circuit is provided, wherein the DA conversion circuit is connected between the FPGA and the inverting drive circuit.

[0008] The VCA810 amplifier circuit is connected to the output terminal of the inverting drive circuit.

[0009] Preferably, the inverting drive circuit uses a rail-to-rail input / output amplifier U1, and the rail-to-rail input / output amplifier U1 is an ADA4807-1 chip.

[0010] Preferably, the inverting drive circuit includes: a rail-to-rail input / output amplifier U1, resistors R1 to R5, and capacitors C1 to C5; the non-inverting input terminal of the rail-to-rail input / output amplifier U1 is connected to one end of resistor R4, the other end of resistor R4 is connected to one end of resistor R5 and grounded to AGND, the other end of resistor R5 is connected to the input terminal IN_AGND, the inverting input terminal of the rail-to-rail input / output amplifier U1 is connected to one end of resistor R1, resistor R2, and capacitor C1, and the other end of resistor R2 is connected to the input terminal IN_Vc. The other end of capacitor C1 and resistor R1 is connected to one end of resistor R3 and control voltage Vc. The other end of resistor R3 is connected to the output terminal of rail-to-rail input / output amplifier U1. The positive power supply terminal of rail-to-rail input / output amplifier U1 is connected to a +5V power supply and one end of capacitors C4 and C5. The other end of capacitors C4 and C5 is grounded to AGND. The negative power supply terminal of rail-to-rail input / output amplifier U1 is connected to a -5V power supply and one end of capacitors C2 and C3. The other end of capacitors C2 and C3 is grounded to AGND.

[0011] Preferably, the VCA810 amplifier circuit includes: a VCA810 chip U2, resistors R6 to R8, and capacitors C6 to C10; the non-inverting input terminal of the VCA810 chip U2 is connected to the input terminal IN_P, the inverting input terminal of the VCA810 chip U2 is connected to the input terminal IN_N, the output terminal of the VCA810 chip U2 is OUT, the positive power supply terminal of the VCA810 chip U2 is connected to one end of resistor R8, capacitor C9, and capacitor C10, the other end of resistor R8 is connected to a +5V power supply, and capacitor C9... The other end of capacitor C10 is grounded to AGND. The negative power supply terminal of the VCA810 chip U2 is connected to one end of resistor R6, capacitor C6, and capacitor C7. The other end of resistor R6 is connected to a -5V power supply. The other ends of capacitors C6 and C7 are grounded to AGND. The ground terminal of the VCA810 chip U2 is grounded to AGND. The gain control terminal of the VCA810 chip U2 is connected to one end of capacitor C8 and resistor R7. The other end of capacitor C8 is grounded to AGND. The other end of resistor R7 is connected to the control voltage Vc.

[0012] Compared with the prior art, this utility model has the following advantages:

[0013] This invention utilizes the VCA810 chip, which boasts advantages such as low noise and high gain accuracy. The gain range of the first-stage VCA810 is -40 to 40 dB, and the output gain is dynamically adjustable. The programmable gain control method offers high precision and a small gain gradient, which is more beneficial for sonar imaging. Attached Figure Description

[0014] Figure 1This is a functional block diagram of an automatic gain control circuit based on VCA810 according to this utility model.

[0015] Figure 2 This is the circuit diagram of the VCA810 amplifier circuit of this utility model.

[0016] Figure 3 This is a curve showing the circuit gain and control voltage of this utility model.

[0017] Figure 4 This is the circuit diagram of the reverse drive circuit of this utility model. Detailed Implementation

[0018] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0019] like Figures 1-4 As shown, this utility model embodiment provides an automatic gain control circuit based on VCA810, including: an FPGA; a DA conversion circuit; an inverting drive circuit, wherein the DA conversion circuit is connected between the FPGA and the inverting drive circuit; and a VCA810 amplifier circuit, which is connected to the output terminal of the inverting drive circuit.

[0020] The inverting drive circuit includes: a rail-to-rail input / output amplifier U1, resistors R1 to R5, and capacitors C1 to C5; the non-inverting input terminal of the rail-to-rail input / output amplifier U1 is connected to one end of resistor R4, the other end of resistor R4 is connected to one end of resistor R5 and grounded to AGND, the other end of resistor R5 is connected to the input terminal IN_AGND, the inverting input terminal of the rail-to-rail input / output amplifier U1 is connected to one end of resistor R1, resistor R2, and capacitor C1, the other end of resistor R2 is connected to the input terminal IN_Vc, and the capacitor... The other end of C1 and resistor R1 is connected to one end of resistor R3 and control voltage Vc. The other end of resistor R3 is connected to the output terminal of rail-to-rail input / output amplifier U1. The positive power supply terminal of rail-to-rail input / output amplifier U1 is connected to a +5V power supply and one end of capacitors C4 and C5. The other end of capacitors C4 and C5 is grounded to AGND. The negative power supply terminal of rail-to-rail input / output amplifier U1 is connected to a -5V power supply and one end of capacitors C2 and C3. The other end of capacitors C2 and C3 is grounded to AGND.

[0021] The aforementioned reverse drive circuit uses the rail-to-rail input / output amplifier ADA4807-1. The ADA4807-1 is a low-noise, rail-to-rail input / output, voltage feedback amplifier with wide bandwidth, high spin rate, fast settling time, and excellent performance, providing very low input offset voltage and drift performance. The chip operates on a ±5V dual power supply. The reverse drive circuit is as follows: Figure 4 As shown.

[0022] The VCA810 amplifier circuit includes: a VCA810 chip U2, resistors R6 to R8, and capacitors C6 to C10; the non-inverting input terminal of the VCA810 chip U2 is connected to the input terminal IN_P, the inverting input terminal of the VCA810 chip U2 is connected to the input terminal IN_N, the output terminal of the VCA810 chip U2 is OUT, the positive power supply terminal of the VCA810 chip U2 is connected to one end of resistor R8, capacitor C9, and capacitor C10, the other end of resistor R8 is connected to a +5V power supply, and capacitor C9 and capacitor C10 are connected to the positive power supply. The other end of capacitor C10 is grounded to AGND. The negative power supply terminal of the VCA810 chip U2 is connected to one end of resistor R6, capacitor C6, and capacitor C7. The other end of resistor R6 is connected to a -5V power supply. The other ends of capacitors C6 and C7 are grounded to AGND. The ground terminal of the VCA810 chip U2 is grounded to AGND. The gain control terminal of the VCA810 chip U2 is connected to one end of capacitor C8 and resistor R7. The other end of capacitor C8 is grounded to AGND. The other end of resistor R7 is connected to the control voltage Vc. The VCA810 is a high-gain, continuously adjustable voltage-controlled amplifier launched by TI. The chip uses ±5V power supply and can automatically adjust the gain according to the magnitude of the output signal to stabilize the signal output at a certain amplitude. The gain of the VCA810 amplifier circuit is linearly related to the control voltage Vc, which is generated by the FPGA-controlled DA module. The VCA810 circuit design principle is as follows: Figure 2 As shown.

[0023] When the control voltage Vc varies between -2V and 0V, the relationship between Vc and gain is: G(dB) = -40(Vc+1). When the control voltage Vc varies within the effective control voltage range of -2V to 0V, the VCA810 can achieve linear gain variation within the range of -40dB to +40dB. The relationship curve between Vc and gain is shown below. Figure 3 As shown.

[0024] This invention employs an FPGA-controlled DA converter circuit to output voltage Vc, thereby automatically adjusting the gain of the VCA810 circuit. The DA converter circuit outputs a continuously adjustable analog voltage to control the gain control terminal of the VCA810 chip. Furthermore, since the chip specifies a control voltage Vc range of -2V to 0V, the DA converter, after outputting a positive control voltage, needs to pass through an inverting drive circuit to achieve the desired range for the VCA810 control voltage. The received signal, after passing through the VCA810 module, can achieve a gain variation of -40 to 40dB.

[0025] The above description is only a description of the preferred embodiment of the present utility model and is not intended to limit the scope of the present utility model in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. An automatic gain control circuit based on VCA810, characterized in that, include: FPGA; DA conversion circuit; An inverting drive circuit is provided, wherein the DA conversion circuit is connected between the FPGA and the inverting drive circuit. The VCA810 amplifier circuit is connected to the output terminal of the inverting drive circuit.

2. The automatic gain control circuit based on VCA810 as described in claim 1, characterized in that, The inverting drive circuit uses a rail-to-rail input / output amplifier U1, which is an ADA4807-1 chip.

3. The automatic gain control circuit based on VCA810 as described in claim 2, characterized in that, The inverting drive circuit includes: a rail-to-rail input / output amplifier U1, resistors R1 to R5, and capacitors C1 to C5; the non-inverting input terminal of the rail-to-rail input / output amplifier U1 is connected to one end of resistor R4, the other end of resistor R4 is connected to one end of resistor R5 and grounded to AGND, the other end of resistor R5 is connected to the input terminal IN_AGND, the inverting input terminal of the rail-to-rail input / output amplifier U1 is connected to one end of resistor R1, resistor R2, and capacitor C1, the other end of resistor R2 is connected to the input terminal IN_Vc, and the capacitor... The other end of C1 and resistor R1 is connected to one end of resistor R3 and control voltage Vc. The other end of resistor R3 is connected to the output terminal of rail-to-rail input / output amplifier U1. The positive power supply terminal of rail-to-rail input / output amplifier U1 is connected to a +5V power supply and one end of capacitors C4 and C5. The other end of capacitors C4 and C5 is grounded to AGND. The negative power supply terminal of rail-to-rail input / output amplifier U1 is connected to a -5V power supply and one end of capacitors C2 and C3. The other end of capacitors C2 and C3 is grounded to AGND.

4. The automatic gain control circuit based on VCA810 as described in claim 1, characterized in that, The VCA810 amplifier circuit includes: a VCA810 chip U2, resistors R6 to R8, and capacitors C6 to C10; the non-inverting input terminal of the VCA810 chip U2 is connected to the input terminal IN_P, the inverting input terminal of the VCA810 chip U2 is connected to the input terminal IN_N, the output terminal of the VCA810 chip U2 is OUT, the positive power supply terminal of the VCA810 chip U2 is connected to one end of resistor R8, capacitor C9, and capacitor C10, the other end of resistor R8 is connected to a +5V power supply, and capacitor C9 and capacitor C10 are connected to the positive power supply. The other end of capacitor C10 is grounded to AGND. The negative power supply terminal of the VCA810 chip U2 is connected to one end of resistor R6, capacitor C6, and capacitor C7. The other end of resistor R6 is connected to a -5V power supply. The other ends of capacitors C6 and C7 are grounded to AGND. The ground terminal of the VCA810 chip U2 is grounded to AGND. The gain control terminal of the VCA810 chip U2 is connected to one end of capacitor C8 and resistor R7. The other end of capacitor C8 is grounded to AGND. The other end of resistor R7 is connected to the control voltage Vc.

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