Earphone sound turn-off circuit

Abstract

An earphone sound turn-off circuit is characterized in that a grid electrode of an MOS tube Q3 and a grid electrode of an MOS tube Q4 are connected together and are connected with an MUTECTLH end through a resistor R181, the grid electrode of the MOS tube Q4 is grounded through a capacitor C264, a source electrode of the MOS tube Q3 is connected with an HPROUT end of a third pin of an earphone seat connector JP1, the HPROUT end is grounded through a resistor R178, a source electrode of the MOS tube Q4 is connected with an HPLOUT end of a fifth pin of the earphone seat connector JP1, and a drain electrode of the MOS tube Q3 is connected with an ROUT end through a resistor R172. The drain electrode of the MOS tube Q4 is connected with the LOUT end through the resistor R174, and when the earphone is inserted but the earphone is not wanted to play audio, the CPU control chip controls the MUTECTLH end to be at a low level, so that the MOS tube Q3 and the MOS tube Q4 are cut off, POP sound can be prevented from being heard, and the body feeling of a user is improved.

Description

Technical Field

[0001] This utility model relates to the field of headphone technology, and in particular to a headphone sound shut-off circuit. Background Technology

[0002] Currently, most electronic devices (such as mobile phones or tablets) are equipped with normally open headphone jacks. When the processor in the electronic device detects that headphones are plugged in, the bias voltage power supply in the device inputs a bias voltage to the microphone signal terminal of the headphones, activating the microphone. Afterward, the user can input audio information to the electronic device through the microphone on the headphones. However, there is a certain time delay between the headphones being plugged into the electronic device and fully inserted. During this process, the bias voltage can travel from the microphone signal terminal of the headphones through the headphone jack contacts into the left and right channels, producing an unpleasant popping sound. This degrades the user experience, and excessive popping can even damage the headphones, affecting the user's hearing. Utility Model Content

[0003] The technical problem this invention aims to solve is that existing headphones have a certain time delay from the initial insertion into the electronic device to full insertion. During the insertion process, the bias voltage is transmitted from the microphone signal terminal of the headphones to the left and right channels through the headphone jack contact points, producing an unpleasant popping sound and reducing the user experience. This invention provides a headphone sound shutdown circuit.

[0004] The technical solution adopted by this utility model to solve the above-mentioned technical problems is as follows:

[0005] A headphone sound shutdown circuit is provided, including a headphone connector JP1, resistors R166, R169, R172, R174, R176, R177, R178, and R181, capacitor C264, NMOS transistors Q3 and Q4; the gates of MOS transistors Q3 and Q4 are connected together and connected to the MUTE_CTL_H terminal through resistor R181; the gate of MOS transistor Q4 is grounded through capacitor C264; the source of MOS transistor Q3 is connected to the right channel audio output signal HPR_OUT terminal of pin 3 of the headphone connector JP1, and the HPR_OUT terminal is grounded through resistor R178; the source of MOS transistor Q4 is connected to the left channel audio output signal HPL terminal of pin 5 of the headphone connector JP1. At the _OUT terminal, pins 3 and 5 of the headphone connector are in a conductive connection state. The drain of MOSFET Q3 is connected to the ROUT terminal through resistor R172 and grounded through resistor R177. The drain of MOSFET Q4 is connected to the LOUT terminal through resistor R174 and grounded through resistor R176. Resistor R169 is the pull-up resistor for the headphone detection signal HP_DET_L terminal of the headphone connector JP1.

[0006] Furthermore, the PHONE_MICT_IN terminal of the headphone jack connector JP1 is connected to resistor R170 and grounded through capacitor C257, and connected to the power input terminal VCC_3V3_CODEC through resistor R166.

[0007] Furthermore, resistors R166, R169, R170, R172, R174, R176, R177, R178, and R181 are all surface mount resistors.

[0008] Furthermore, both capacitors C257 and C264 are surface-mount capacitors.

[0009] Furthermore, both MOS transistors Q3 and Q4 are NMOS transistors.

[0010] Compared with existing technologies, the headphone sound cutoff circuit provided by this utility model has pins 3 and 5 of the headphone connector JP1 in a conductive connection state. When the headphones are not plugged in, HPR... The _OUT terminal is grounded through resistor R178, thus HP_DET_L and HPR_OUT are connected, and HP_DET_L is at a low level. When headphones are plugged in, the contacts on pins 3 and 5 of the headphone jack connector are disconnected, and HP_DET_L and HPR_OUT become disconnected. HP_DET_L is pulled up by resistor R169, so HP_DET_L is at a high level. When the CPU control chip detects the change from low to high at HP_DET_L, the sources of MOSFETs Q3 and Q4 are connected to the headphones. At this time, the headphone impedance is 32 ohms, so the sources of MOSFETs Q3 and Q4 are at a low level. When the CPU control chip sets MUTE_CTL_H to a high level, MOSFETs Q3 and Q4 conduct, and the ROUT terminal flows to HPR_OUT. The T terminal forms the right audio channel of the headphones, and the LOUT terminal flows to the HPL_OUT terminal to form the left audio channel. Thus, both the right and left audio channels of the headphones have audio signal output, allowing sound to be heard. When the CPU control chip controls the MUTE_CTL_H terminal to a low level, MOSFETs Q3 and Q4 are cut off, and neither the right nor left audio channel outputs an audio signal, resulting in no sound from the headphones. By adding MOSFETs Q3 and Q4, which are configured as switches to control audio signal output, when headphones are plugged in but audio playback is not desired, simply controlling the MUTE_CTL_H terminal to a low level, and then controlling MOSFETs Q3 and Q4 to cut off, prevents popping sounds and effectively improves the user's experience. Attached Figure Description

[0011] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0012] Figure 1 This is a schematic diagram of a headphone sound shutdown circuit provided in this embodiment. Detailed Implementation

[0013] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present utility model and are not intended to limit the present utility model.

[0014] The implementation of this utility model will be described in detail below with reference to specific embodiments.

[0015] like Figure 1As shown in the embodiment of this utility model, a headphone sound shutdown circuit is provided, including a headphone connector JP1, resistors R169, R172, R174, R176, R177, R178, and R181, capacitor C264, MOSFETs Q3 and Q4; the gates of MOSFETs Q3 and Q4 are connected together and connected to the MUTE_CTL_H terminal through resistor R181. Here, the MUTE_CTL_H terminal is a GPIO interface of the CPU control chip, which controls the conduction and cutoff of MOSFETs Q3 and Q4. Specifically, the GPIO interface of the CPU control chip can be pulled high or low by software, that is, this GPIO interface can output a high level or a low level, which is controlled by the CPU control chip. The gate of MOSFET Q4 is grounded through capacitor C264, and the source of MOSFET Q3 is connected to the right channel audio output signal HPR of the headphone connector JP1 at pin 3. The HPR _OUT terminal is grounded through resistor R178. The source of MOSFET Q4 is connected to the left channel audio output signal HPL _OUT terminal of pin 5 of the headphone connector JP1. Pins 3 and 5 of the headphone connector are in a conducting state. The drain of MOSFET Q3 is connected to the ROUT terminal through resistor R172 and grounded through resistor R177. The drain of MOSFET Q4 is connected to the LOUT terminal through resistor R174 and grounded through resistor R176. Resistor R169 is the pull-up resistor for the headphone detection signal HP_DET_L terminal of the headphone connector JP1. Thus, pins 3 and 5 of the headphone connector JP1 are in a conducting state. When the headphones are not inserted, HPR... The _OUT terminal is grounded through resistor R178, thus HP_DET_L and HPR_OUT are connected, and HP_DET_L is at a low level. When the headphones are plugged in, the spring contacts of pins 3 and 5 of the headphone jack connector are disconnected, and HP_DET_L and HPR_OUT become disconnected. HP_DET_L is pulled up by resistor R169, so HP_DET_L is at a high level. When the CPU control chip detects that HP_DET_L has changed from low to high, the sources of MOSFETs Q3 and Q4 are connected to the headphones, and the gates of MOSFETs Q3 and Q4 are connected to the CPU control chip. At this time, the headphone impedance is 32 ohms, so the sources of MOSFETs Q3 and Q4 are at a low level.When the CPU control chip sets the MUTE_CTL_H terminal to a high level, MOSFETs Q3 and Q4 are turned on. The ROUT terminal flows to the HPR_OUT terminal, forming the right audio channel of the headphones, and the LOUT terminal flows to the HPL_OUT terminal, forming the left audio channel. Thus, both the right and left audio channels of the headphones have audio signal output, and sound can be heard from the headphones. When the CPU control chip sets the MUTE_CTL_H terminal to a low level, MOSFETs Q3 and Q4 are turned off, and neither the right nor left audio channel of the headphones outputs an audio signal, resulting in no sound from the headphones. Therefore, by adding MOSFETs Q3 and Q4 and setting them as switches to control the audio signal output, when headphones are plugged in but audio is not desired, simply setting the MUTE_CTL_H terminal to a low level, and controlling MOSFETs Q3 and Q4 to turn them off, can prevent the pop sound from being heard, effectively meeting different needs.

[0016] In this embodiment, resistors R166, R169, R170, R172, R174, R176, R177, R178 and R181 are all surface mount resistors.

[0017] In this embodiment, both capacitors C257 and C264 are surface-mount capacitors.

[0018] In this embodiment, both MOS transistors Q3 and Q4 are NMOS transistors.

[0019] The working principle of the headphone sound shutdown circuit of this utility model is as follows:

[0020] When the headphones are not plugged in, the HPR_OUT terminal is grounded through resistor R178. In this way, the HP_DET_L terminal and the HPR_OUT terminal are connected, so the HP_DET_L terminal is at a low level.

[0021] When the headphones are plugged in, the spring contacts on pins 3 and 5 of the headphone jack connector are disconnected. At this time, the HP_DET_L and HPR_OUT terminals become disconnected, while the HP_DET_L terminal is pulled up by resistor R169, so the HP_DET_L terminal is at a high level.

[0022] When the CPU control chip detects that the HP_DET_L terminal changes from low level to high level, the sources of MOSFETs Q3 and Q4 are connected to the headphones, and the gates of MOSFETs Q3 and Q4 are connected to the CPU control chip for control. At this time, the headphone impedance is 32 ohms, so the sources of MOSFETs Q3 and Q4 are at low level.

[0023] When the CPU control chip sets the MUTE_CTL_H terminal to a high level, MOSFETs Q3 and Q4 are turned on. The ROUT terminal flows to the HPR_OUT terminal to form the right audio channel of the headphones, and the LOUT terminal flows to the HPL_OUT terminal to form the left audio channel of the headphones. In this way, both the right and left audio channels of the headphones have audio signal output, and the headphones can hear sound.

[0024] When the CPU control chip sets the MUTE_CTL_H terminal to a low level, MOSFETs Q3 and Q4 are cut off, resulting in no audio signal output from either the right or left audio channel of the headphones, and no sound from the headphones.

[0025] Compared with existing technologies, the headphone sound cutoff circuit provided by this utility model has pins 3 and 5 of the headphone connector JP1 in a conductive connection state. When the headphones are not plugged in, HPR... The _OUT terminal is grounded through resistor R178, thus HP_DET_L and HPR_OUT are connected, and HP_DET_L is at a low level. When headphones are plugged in, the contacts on pins 3 and 5 of the headphone jack connector are disconnected, and HP_DET_L and HPR_OUT become disconnected. HP_DET_L is pulled up by resistor R169, so HP_DET_L is at a high level. When the CPU control chip detects the change from low to high at HP_DET_L, the sources of MOSFETs Q3 and Q4 are connected to the headphones. At this time, the headphone impedance is 32 ohms, so the sources of MOSFETs Q3 and Q4 are at a low level. When the CPU control chip sets MUTE_CTL_H to a high level, MOSFETs Q3 and Q4 conduct, and the ROUT terminal flows to HPR_OUT. The T terminal forms the right audio channel of the headphones, and the LOUT terminal flows to the HPL_OUT terminal to form the left audio channel. Thus, both the right and left audio channels of the headphones have audio signal output, allowing sound to be heard. When the CPU control chip controls the MUTE_CTL_H terminal to a low level, MOSFETs Q3 and Q4 are cut off, and neither the right nor left audio channel outputs an audio signal, resulting in no sound from the headphones. By adding MOSFETs Q3 and Q4, which are configured as switches to control audio signal output, when headphones are plugged in but audio playback is not desired, simply controlling the MUTE_CTL_H terminal to a low level, and then controlling MOSFETs Q3 and Q4 to cut off, prevents popping sounds and effectively improves the user's experience.

[0026] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A headphone sound shut-off circuit, characterized in that, The device includes a headphone connector JP1, resistors R166, R169, R172, R174, R176, R177, R178, and R181, capacitor C264, and NMOS transistors Q3 and Q4. The gates of MOS transistors Q3 and Q4 are connected together and connected to the MUTE_CTL_H terminal via resistor R181. The gate of MOS transistor Q4 is grounded via capacitor C264. The source of MOS transistor Q3 is connected to the right channel audio output signal HPR_OUT terminal (pin 3) of the headphone connector JP1, and the HPR_OUT terminal is grounded via resistor R178. The source of MOS transistor Q4 is connected to the left channel audio output signal HPL terminal (pin 5) of the headphone connector JP1. At the _OUT terminal, pins 3 and 5 of the headphone connector are in a conductive connection state. The drain of MOSFET Q3 is connected to the ROUT terminal through resistor R172 and grounded through resistor R177. The drain of MOSFET Q4 is connected to the LOUT terminal through resistor R174 and grounded through resistor R176. Resistor R169 is the pull-up resistor for the headphone detection signal HP_DET_L terminal of the headphone connector JP1.

2. The headphone sound shutdown circuit according to claim 1, characterized in that, The PHONE_MICT_IN terminal of the headphone connector JP1 is connected to resistor R170 and grounded through capacitor C257, and connected to the power input terminal VCC through resistor R166.

3. The headphone sound shutdown circuit according to claim 2, characterized in that, The resistors R166, R169, R170, R172, R174, R176, R177, R178 and R181 are all surface mount resistors.

4. The headphone sound shutdown circuit according to claim 2, characterized in that, Both capacitors C257 and C264 are surface-mount capacitors.

5. The headphone sound shutdown circuit according to claim 1, characterized in that, Both MOSFETs Q3 and Q4 are NMOS transistors.

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