Inverted LED structure
By introducing a silver mirror structure and an ITO adhesive layer into the flip-chip LED, combined with a current blocking layer and multilayer metal electrodes, the problems of brightness improvement and reliability were solved, achieving higher brightness and stability.
Patent Information
- Application Number
- CN202423141404.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-19
- Publication Date
- 2025-11-14
- Estimated Expiration
- 2034-12-19
AI Technical Summary
Flip-chip LEDs face bottlenecks in improving brightness, including heat dissipation management, material limitations, complex packaging technology, and low light extraction efficiency. Furthermore, the metal reflective layer is prone to peeling off, and the high resistance affects chip performance and reliability.
The silver mirror structure and ITO adhesive layer enhance reflectivity, while the current blocking layer and multi-layer metal electrode structure prevent metal shedding and migration, and block moisture from entering, thus improving brightness and reliability.
It improves the brightness and reliability of flip-chip LEDs, reduces the probability of metal reflective layer detachment, enhances current spreading effect, and improves the overall performance of the chip.
Smart Images
Figure CN223553696U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of LED technology, specifically to a flip-chip LED structure. Background Technology
[0002] The increased brightness of flip-chip LEDs has profound implications for multiple fields. Firstly, increased brightness significantly improves display quality, specifically enhancing visual clarity and color saturation, leading to their widespread use in consumer electronics such as televisions, mobile phones, and advertising screens. Secondly, in the lighting field, high-brightness LED chips achieve higher light output, reducing energy consumption and improving lighting efficiency, thereby promoting energy conservation and environmental protection.
[0003] However, after nearly two decades of development, it has become increasingly difficult to improve the brightness of flip-chip LEDs. The main bottlenecks include challenges in heat dissipation management, limitations of high-cost materials required for high brightness, complex packaging technology requirements, difficulty in improving light extraction efficiency, and the consistency of material stability under high power. These factors together affect the brightness improvement effect and the overall performance of the chip.
[0004] Typically, the metal films in direct ohmic contact with the GaN epitaxial layer are mainly Ti, Cr, and Ni. These metals have high absorption rates of visible light, which can reduce chip brightness. If the metal in direct contact with the GaN epitaxial layer is Ag or Al, which have high reflectivity, it will lead to increased ohmic contact resistance, which manifests as increased chip voltage and easy detachment of metal electrodes. Utility Model Content
[0005] Therefore, the purpose of this utility model is to provide a flip-chip LED structure that aims to further improve the brightness of flip-chip LED chips without affecting their reliability.
[0006] To achieve the above objectives, the present invention provides the following technical solution: a flip-chip LED structure, comprising a substrate, and an N-type GaN layer, a multiple quantum well layer, and a P-type GaN layer sequentially disposed on the substrate, characterized in that an ITO adhesion layer and a metal reflective layer are respectively disposed on the N-type GaN layer and the P-type GaN layer, and a current blocking layer covering the ITO adhesion layer and the metal reflective layer, and an ITO current spreading layer is disposed on the current blocking layer of the P-type GaN layer;
[0007] A first metal electrode layer is respectively disposed on the current blocking layer of the N-type GaN layer and the current spreading layer of the ITO layer to obtain a first epitaxial structure. A light-reflecting layer is disposed on the surface of the first epitaxial structure away from the substrate. The light-reflecting layer has a first via at the corresponding position of the first metal electrode layer. A second metal electrode layer is disposed at the first via to obtain a second epitaxial structure. A passivation protection layer is disposed on the surface of the second epitaxial structure away from the substrate, and a third metal electrode layer is disposed at the second via of the passivation protection layer.
[0008] By adopting the above technical solution, a silver mirror structure is formed by depositing a metal reflective layer under the current blocking layer to enhance the reflected light at the bottom of the metal, thereby improving the brightness of the flip-chip LED. To address the problem of easy detachment of the metal reflective layer, an ITO adhesion layer is set to improve the adhesion between the metal reflective layer and the epitaxial layer, greatly reducing the probability of silver mirror film detachment. At the same time, the silver mirror structure is wrapped with a current blocking layer to prevent silver migration. In addition, the structure composed of multiple metal electrode layers can effectively block the entry of moisture.
[0009] Furthermore, the thickness of the ITO adhesive layer is 1nm~4nm.
[0010] Furthermore, the metal reflective layer is composed of an Ag layer and a Ni layer stacked sequentially, wherein the thickness of the Ag layer is 30nm~200nm and the thickness of the Ni layer is 5nm~50nm.
[0011] Furthermore, the current blocking layer is a SiO2 layer, and the thickness of the current blocking layer is 100nm~600nm.
[0012] Furthermore, the thickness of the ITO current spreading layer is 10nm~150nm.
[0013] Furthermore, the light-reflecting layer is SiO2 and TiO2. X A series of stacked periodic structures, with 30 to 80 periods.
[0014] Furthermore, the passivation protective layer is a SiO2 layer, and the thickness of the passivation protective layer is 100nm~2000nm.
[0015] Furthermore, the total thickness of the N-type GaN layer, the multiple quantum well layer, and the P-type GaN layer is 4 μm to 8 μm.
[0016] Furthermore, the total thickness of the multiple quantum well layer and the P-type GaN layer is 200 nm to 800 nm. Attached Figure Description
[0017] Figure 1This is a schematic diagram of the partial flip-chip LED structure obtained in step two of the embodiments of this utility model;
[0018] Figure 2 This is a schematic diagram of the partial flip-chip LED structure obtained in step three of the present invention.
[0019] Figure 3 This is a schematic diagram of the partial flip-chip LED structure obtained in step four of the present invention.
[0020] Figure 4 This is a schematic diagram of the partial flip-chip LED structure obtained in step five of the present invention.
[0021] Figure 5 This is a schematic diagram of the partial flip-chip LED structure obtained in step six of the present invention.
[0022] Figure 6 This is a schematic diagram of the partial flip-chip LED structure obtained in step seven of the present invention.
[0023] Figure 7 This is a schematic diagram of the partial flip-chip LED structure obtained in step eight of the present invention.
[0024] Figure 8 This is a schematic diagram of the partial flip-chip LED structure obtained in step nine of the present invention.
[0025] Figure 9 This is a schematic diagram of a flip-chip LED structure.
[0026] In the figure: 10, substrate; 11, N-type GaN layer; 12, multiple quantum well layer; 13, P-type GaN layer; 21, ITO adhesion layer; 22, metal reflective layer; 23, current blocking layer; 24, ITO current spreading layer; 31, first metal electrode layer; 32, light reflective layer; 33, second metal electrode layer; 34, passivation protection layer; 35, third metal electrode layer. Detailed Implementation
[0027] To facilitate understanding of this utility model, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of this utility model are shown in the drawings. However, this utility model can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this utility model will be more thorough and complete.
[0028] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.
[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.
[0030] The embodiments of this utility model will be described below based on its overall structure.
[0031] A flip-chip LED structure, such as Figures 1 to 9 As shown, the flip-chip LED structure provided by this utility model includes a substrate 10, and an N-type GaN layer 11, a multi-quantum well layer 12, and a P-type GaN layer 13 sequentially disposed on the substrate 10. Specifically, the substrate 10 is a patterned sapphire substrate, the N-type GaN layer 11 is a Si-doped N-type GaN layer, the quantum well layer of the multi-quantum well layer 12 is an InGaN layer, the quantum barrier layer is a GaN layer, and the P-type GaN layer 13 is a Mg-doped P-type GaN layer. The total thickness of the N-type GaN layer 11, the multi-quantum well layer 12, and the P-type GaN layer 13 is 4μm~8μm, and the total thickness of the multi-quantum well layer 12 and the P-type GaN layer 13 is 200nm~800nm. It can be understood that the remaining thickness is the thickness of the N-type GaN layer 11.
[0032] An ITO adhesion layer 21 and a metal reflective layer 22 are respectively disposed on the N-type GaN layer 11 and the P-type GaN layer 13, and a current blocking layer 23 covering the ITO adhesion layer 21 and the metal reflective layer 22. An ITO current spreading layer 24 is disposed on the current blocking layer 23 of the P-type GaN layer 13. It should be noted that a portion of the surface of the N-type GaN layer 11 away from the substrate 10 is used to dispose of the multiple quantum well layer 12 and the P-type GaN layer 13, and another portion is used to dispose of the ITO adhesion layer 21, the metal reflective layer 22, and the current blocking layer 23 covering the ITO adhesion layer 21 and the metal reflective layer 22. Specifically, the ITO adhesion layer 21 has a thickness of 1nm to 4nm, and its function is to increase the adhesion between the metal Ag and the epitaxial layer and prevent detachment. The metal reflective layer 22 is composed of an Ag layer and a Ni layer stacked sequentially. The thickness of the Ag layer is 30nm to 200nm, and the thickness of the Ni layer is 5nm to 50nm. The function of the metal Ag is to reflect visible light and improve the brightness of the chip, while the metal Ni can reduce the mobility of Ag and improve the reliability of the chip fabrication process.
[0033] In this embodiment, the current blocking layer 23 is a SiO2 layer with a thickness of 100nm~600nm; the ITO current spreading layer 24 has a thickness of 10nm~150nm.
[0034] A first metal electrode layer 31 is respectively disposed on the current blocking layer 23 and the ITO current spreading layer 24 of the N-type GaN layer 11 to obtain a first epitaxial structure. A light-reflecting layer 32 is disposed throughout the first epitaxial structure. A first via is formed at the corresponding position of the first metal electrode layer 31 in the light-reflecting layer 32, and a second metal electrode layer 33 is disposed at the first via, to obtain a second epitaxial structure. A passivation protection layer 34, which is a SiO2 layer with a thickness of 100nm~2000nm, is disposed at the second via in the passivation protection layer 34. Specifically, the light-reflecting layer 32 is composed of SiO2 and TiO2. X The periodic structure is stacked sequentially, with the number of periods ranging from 30 to 80. In this embodiment, the light-reflecting layer 32 is obtained by electron beam evaporation deposition.
[0035] It should be noted that, in actual production, the fabrication process of flip-chip LEDs with a flip-chip structure is as follows:
[0036] Step 1: Provide a GaN-based epitaxial wafer grown on a sapphire substrate. The epitaxial wafer, from bottom to top, consists of: a Si-doped N-type GaN layer, an InGaN / GaN multiple quantum well layer, and a Mg-doped P-type GaN layer. The total thickness of the epitaxial wafer is between 4 μm and 8 μm.
[0037] Step 2: Spin-coat a positive photoresist onto the surface of the epitaxial wafer, and pattern the photoresist through exposure and development. Subsequently, etch the epitaxial wafer using an ICP (Inductively Coupled Plasma) machine, and after photoresist removal and cleaning, periodic MESA (Mesh Alignment and Resin) etching steps are obtained. For example... Figure 1 The diagram shown is a partial structural schematic of the flip-chip LED structure obtained in step two.
[0038] Step 3: Spin-coat the photoresist negative onto the wafer surface, expose and develop it to pattern the photoresist. Then, the wafer is successively cleaned with oxygen plasma and deionized water, and placed in a magnetron sputtering machine to deposit an ITO adhesive layer. Following this, the wafer with the ITO adhesive layer is successively cleaned with oxygen plasma and deionized water, and then placed in a metal evaporation machine to deposit a metal reflective layer. Finally, the photoresist is removed and the wafer is cleaned. Figure 2 The diagram shown is a partial structural schematic of the flip-chip LED structure obtained in step three.
[0039] Step 4: Place the wafer in a PECVD machine to deposit a current blocking layer. Spin-coat positive photoresist onto the wafer surface where the current blocking layer is deposited and pattern it. Then, use wet etching to completely remove the current blocking layer from the patterned area. The remaining current blocking layer can encapsulate and cover the metal reflective layer, preventing the migration of Ag metal within the metal reflective layer. Subsequently, remove the photoresist and clean the wafer. Figure 3 The diagram shown is a partial structural schematic of the flip-chip LED structure obtained in step four.
[0040] Step 5: Deposit an ITO current spreading layer on the wafer surface and perform annealing. The thickness of this ITO current spreading layer is 10nm~150nm, and it is deposited by magnetron sputtering or electron beam evaporation. The ITO current spreading layer is then patterned using photolithography. Figure 4 The diagram shown is a partial structural schematic of the flip-chip LED structure obtained in step five.
[0041] Step Six: Spin-coat the photoresist negative onto the wafer surface, expose and develop it to pattern the photoresist. Then, the wafer is successively cleaned with oxygen plasma and deionized water, placed in an electron beam evaporation machine, and the first metal electrode layer is deposited by electron beam evaporation. Subsequently, the photoresist is removed and the wafer is cleaned. Figure 5 The diagram shown is a partial structural schematic of the flip-chip LED structure obtained in step six.
[0042] Step 7: Deposit a light-reflecting layer on the wafer surface, and pattern the light-reflecting layer using photolithography to expose the underlying first metal electrode layer. For example... Figure 6 The diagram shown is a partial structural schematic of the flip-chip LED structure obtained in step seven.
[0043] Step 8: Referring to the method in Step 6, obtain the patterned second metal electrode layer. For example... Figure 7 The diagram shown is a partial structural schematic of the flip-chip LED structure obtained in step eight.
[0044] Step 9: Referring to the method in Step 7, obtain the graphical first passivation protective layer. For example... Figure 8 The diagram shown is a partial structural schematic of the flip-chip LED structure obtained in step nine.
[0045] Step 10: Referring to the method in Step 6, obtain the patterned third metal electrode layer. For example... Figure 9 The diagram shown is a schematic diagram of a flip-chip LED structure.
[0046] In summary, the flip-chip LED structure proposed in this invention features a silver mirror structure formed by depositing a metal reflective layer beneath the current blocking layer. This enhances the reflected light from the metal base, thereby increasing the brightness of the flip-chip LED chip. To address the issue of the metal reflective layer easily detaching, an ITO adhesion layer is incorporated to improve the adhesion between the metal reflective layer and the epitaxial layer, significantly reducing the probability of the silver mirror film detaching. Furthermore, the use of a current blocking layer to encapsulate the silver mirror structure prevents silver migration. In addition, the combination of multiple metal electrode layers effectively blocks the entry of moisture.
[0047] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0048] The embodiments described above are merely illustrative of several implementations of this utility model, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of this utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these all fall within the protection scope of this utility model. Therefore, the protection scope of this utility model patent should be determined by the appended claims.
Claims
1. A flip-chip LED structure, comprising a substrate, and an N-type GaN layer, a multiple quantum well layer, and a P-type GaN layer sequentially disposed on the substrate, characterized in that, An ITO adhesion layer, a metal reflective layer, and a current blocking layer covering the ITO adhesion layer and the metal reflective layer are respectively disposed on the N-type GaN layer and the P-type GaN layer. An ITO current spreading layer is disposed on the current blocking layer of the P-type GaN layer. A first metal electrode layer is respectively disposed on the current blocking layer of the N-type GaN layer and the current spreading layer of the ITO layer to obtain a first epitaxial structure. A light-reflecting layer is disposed on the surface of the first epitaxial structure away from the substrate. The light-reflecting layer has a first via at the corresponding position of the first metal electrode layer. A second metal electrode layer is disposed at the first via to obtain a second epitaxial structure. A passivation protection layer is disposed on the surface of the second epitaxial structure away from the substrate, and a third metal electrode layer is disposed at the second via of the passivation protection layer.
2. The flip-chip LED structure according to claim 1, characterized in that, The thickness of the ITO adhesive layer is 1 nm to 4 nm.
3. The flip-chip LED structure according to claim 1, characterized in that, The metal reflective layer is composed of an Ag layer and a Ni layer stacked sequentially, wherein the thickness of the Ag layer is 30nm~200nm and the thickness of the Ni layer is 5nm~50nm.
4. The flip-chip LED structure according to claim 1, characterized in that, The current blocking layer is a SiO2 layer, and the thickness of the current blocking layer is 100nm~600nm.
5. The flip-chip LED structure according to claim 1, characterized in that, The thickness of the ITO current spreading layer is 10nm~150nm.
6. The flip-chip LED structure according to claim 1, characterized in that, The light-reflecting layer is composed of SiO2 and TiO2. X A series of stacked periodic structures, with 30 to 80 periods.
7. The flip-chip LED structure according to claim 1, characterized in that, The passivation protective layer is a SiO2 layer, and the thickness of the passivation protective layer is 100nm~2000nm.
8. The flip-chip LED structure according to claim 1, characterized in that, The total thickness of the N-type GaN layer, the multiple quantum well layer, and the P-type GaN layer is 4 μm to 8 μm.
9. The flip-chip LED structure according to claim 8, characterized in that, The total thickness of the multiple quantum well layer and the P-type GaN layer is 200nm~800nm.