Integrated signal generation device, quantum calculation measurement and control system and quantum computer

Abstract

The utility model discloses an integrated signal generation device, a quantum calculation measurement and control system and a quantum computer, and the device comprises a first frequency up-regulation module which is used for outputting a first signal and a second signal, the frequencies of which are higher than 100 MHz, based on a received 100 MHz reference clock signal; the first power division module is used for performing power division on the basis of the first signal into multiple paths of third signals; the second power division module is used for performing power division based on the second signal into multiple paths of fourth signals; a plurality of second frequency up-regulation modules, each of which is used for outputting a path of measurement and control signal based on a path of third signal and a path of fourth signal; any second frequency up-regulation module comprises a DDS, a frequency mixer, a phase-locked loop unit and a power adjustment unit; the integrated signal generating device can provide multiple paths of measurement and control signals, is high in integration level, and can ensure that the quality of each path of measurement and control signal is good so as to ensure the accuracy of the measurement and control process.

Description

TECHNICAL FIELD

[0001] The utility model relates to quantum computer technical field especially, and it is a kind of integrated signal generating device, quantum computing measurement and control system and quantum computer. BACKGROUND

[0002] Quantum computer is a kind of physical device that carries out high-speed mathematical and logic operation, storage and processing quantum information according to quantum mechanics law;It is mainly composed of quantum measurement and control system, quantum chip system, quantum computing environment support system and quantum computer operating system. Among them, the quantum measurement and control system includes signal generating device, for providing high-frequency measurement and control signal for each quantum bit in quantum chip. The existing quantum computing directly uses the purchased commercial signal source as the signal generating device required by quantum measurement and control system, and the commercial signal source usually pursues the performance of single channel, and the expandability is generally very poor, and one commercial signal source provides a way of measurement and control signal, and with the more quantum bits integrated on quantum chip, the number of commercial signal sources required is more.

[0003] If only simply circuit of multiple commercial signal sources is merged together to form signal source providing multiple measurement and control signals, not only the integration degree is not high, but also the signal quality of each channel cannot be guaranteed.

[0004] Therefore, a high-integration multi-channel measurement and control signal signal generating device is needed, and at the same time, the quality of each signal can be guaranteed to ensure the accuracy of the measurement and control process.

[0005] It should be noted that the information disclosed in the background section of the present application is only intended to deepen the understanding of the general background of the present application, and should not be regarded as acknowledging or implying in any form that the information constitutes prior art known to those skilled in the art. UTILITY MODEL CONTENT

[0006] The utility model aims at providing an integrated signal generating device, quantum computing measurement and control system and quantum computer, which can provide multiple measurement and control signals, not only high integration, but also can guarantee the quality of each measurement and control signal to ensure the accuracy of the measurement and control process.

[0007] In order to achieve the above-mentioned purpose, the utility model provides the following technical scheme:

[0008] The utility model provides an integrated signal generating device in the first aspect, comprising:

[0009] The first frequency up-regulation module is used for outputting the first signal and the second signal with frequency higher than 100MHz based on the received 100MHz reference clock signal;

[0010] The first power division module is configured to divide the first signal into a plurality of third signals;

[0011] The second power division module is configured to divide the second signal into a plurality of fourth signals;

[0012] A plurality of second frequency up-conversion modules are configured to output a plurality of measurement and control signals based on one of the third signals and one of the fourth signals;

[0013] Each of the second frequency up-conversion modules comprises a DDS, a frequency mixer, a phase-locked loop unit and a power adjustment unit, wherein an input end of the DDS is electrically connected to an output end of the first power division module, an output end of the DDS is electrically connected to one input end of the frequency mixer, the other input end of the frequency mixer is electrically connected to an output end of the second power division module, and an output end of the frequency mixer is electrically connected to the phase-locked loop unit and the power adjustment unit in sequence.

[0014] The integrated signal generating device further comprises a PCB, and the first frequency up-conversion module, the first power division module, the second power division module and the plurality of second frequency up-conversion modules are integrated on the PCB, and the plurality of second frequency up-conversion modules are arranged in parallel and at intervals.

[0015] The integrated signal generating device further comprises a heat dissipation plate attached to the plurality of second frequency up-conversion modules, and the heat dissipation plate is provided with a partition plate near a side surface of the second frequency up-conversion modules for separating the plurality of second frequency up-conversion modules.

[0016] The first frequency up-conversion module comprises:

[0017] The first amplifier is configured to receive a 100MHz reference clock signal and perform power amplification processing on the reference clock signal.

[0018] The frequency multiplication element is connected to an output end of the amplifier and is configured to receive the signal after power amplification processing and perform frequency multiplication processing to output a first signal and a second signal with a frequency higher than 100MHz.

[0019] The integrated signal generating device further comprises:

[0020] The first surface acoustic wave filter is electrically connected between the frequency multiplication element and the first power division module, configured to receive the first signal and perform filtering processing before outputting to the first power division module.

[0021] And / or, a second acoustic surface filter, electrically connected between the frequency multiplication element and the second power division module, for receiving the second signal and performing filtering processing and outputting to the second power division module.

[0022] The integrated signal generating device as described above, further, the power adjustment unit comprises at least one second amplifier and at least one variable attenuation element connected in series, and the second amplifier at the front end is electrically connected with the output end of the phase-locked loop unit.

[0023] The integrated signal generating device as described above, further, further comprising a linear voltage regulator for providing a stable output voltage to the DDS, the phase-locked loop unit, the second amplifier and the variable attenuation element.

[0024] The integrated signal generating device as described above, further, the power supply pins of the DDS, the phase-locked loop, the second amplifier and the variable attenuation element are all electrically connected with filter capacitors.

[0025] The utility model discloses a second aspect provides a kind of quantum computing measurement and control system, comprising above-mentioned integrated signal generating device, and the integrated signal generating device is used to output multiple control signals to quantum chip.

[0026] The utility model discloses a third aspect provides a kind of quantum computer, comprising above-mentioned quantum computing measurement and control system and quantum chip, and the quantum chip operates quantum computing task according to the measurement and control signal provided by the quantum computing measurement and control system.

[0027] The utility model has the advantages that:

[0028] The integrated signal generating device of the application, by setting the first power division module and the second power division module and the plurality of second frequency uplink modules, so that the signal generating device of the application can output multiple control signals simultaneously, the plurality of second frequency uplink modules share a first frequency uplink module, which improves the integration of the signal generating device. The multiple control signals of the application are all based on 100MHz clock signal as reference signal, which ensures the stability of the phase difference of the final multiple control signals. The reference signal passes through the first frequency uplink module and the second frequency uplink module in turn to improve the signal frequency and obtain the required frequency control signal. At the same time, the second frequency uplink module can accurately control the frequency of the control signal by setting DDS, frequency mixer and phase-locked loop. By setting the power adjustment unit, the power of the control signal can be controlled to meet the working requirements of the quantum chip, so as to ensure the quality of each control signal and the accuracy of the control process.

[0029] The quantum computing measurement and control system and quantum computer provided by this utility model both include the aforementioned integrated signal generating device, and therefore have the same beneficial effects, which will not be described in detail here. Attached Figure Description

[0030] Figure 1 Schematic diagram of the integrated signal generator provided in the embodiments of this utility model Figure 1 ;

[0031] Figure 2 Schematic diagram of the integrated signal generator provided in the embodiments of this utility model Figure 2 ;

[0032] Figure 3 A schematic diagram of the structure of a second frequency up-regulation module provided in an embodiment of this utility model;

[0033] Figure 4 A schematic diagram of the structure of a power adjustment unit provided in an embodiment of this utility model;

[0034] In the attached figures, the following are the reference numerals: 10, First frequency upscaling module; 11, First amplifier; 12, Frequency multiplier; 13, First surface acoustic wave (SAW) filter; 14, Second SAW filter; 20, First power divider module; 30, Second power divider module; 40, Second frequency upscaling module; 41, DDS; 42, Mixer; 43, Phase-locked loop (PLL) unit; 44, Low-pass filter; 45, Third SAW filter; 46, Power adjustment unit; 461, Second amplifier; 462, Digitally controlled attenuator; 463, Bandpass filter; 464, Voltage-controlled attenuator. Detailed Implementation

[0035] To enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of this application. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0036] In the description of this utility model, it should be understood that the terms "center", "upper", "lower", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0037] In addition, the terms "first", "second", etc. are used only for descriptive purposes and should not be construed as indicating or implying relative importance or an indicated number of technical features. Therefore, the features defined as "first", "second", etc. can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise specifically limited.

[0038] Figure 1 The structure of the integrated signal generating device provided by the embodiment of the present application is shown in the figure Figure 1 ; as Figure 1 shown: the embodiment of the present application discloses an integrated signal generating device, comprising:

[0039] The first frequency up-regulation module 10 is used for outputting a first signal and a second signal with a frequency higher than 100MHz based on the received 100MHz reference clock signal.

[0040] The first power division module 20 is used for power division into multiple third signals based on the first signal.

[0041] The second power division module 30 is used for power division into multiple fourth signals based on the second signal.

[0042] A plurality of second frequency up-regulation modules 40, each of the second frequency up-regulation modules 40 is used for outputting a control signal based on one of the third signals and one of the fourth signals.

[0043] Any of the second frequency up-regulation modules 40 comprises a DDS 41 (direct digital frequency synthesizer), a frequency mixer 42, a phase-locked loop unit 43 and a power adjustment unit 46; the input end of each DDS 41 is electrically connected with one output end of the first power division module 20, the output end of the DDS 41 is electrically connected with one input end of the frequency mixer 42, the other input end of the frequency mixer 42 is electrically connected with one output end of the second power division module 30, and the output end of the frequency mixer 42 is electrically connected with the phase-locked loop unit 43 and the power adjustment unit 46 in sequence.

[0044] The integrated signal generating device of the embodiment can simultaneously output multiple measurement and control signals by setting the first power division module 20 and the second power division module 30 and the multiple second frequency up-conversion modules 40, and the multiple second frequency up-conversion modules 40 share one first frequency up-conversion module 10, thereby improving the integration of the signal generating device. The multiple measurement and control signals of the application are all based on a 100MHz clock signal as a reference signal, which ensures the stability of the phase difference of the final multiple measurement and control signals. The reference signal is sequentially passed through the first frequency up-conversion module 10 and the second frequency up-conversion module 40 to improve the signal frequency to obtain the required frequency measurement and control signal. At the same time, the second frequency up-conversion module 40 can accurately control the frequency of the measurement and control signal by setting the DDS 41, the frequency mixer 42 and the phase-locked loop unit 43, and can control the power of the measurement and control signal by setting the power adjustment unit 46 to meet the working requirements of the quantum chip, thereby ensuring the quality of each measurement and control signal to ensure the accuracy of the measurement and control process.

[0045] The specific process of generating a measurement and control signal of about 12-16GHz based on a 100MHz reference clock signal of the integrated signal generator of the application is as follows: Figure 1

[0046] The 100MHz reference clock signal is passed through the first frequency up-conversion module 10 to obtain a 1GHz first signal and a 2.5GHz second signal. The 1GHz first signal is power divided into two 1GHz third signals by the first power division module 20, and the two 1GHz third signals output two 80-100MHz signals after passing through two DDS 41. The 2.5GHz second signal is power divided into two 2.5GHz fourth signals by the second power division module 30, and a 2.5GHz fourth signal and a 80-100MHz signal are mixed by the frequency mixer 42 to obtain a 2400-2420MHz signal. Two 2400-2420MHz signals are respectively passed through two phase-locked loop units 43 to output two 12-16GHz signals, and the two 12-16GHz signals are respectively passed through a power adjustment unit 46 to adjust the power to meet the working requirements of the quantum bit to obtain two 12-16GHz measurement and control signals.

[0047] Further, the frequency of the processed signal can be accurately controlled by the combination of the DDS 41 and the frequency mixer 42, so that the frequency of the measurement and control signal is an integer multiple of the frequency of the mixed signal, thereby only using the integer mode of the phase-locked loop unit 43, which has the effect of reducing spurious, thereby improving the quality of the final measurement and control signal.

[0048] ​In some embodiments of the present embodiment, the integrated signal generating device further comprises a PCB board; the first frequency up-conversion module 10, the first power division module 20, the second power division module 30, and a plurality of the second frequency up-conversion modules 40 are integrated on the PCB board, and the plurality of the second frequency up-conversion modules 40 are arranged in parallel and at intervals; in this way, the integration level is improved, the electromagnetic interference and crosstalk between different second frequency up-conversion modules 40 are reduced by arranging the plurality of the second frequency up-conversion modules 40 in parallel and at intervals, and the quality of each signal is ensured to ensure the accuracy of the measurement and control.

[0049] In some embodiments of the present embodiment, the integrated signal generating device further comprises a heat dissipation plate attached to the plurality of the second frequency up-conversion modules 40, and the heat dissipation plate is provided with a partition plate for separating the plurality of the second frequency up-conversion modules 40 near the side surface of the second frequency up-conversion module 40; by providing the heat dissipation plate and the partition plate, the heat dissipation channels of the second frequency up-conversion modules 40 are independent of each other, which not only prevents heat accumulation but also reduces interference, and the quality of each signal is ensured to ensure the accuracy of the measurement and control. A specific example of a heat dissipation plate is given below, which comprises a bottom plate and a plurality of parallel and interval arranged heat dissipation fins arranged vertically on the bottom plate, and the side of the bottom plate away from the heat dissipation fins is provided with a plurality of parallel and interval arranged partition plates for separating the plurality of the second frequency up-conversion modules 40; further, a heat-conducting silica gel pad can be arranged between the bottom plate and the second frequency up-conversion module 40.

[0050] Figure 2 Structure diagram of the signal generating device provided by the present embodiment Figure 2 ; as Figure 2 shown: the first frequency up-conversion module 10 comprises:

[0051] A first amplifier 11 is used for receiving a 100MHz reference clock signal and performing power amplification processing on the reference clock signal.

[0052] A frequency multiplication element 12 is connected with the output end of the amplifier and is used for receiving the signal after power amplification processing and performing frequency multiplication processing to output a first signal and a second signal with a frequency higher than 100MHz.

[0053] The first frequency up-conversion module 10 of the present embodiment improves the power level of the 100MHz reference clock signal by arranging the first amplifier 11, ensures that the signal still maintains sufficient strength and clarity after the frequency multiplication process, helps to reduce interference and noise in communication, and improves the stability of the signal and the quality of communication. By arranging the frequency multiplication element 12, the signal frequency of the 100MHz reference clock signal is preliminarily increased to ensure the stability of the signal and improve the quality of the measurement and control signal.

[0054] In this embodiment, the frequency multiplier element 12 includes a comb spectrum generator or a frequency multiplier.

[0055] Continue as Figure 2 As shown: In some embodiments of this example, the integrated signal source generator further includes a first surface acoustic wave (SAW) filter 13, electrically connected between the frequency multiplier element 12 and the first power divider module 20, for receiving the first signal, filtering it, and then outputting it to the first power divider module 20. By setting the first SAW filter 13, the first signal is filtered, reducing spurious signals in the first signal, thereby reducing spurious signals in the final measurement and control signal and improving the quality of the measurement and control signal. In this embodiment, the number of first SAW filters 13 is not specifically limited; there can be one, two, or more, connected in series between the output terminal of the frequency multiplier element 12 and the input terminal of the first power divider module 20.

[0056] Continue as Figure 3 As shown: In some embodiments of this example, the integrated signal source generator further includes a second surface acoustic wave (SAW) filter 14, electrically connected between the frequency multiplier element 12 and the second power divider module 30, for receiving the second signal, filtering it, and then outputting it to the second power divider module 30. By setting the second SAW filter 14, the second signal is filtered, reducing spurious signals in the second signal, thereby reducing spurious signals in the final measurement and control signal and improving the quality of the measurement and control signal. In this embodiment, the number of second SAW filters 14 is not specifically limited; there can be one, two, or more, connected in series between the output terminal of the frequency multiplier element 12 and the input terminal of the second power divider module 30.

[0057] Figure 3 A schematic diagram of the structure of a second frequency up-regulation module 40 provided in an embodiment of this utility model; as shown Figure 3 As shown, the second frequency upsampling module 40 also includes a third surface acoustic wave (SAW) filter 45, electrically connected between the mixer 42 and the phase-locked loop (PLL) unit 43, used to filter the received signal before outputting it to the PLL unit 43. By setting the third SAW filter 45, the mixed signal is filtered, reducing spurious signals in the mixed signal, thereby reducing spurious signals in the final measurement and control signal and improving the quality of the measurement and control signal. In this embodiment, the number of third SAW filters 45 is not specifically limited; it can be one, two, or more, connected in series between the output of the mixer 42 and the input of the PLL unit 43.

[0058] Continue as Figure 4As shown in the figure: in some embodiments of the present embodiment, the second frequency up-regulation module 40 further comprises a low-pass filter 44 electrically connected between the DDS 41 and the frequency mixer 42, for receiving and filtering the signal output to the frequency mixer 42. By setting the low-pass filter 44, the signal processed by the DDS 41 is filtered, which reduces the spurious signal in the signal processed by the DDS 41, thereby reducing the spurious of the final measurement and control signal to improve the quality of the measurement and control signal. In the present embodiment, the number of low-pass filters 44 is not specifically limited, and can be one, two or more, connected in series between the output of the DDS 41 and the input of the frequency mixer 42.

[0059] In some embodiments of the present embodiment, the power adjustment unit 46 comprises at least one second amplifier 461 and at least one variable attenuation element connected in series. The second amplifier 461 at the front end is electrically connected to the output of the phase-locked loop. By setting at least one second amplifier 461, the power of the signal can be improved. By setting at least one variable attenuation element, the power can be attenuated, and at the same time, fine adjustment can be realized to achieve large dynamic and small step of the power of the signal, so as to improve the quality and precision of the final control signal, thereby improving the measurement and control accuracy.

[0060] In the present embodiment, the second amplifier 461 can be one or more; the type of variable attenuation element is not specifically limited, and can include a digital attenuator 462 and / or a voltage-controlled attenuator 464, and the number of digital attenuators 462 and voltage-controlled attenuators 464 is not specifically limited; for example, Figure 4 A structure diagram of a power adjustment unit 46 provided by the present embodiment is shown in the figure: Figure 4 As shown in the figure: the power adjustment unit 46 comprises two second amplifiers 461, a digital attenuator 462 and a voltage-controlled attenuator 464 connected in series, so as to realize fine adjustment of the power of the measurement and control signal with a step of less than 0.1dB, thereby improving the quality and precision of the measurement and control signal to improve the accuracy of the measurement and control. Further, as shown in the figure, ​ The power adjustment unit 46 further comprises a band-pass filter 463 electrically connected between the digital attenuator 462 and the voltage-controlled attenuator 464, which realizes the effect of out-of-band spurious suppression and meets the requirements of quantum measurement and control system spurious output.

[0061] In some embodiments of the present embodiment, the integrated signal generating device further comprises a FPGA (Fie l d-Programmab l e Gate Array, field-programmable gate array) for providing a control signal to the digital attenuator 462. The FPGA sends a control signal to control the digital attenuator 462 to attenuate the amplified signal power. Further, one port of the FPGA can be in communication connection with a plurality of digital attenuators 462 to realize port multiplexing; further, the FPGA is in communication connection with a plurality of digital attenuators 462 through a buffer; by setting the buffer, the function of protecting the FPGA is realized.

[0062] In some embodiments of the present embodiment, the integrated signal generating device further comprises a linear voltage regulator for providing a stable output voltage to the DDS 41, the phase-locked loop unit 43, the second amplifier 461, and the variable attenuation element; by setting the linear voltage regulator, a stable output voltage is provided to the DDS 41, the phase-locked loop unit 43, the second amplifier 461, and the variable attenuation element, thereby reducing the spurious signal caused by power fluctuations and improving the quality of the final obtained measurement and control signal.

[0063] In order to further reduce the spurious signal caused by power fluctuations, in some embodiments of the present embodiment, a filter capacitor is electrically connected to the power supply pin of the electrical device. By setting the filter capacitor, high-frequency noise and fluctuations on the power supply line can be filtered out, reducing the spurious signal caused by power fluctuations and ensuring the stability of the power supply to improve the quality of the final measurement and control signal.

[0064] In the present embodiment, the first power division module 20 can be a power divider, exemplarily, the first power division module 20 is an eight-way power divider; or a plurality of power dividers can be cascaded in sequence, exemplarily, the first power division module 20 comprises three two-way power dividers, the input end of one two-way power divider is electrically connected with the first frequency up-conversion module 10, and the input ends of the other two two-way power dividers are respectively linked with one output end of the previous two-way power divider; further, an amplifier is arranged between any two adjacent power dividers in the plurality of power dividers, which not only ensures the power division but also ensures the signal strength, thereby ensuring the quality of each signal and the accuracy of measurement and control.

[0065] In the embodiment, the second power division module 30 can be a power divider. For example, the second power division module 30 is an eight-way power divider. Alternatively, the second power division module 30 can include multiple power dividers connected in cascade. For example, the second power division module 30 includes three two-way power dividers. The input end of one two-way power divider is electrically connected to the first frequency up-conversion module 10. The input ends of the other two two-way power dividers are respectively connected to one output end of the upper-stage two-way power divider. Further, an amplifier is arranged between any two adjacent power dividers in the multiple power dividers. The power division ensures the signal strength, thereby ensuring the quality of each signal and the accuracy of the measurement and control.

[0066] In the embodiment, the 100MHz clock signal can be provided by a crystal oscillator source. The crystal oscillator source has high stability and low phase noise, thereby further reducing the phase noise of the final signal and improving the signal quality.

[0067] In some embodiments of the embodiment, the DDS 41 has a frequency control word with 48 bits or more. The DDS 41 with a high-bit frequency control word can provide higher resolution, which means that it can generate a signal closer to an ideal waveform, thereby reducing spurious components and improving the purity of the signal. For example, the DDS 41 has a frequency control word with 48 bits, so that the minimum frequency resolution reaches 4uHz.

[0068] In some embodiments of the embodiment, the phase-locked loop unit 43 includes a phase comparator, a loop filter, an oscillator, and a frequency divider. The phase comparator is configured to generate an error signal based on the phase difference between the signal output by the mixer 42 and the feedback signal output by the frequency divider, and output the error signal to the loop filter. The loop filter is configured to generate a control voltage signal based on the error signal, and output the control voltage signal to the oscillator. The oscillator is configured to output a fifth signal with the same frequency as the measurement and control signal to the power adjustment unit 46 and the frequency divider based on the control voltage signal. The frequency divider is configured to perform frequency division processing on the fifth signal to obtain the feedback signal and output the feedback signal to the phase comparator.

[0069] In some embodiments of the embodiment, the loop filter in the phase-locked loop unit 43 includes a passive loop filter. The passive loop filter mainly includes passive elements such as resistors (R) and capacitors (C). Compared with an active loop filter, the passive loop filter is simpler and does not include an amplifier, thereby avoiding the noise that can be introduced by the amplifier, improving the signal accuracy and stability output by the phase-locked loop unit 43, and improving the quality of the final measurement and control signal. In the embodiment, when the phase-locked loop unit 43 uses a passive loop filter, the oscillator in the phase-locked loop unit 43 preferably uses a VCO with low tuning voltage.

[0070] In some embodiments of the present embodiment, an amplifier can be arranged between the second surface acoustic wave filter 14 and the second power division module 30, between the first surface acoustic wave filter 13 and the first power division module 20, between the second power division module 30 and the frequency mixer 42, and between the first power division module 20 and the DDS 41 according to actual requirements.

[0071] Based on the same application concept, the present embodiment further provides a quantum computing measurement and control system, comprising the integrated signal generating device, and the integrated signal generating device is configured to output a plurality of measurement and control signals to a quantum chip.

[0072] The quantum computing measurement and control system of the present application comprises the integrated signal generating device, and thus has the same beneficial effects as the integrated signal generating device, which will not be described herein.

[0073] Based on the same application concept, the present embodiment further provides a quantum computer, comprising the quantum computing measurement and control system and a quantum chip, and the quantum chip is configured to perform a quantum computing task according to the measurement and control signals provided by the quantum computing measurement and control system.

[0074] The quantum computer of the present application comprises the quantum computing measurement and control system, and thus has the same beneficial effects as the quantum computing measurement and control system, which will not be described herein.

[0075] In the description of the present specification, the description of the terms "some embodiments" or "examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiments or examples are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in the present specification.

[0076] The above is only the preferred embodiment of the present application, and does not limit the present application in any way. Any person skilled in the art can make any form of equivalent replacement or modification of the technical solutions and technical contents disclosed in the present application without departing from the scope of the technical solutions of the present application, and such changes still belong to the protection scope of the present application.

Claims

1. An integrated signal generating device, characterized by The application relates to an integrated signal generating device. The first frequency up-conversion module is used for outputting a first signal and a second signal with a frequency higher than 100 MHz based on a received 100 MHz reference clock signal. The first power division module is used for dividing the first signal into multiple third signals. The second power division module is used for dividing the second signal into multiple fourth signals. Each of the multiple second frequency up-conversion modules is used for outputting a tracking signal based on one of the third signals and one of the fourth signals. Each of the second frequency up-conversion modules comprises a DDS, a frequency mixer, a phase-locked loop unit and a power adjustment unit. The input end of each DDS is electrically connected with one output end of the first power division module; the output end of the DDS is electrically connected with one input end of the frequency mixer; the other input end of the frequency mixer is electrically connected with one output end of the second power division module; and the output end of the frequency mixer is electrically connected with the phase-locked loop unit and the power adjustment unit in sequence.

2. The integrated signal generating device of claim 1, wherein The application further relates to a PCB. The first frequency up-conversion module, the first power division module, the second power division module and the multiple second frequency up-conversion modules are integrated on the PCB, and the multiple second frequency up-conversion modules are arranged in parallel and at intervals. The application further relates to a heat dissipation plate attached to the multiple second frequency up-conversion modules.

3. The integrated signal generating device of claim 1, wherein, The first frequency up-conversion module comprises a first amplifier used for receiving a 100 MHz reference clock signal and performing power amplification processing on the reference clock signal. The frequency multiplication element is connected with the output end of the amplifier and is used for receiving the signal after power amplification processing and performing frequency multiplication processing to output the first signal and the second signal with a frequency higher than 100 MHz.

4. The integrated signal generating device of claim 1, wherein, The application further relates to a first acoustic surface filter electrically connected between the frequency multiplication element and the first power division module and used for receiving the first signal and performing filtering processing to output to the first power division module. The application further relates to a second acoustic surface filter electrically connected between the frequency multiplication element and the second power division module and used for receiving the second signal and performing filtering processing to output to the second power division module. The power adjustment unit comprises at least one second amplifier and at least one variable attenuation element connected in sequence, and the second amplifier at the foremost end is electrically connected with the output end of the phase-locked loop unit.

5. The integrated signal generating device of claim 4, wherein, The application further relates to a linear voltage stabilizer used for providing a stable output voltage to the DDS, the phase-locked loop unit, the second amplifier and the variable attenuation element. The supply pins of the DDS, the phase-locked loop, the second amplifier and the variable attenuation element are electrically connected with filter capacitors. The application relates to an integrated signal generating device used for outputting multiple tracking signals to a quantum chip.

6. The integrated signal generating device of claim 1, wherein, The application relates to a quantum computing tracking system and a quantum chip, wherein the quantum chip is used for performing a quantum computing task according to the tracking signals provided by the quantum computing tracking system.

7. The integrated signal generating device of claim 6, wherein, ​ 8. The integrated signal generating device of claim 6, wherein, ​ 9. A quantum computing control system, comprising: ​ 10. A quantum computer, characterized by, ​

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