Dual-protection super capacitor charging and discharging circuit

Abstract

The utility model discloses a dual-protection super capacitor charging and discharging circuit, which is characterized in that a DC-DC conversion circuit is used for converting 12V voltage into 5V voltage and outputting the 5V voltage to the input end of an overvoltage protection circuit, and the output end of the overvoltage protection circuit outputs the 5V voltage to the input end of a super capacitor equalization circuit; the output end of the super capacitor equalization circuit is electrically connected with the input end of the DC-DC conversion circuit, the output end of the DC-DC conversion circuit is electrically connected with the input end of the overcurrent protection circuit, and the overcurrent protection circuit is used for protecting normal work of the front-end circuit. According to the utility model, during the constant voltage charging process, the safety of the first super capacitor and the second super capacitor can be effectively improved, the service life is effectively prolonged, and the stability is effectively improved.

Description

TECHNICAL FIELD

[0001] The utility model relates to electrical technology field especially relates to a double protection's super capacitor charge -discharge circuit. BACKGROUND

[0002] With the development of renewable energy and new energy storage technology, super capacitor has the advantages of power stability, fast charge and discharge, long service life, etc.

[0003] The super capacitor is limited by its low rated voltage, and generally needs multiple super capacitors to form a super capacitor group through series connection. This method improves the voltage level of the super capacitor and increases the charging and discharging requirements of the super capacitor, achieving stable and balanced voltage of multiple super capacitor groups during charging, high current and voltage power quality during discharging, maintaining the stability and safety of the super capacitor group, and having important research significance.

[0004] The super capacitor discharge is mainly used to provide the required current and voltage for the concentrator terminal. During the discharging process, if the rear-end circuit has short circuit or other adverse conditions, it may cause damage to the super capacitor discharge circuit, and the super capacitor may be over-discharged, affecting the service life and stability of the super capacitor. UTILITY MODEL CONTENTS

[0005] The utility model aims at providing a double protection's super capacitor charge -discharge circuit, which effectively solves the problems raised in the above background technology.

[0006] To achieve the above-mentioned purpose, the utility model provides the following technical scheme.

[0007] A double protection's super capacitor charge -discharge circuit, characterized by: including DC-DC conversion circuit, overvoltage protection circuit, super capacitor equalization circuit, DC-DC conversion circuit and overcurrent protection circuit, the DC-DC conversion circuit is used to convert 12V voltage into 5V voltage output to the input end of overvoltage protection circuit, the output end of overvoltage protection circuit outputs 5V voltage to the input end of super capacitor equalization circuit, the output end of super capacitor equalization circuit and the input end of DC-DC conversion circuit are electrically connected, the output end of DC-DC conversion circuit and the input end of overcurrent protection circuit are electrically connected, and the overcurrent protection circuit is used to protect the normal work of the front-end circuit.

[0008] Preferably, the DC-DC conversion circuit comprises a first input capacitor, a buck chip, a first voltage dividing resistor, a first inductive element, a switched capacitor, a switched resistor, a first output capacitor, the first input capacitor is electrically connected with the input pin of the buck chip, the feedback FB pin of the buck chip is electrically connected with at least three series-connected first voltage dividing resistors for adjusting the output voltage; the output SW pin of the buck chip is electrically connected with the first inductive element to provide a stable output voltage; the switched capacitor and the switched resistor are connected in series and are respectively electrically connected with the guide pin and the output pin of the internal switch of the buck chip through circuits; the output end of the buck chip is connected with the circuit of the first output capacitor, and the circuit of the first output capacitor is electrically connected with the input end of the overvoltage protection circuit.

[0009] Preferably, the overvoltage protection circuit comprises a first MOS tube, a second voltage dividing resistor, a triode, a second voltage stabilizing resistor and a voltage stabilizing tube, the circuit of the output capacitor is electrically connected with the D pole of the first MOS tube, the S pole of the first MOS tube is connected with the input end of the power supply, the G pole of the first MOS tube is electrically connected with the C pole of the triode through the second voltage dividing resistor, and the D pole of the first MOS tube is electrically connected with the input end of the super capacitor equalization circuit; the B pole of the triode is electrically connected with the second voltage stabilizing resistor and the voltage stabilizing tube through circuits.

[0010] Preferably, the super capacitor equalization circuit comprises at least a first super capacitor, a second super capacitor, a first current limiting resistor, a second current limiting resistor, a first voltage detection chip, a second voltage detection chip, a third current limiting resistor, a second MOS tube and a third MOS tube, the D pole of the first MOS tube is electrically connected with the positive pole of the first super capacitor through the first current limiting resistor circuit, the first super capacitor is connected in cascade with the second super capacitor, the negative pole of the second super capacitor is grounded through a circuit, the first super capacitor is in communication with the first voltage detection chip, the first voltage detection chip is respectively in electrical communication with the second current limiting resistor and the second MOS tube; the second voltage detection chip is respectively in electrical communication with the third current limiting resistor and the third MOS tube.

[0011] Preferably, the DC-DC conversion circuit comprises a second input capacitor, a boost chip, a second inductive element, a switching resistor, a power supply capacitor, a second output capacitor, a third voltage dividing resistor, a fourth voltage dividing resistor and a limiting resistor, the second input capacitor is electrically connected with an input pin of the boost chip, an SW input end of the boost chip is connected with the second inductive element, a switching resistor is connected between an SW pin and an FSW pin of the boost chip, a power supply capacitor is arranged between the SW pin and a BOOT pin, an LDO output power supply of the boost chip is connected with a first enable resistor and a boost capacitor through a circuit respectively; a COMP pin of the boost chip is connected with a compensation resistor and a compensation capacitor through a circuit in series; a FB pin of the boost chip is connected with the third voltage dividing resistor and the fourth voltage dividing resistor respectively, the third voltage dividing resistor and the fourth voltage dividing resistor are connected with at least three second output capacitors in parallel through a circuit, a negative electrode of the second output capacitor is grounded, and a positive electrode thereof is connected with an overcurrent protection circuit through a circuit; an ILIM pin of the boost chip is connected with the limiting resistor through a circuit.

[0012] Preferably, the overcurrent protection circuit comprises a third input capacitor, a limiting chip, a second enable resistor and a feedback resistor, the second output capacitor is connected with a positive electrode of the third input capacitor through a circuit, a negative electrode of the third input capacitor is grounded, the third input capacitor is connected with the second enable resistor through a circuit and then connected with an ENUV pin of the limiting chip; an ILIM pin of the limiting chip is connected with an overload resistor R74 through a circuit and then grounded; a VOP pin of the limiting chip is connected with the feedback resistor through a circuit.

[0013] Compared with the prior art, the utility model has the advantages of the following beneficial effects:

[0014] (1) the utility model discloses according to the value of preestablished, first to DC-DC conversion circuit step-down output steady voltage DC support capacitor charges, when charging to the set value, DC-DC conversion circuit works, i.e. the discharge circuit starts to work, when the rear-end circuit appears short circuit, then the protection circuit works, and the power output is 0;Through setting overvoltage protection circuit and overcurrent protection circuit to protect the super capacitor equalizing circuit, DC-DC conversion circuit provides steady charging voltage, and also limits the maximum charging current, overvoltage protection circuit prevents DC-DC conversion circuit from overvoltage protection in the abnormality, and the super capacitor equalizing circuit guarantees the maximum charging voltage of the first super capacitor C180 and the second super capacitor C181, DC-DC conversion circuit guarantees the output steady power supply voltage, and overcurrent protection circuit limits the maximum discharge current and prevents the damage of the front-end circuit caused by the short circuit of the rear-end circuit. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 The utility model discloses a framework flow chart;

[0016] Figure 2 The circuit principle diagram of the DC-DC conversion circuit of the utility model;

[0017] Figure 3 The circuit principle diagram of the overvoltage protection circuit of the utility model;

[0018] Figure 4 The circuit principle diagram of the super capacitor equalization circuit of the utility model;

[0019] Figure 5 The circuit principle diagram of the DC-DC conversion circuit of the utility model;

[0020] Figure 6 The circuit principle diagram of the overcurrent protection circuit of the utility model;

[0021] Figure 7 The overall circuit diagram of the utility model. DETAILED DESCRIPTION

[0022] The technical solutions in the embodiments of the utility model will be clearly and completely described below with reference to the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments.

[0023] In the description of the utility model, unless otherwise specified, the meaning of "multiple" is two or more than two; the directions or position relations indicated by the terms "upper", "lower", "left", "right", "inner", "outer", "front end", "rear end", "head", "tail" and the like are based on the directions or position relations shown in the drawings, and are only for the convenience of describing the utility model and simplifying the description, and are not intended to indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the utility model. In addition, the terms "first", "second", "third" and the like are only for the purpose of description, and cannot be understood as indicating or implying relative importance.

[0024] In the description of the utility model, it should be noted that, unless otherwise specified and limited, the terms "connected", "connected" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium. For ordinary skilled in the art, the specific meaning of the above terms in the utility model can be understood according to the specific circumstances.

[0025] As Figure 1 And Figure 7As shown, the DC-DC conversion circuit is used to convert 12V voltage into 5V voltage output to the input end of the overvoltage protection circuit, the output end of the overvoltage protection circuit outputs 5V voltage to the input end of the super capacitor equalization circuit, the output end of the super capacitor equalization circuit is electrically connected with the input end of the DC-DC conversion circuit, and the output end of the DC-DC conversion circuit is electrically connected with the input end of the overcurrent protection circuit, and the overcurrent protection circuit is used to protect the normal work of the front-end circuit.

[0026] As shown in the figure, Figure 2 As shown, the DC-DC conversion circuit includes first input capacitors C42 and C13, a step-down chip U2, first voltage dividing resistors R19, R21 and R62, a first inductive element L1, a switch capacitor C9, a switch resistor R22, and a first output capacitor C16. The first input capacitors C42 and C13 are connected to the input pins of the step-down chip U2 and serve as filters. The input voltage is divided by the first voltage dividing resistors R4 and input into the enable EN pin of the step-down chip U2 to provide an enable signal for the step-down chip U2. The first voltage dividing resistors R19, R21 and R62 are connected in series to divide the output voltage and input into the feedback FB pin of the step-down chip U2 to provide a feedback signal for the step-down chip U2 to adjust the output voltage. The first inductive element L1 is connected to the output SW pin of the step-down chip U2 to provide a stable output voltage. The switch capacitor C9 and the switch resistor R22 are connected in series to the bootstrap pin BST and the output pin SW of the step-down chip U2 to provide current for the internal switch driver of the step-down chip U2. The C16 is a first output capacitor and serves as a filter. The first output capacitor C16 is connected to the D pole of the first MOS transistor V26 through a circuit.

[0027] As shown in the figure, Figure 3 As shown, the overvoltage protection circuit includes a first MOS transistor V26, second voltage dividing resistors R64 and R65, a triode V91, a second voltage stabilizing resistor R67 and a voltage stabilizing tube V25. The D pole of the first MOS transistor V26 is connected to the power supply output, and the S pole is connected to the power supply input. The second voltage dividing resistors R64 and R65 divide the voltage to provide a bias voltage for the G pole of the first MOS transistor V26, so that the first MOS transistor V26 is always on by default. V91 is a PNP triode, the E pole is connected to the power supply, the C pole is connected to the G pole of V26, and the second voltage stabilizing resistor R67 and the voltage stabilizing tube V25 provide a bias voltage for the B pole of the triode V91. When the power supply voltage rises and the voltage at the B pole of the triode V91 is always stable at a stable value, the triode V91 is turned on when the voltage difference between the E and B poles of the triode V91 exceeds 0.7V. The G pole of the first MOS transistor V26 is directly connected to the power supply voltage, the voltage difference between the G and S poles of the first MOS transistor V26 is zero, the first MOS transistor V26 is turned off, and the power supply does not output, thereby achieving overvoltage protection.

[0028] As shown in the figure, Figure 4As shown, the super capacitor equalization circuit includes at least a first super capacitor C180, a second super capacitor C181, a first current-limiting resistor R63, a second current-limiting resistor R55 and R56, a first voltage detection chip V58, a second voltage detection chip V63, a third current-limiting resistor R57 and R58, a second MOS tube Q1 and a third MOS tube Q2. The super capacitor is composed of the first super capacitor C180 and the second super capacitor C181 in cascade. According to the voltage at the end of the super capacitor and the equalization charging demand, the super capacitors of the same specification are selected, and the storage capacity is improved by cascading multiple super capacitors. The D pole of the first MOS tube V26 is electrically connected to the positive pole of the first super capacitor C180 through the first current-limiting resistor R63 circuit, and the first current-limiting resistor R63 limits the charging current input to the super capacitor equalization circuit by the overvoltage protection circuit. The first super capacitor C180 is connected in cascade with the second super capacitor C181, and the negative pole of the second super capacitor C181 is grounded through the circuit. The first super capacitor C180 is in communication with the first voltage detection chip V58.

[0029] In the embodiment, R55 and R56 are the second current-limiting resistor, R57 and R58 are the third current-limiting resistor, Q1 is the second MOS tube, and Q2 is the third MOS tube. When the charging voltage between the two ends of the second super capacitor C181 is greater than the detection voltage of the second voltage detection chip V63, the second voltage detection chip V63 outputs a low level, so that the third MOS tube Q2 is turned on, thereby protecting the second super capacitor C181. When the charging voltage between the two ends of the first super capacitor C180 exceeds the detection voltage of the first voltage detection chip V58, the first voltage detection chip V58 outputs a low level, so that the second MOS tube Q1 is turned on, thereby protecting the first super capacitor C180.

[0030] The super capacitor charging method mainly includes constant voltage charging, constant current charging, constant power charging, floating charging, pulse charging, etc. The embodiment uses constant voltage charging. In the process of constant voltage charging, stable charging voltage is very important. In order to cope with the adverse situation of sudden change of constant voltage charging voltage, the embodiment increases the overvoltage protection circuit, which can effectively improve the safety of the first super capacitor and the second super capacitor, and effectively improve the service life and stability.

[0031] As shown in FIG. 6, the super capacitor equalization circuit includes at least a first super capacitor C180, a second super capacitor C181, a first current-limiting resistor R63, a second current-limiting resistor R55 and R56, a first voltage detection chip V58, a second voltage detection chip V63, a third current-limiting resistor R57 and R58, a second MOS tube Q1 and a third MOS tube Q2. The super capacitor is composed of the first super capacitor C180 and the second super capacitor C181 in cascade. According to the voltage at the end of the super capacitor and the equalization charging demand, the super capacitors of the same specification are selected, and the storage capacity is improved by cascading multiple super capacitors. The D pole of the first MOS tube V26 is electrically connected to the positive pole of the first super capacitor C180 through the first current-limiting resistor R63 circuit, and the first current-limiting resistor R63 limits the charging current input to the super capacitor equalization circuit by the overvoltage protection circuit. The first super capacitor C180 is connected in cascade with the second super capacitor C181, and the negative pole of the second super capacitor C181 is grounded through the circuit. The first super capacitor C180 is in communication with the first voltage detection chip V58. Figure 5As shown, the DC-DC conversion circuit includes second input capacitors C37 and C38, a boost chip U6, a second inductive element L6, a switching resistor R45, a power supply capacitor C35, second output capacitors C36, C43 and C44, a third voltage dividing resistor R44, a fourth voltage dividing resistor R46 and a limiting resistor R48, one end of the second input capacitors C37 and C38 is grounded through a circuit, the second input capacitors C37 and C38 are connected with the input pin of the boost chip U6, and the second input capacitors C37 and C38 play a filtering role; the second inductive element L6 is an energy storage inductor connected with the SW input end of the boost chip U6, and the second inductive element L6 provides a stable voltage for the DC-DC conversion circuit; the switching resistor R45 is connected with the middle of the SW and FSW pins of the U6, and the switching resistor R45 is used for setting the switching frequency of the boost chip U6; the power supply capacitor C35 is connected between the BOOT pin and the SW pin of the boost chip, and the power supply capacitor C35 provides a driving power supply for the inside; the boost capacitor C39 is a filter capacitor of the LDO output power supply inside the boost chip U6; the first enable resistor R50 is connected with the LDO output power supply inside the boost chip U6, and the first enable resistor R50 starts the boost circuit; the COMP pin of the boost chip U6 is connected with the compensation resistor R47 and the compensation capacitor C40 in series through a circuit, and the COMP pin of the boost chip U6 provides a loop compensation network for internal error amplification; the third voltage dividing resistor R44 and the fourth voltage dividing resistor R46 are connected with the FB pin of the boost chip U6 through a circuit, and the third voltage dividing resistor R44 and the fourth voltage dividing resistor R46 provide a feedback signal for the DC-DC conversion circuit and adjust the output voltage; the third voltage dividing resistor R44 and the fourth voltage dividing resistor R46 are connected with the second output capacitors C36, C43 and C44 through a circuit, and the third voltage dividing resistor R44 and the fourth voltage dividing resistor R46 play a filtering role; the negative poles of the second output capacitors C36, C43 and C44 are grounded, and the positive poles of the second output capacitors C36, C43 and C44 are connected with the overcurrent protection circuit through a circuit; the ILIM pin of the boost chip U6 is connected with the limiting resistor R48 through a circuit, and the ILIM pin of the boost chip U6 is used for setting the peak current limit.

[0032] As shown in the figure, Figure 6 The overcurrent protection circuit includes third input capacitors C36, C43 and C44, a limiting chip D87, a second enable resistor R71 and feedback resistors R72 and R73, the second output capacitors C36, C43 and C44 are connected with the positive pole of the third input capacitor C45 through a circuit, the negative pole of the third input capacitor C45 is grounded, and the third input capacitor C45 plays a filtering role; the third input capacitor C45 is connected with the second enable resistor R71 through a circuit and then connected with the ENUV pin of the limiting chip D87, so as to provide an enable signal for the limiting chip D87, and the limiting chip D87 starts to work; the ILIM pin of the limiting chip is connected with the overload resistor R74 through a circuit and then grounded, and the ILIM pin of the limiting chip is used for setting the overload and short-circuit limit; the VOP pin of the limiting chip is connected with the feedback resistors R72 and R73 through a circuit, and the VOP pin of the limiting chip is adapted to be connected with the feedback resistors R72 and R73 through a circuit, and a programmable overvoltage protection threshold is set on the feedback resistors R72 and R73; the overcurrent protection circuit of the embodiment can be used to protect the front-end circuit from being damaged when the back-end circuit is short-circuited and other adverse conditions.

[0033] The utility model discloses a can according to the value of pre -established, first to DC-DC conversion circuit step-down output steady voltage DC support capacitor charging, when charging to the set value, DC-DC conversion circuit works, namely discharge circuit starts working, when rear -end circuit appears short circuit, then protection circuit works, and power output is 0, through setting overvoltage protection circuit and overcurrent protection circuit to protect super capacitor equalizing circuit, DC-DC conversion circuit provides steady charging voltage also limited the maximum charging current, overvoltage protection circuit prevented DC-DC conversion circuit exception and carries out overvoltage protection, and super capacitor equalizing circuit guarantees the maximum charging voltage of first super capacitor C180 and second super capacitor C181, and DC-DC conversion circuit guarantees the output steady power supply voltage, and overcurrent protection circuit limited the maximum discharge current while prevented the damage of front end circuit caused by rear end circuit short circuit.

[0034] The above-mentioned embodiments are only preferred embodiments of the utility model, and cannot be used to limit the right scope of the utility model, therefore, the modification, equivalent change, improvement and the like made according to the patent range of the utility model still belong to the range covered by the utility model.

Claims

1. A dual protected supercapacitor charge-discharge circuit, characterized in that: The application relates to a DC-DC conversion circuit, an overvoltage protection circuit, a super capacitor equalization circuit, a DC-DC conversion circuit and an overcurrent protection circuit, wherein the DC-DC conversion circuit is used for converting a 12V voltage into a 5V voltage output to an input end of the overvoltage protection circuit; an output end of the overvoltage protection circuit outputs a 5V voltage to an input end of the super capacitor equalization circuit; an output end of the super capacitor equalization circuit is electrically connected with an input end of the DC-DC conversion circuit; an output end of the DC-DC conversion circuit is electrically connected with an input end of the overcurrent protection circuit; and the overcurrent protection circuit is used for protecting normal work of a front-end circuit.

2. A double protected supercapacitor charge and discharge circuit according to claim 1, characterized in that: The DC-DC conversion circuit comprises a first input capacitor, a step-down chip, a first voltage dividing resistor, a first inductive element, a switch capacitor, a switch resistor and a first output capacitor; the first input capacitor is electrically connected with an input pin of the step-down chip; a feedback FB pin of the step-down chip is electrically connected with at least three first voltage dividing resistors in series for adjusting an output voltage; an output SW pin of the step-down chip is electrically connected with the first inductive element for providing a stable output voltage; the switch capacitor and the switch resistor are connected in series and are respectively electrically connected with a guide pin and an output pin of a switch inside the step-down chip through circuits; an output end of the step-down chip is connected with a circuit of the first output capacitor; and the circuit of the first output capacitor is electrically connected with an input end of the overvoltage protection circuit.

3. A double protected supercapacitor charge and discharge circuit according to claim 2, characterized in that: The overvoltage protection circuit comprises a first MOS tube, a second voltage dividing resistor, a triode, a second voltage stabilizing resistor and a voltage stabilizing tube; a circuit of the output capacitor is electrically connected with a D pole of the first MOS tube; an S pole of the first MOS tube is connected with a power input end; a G pole of the first MOS tube is electrically connected with a C pole of the triode through the second voltage dividing resistor; a D pole of the first MOS tube is electrically connected with an input end of the super capacitor equalization circuit; and a B pole of the triode is electrically connected with the second voltage stabilizing resistor and the voltage stabilizing tube through circuits.

4. A double protected supercapacitor charge and discharge circuit according to claim 3, characterized in that: The super capacitor equalization circuit comprises at least a first super capacitor, a second super capacitor, a first current limiting resistor, a second current limiting resistor, a first voltage detection chip, a second voltage detection chip, a third current limiting resistor, a second MOS tube and a third MOS tube; a D pole of the first MOS tube is electrically connected with a positive pole of the first super capacitor through a first current limiting resistor circuit; the first super capacitor is connected in cascade with the second super capacitor; a negative pole of the second super capacitor is grounded through a circuit; the first super capacitor is communicated with the first voltage detection chip; the first voltage detection chip is electrically communicated with the second current limiting resistor and the second MOS tube respectively; the second voltage detection chip is electrically communicated with the third current limiting resistor and the third MOS tube respectively.

5. A double protected supercapacitor charge and discharge circuit according to claim 4, characterized in that: The DC-DC conversion circuit comprises a second input capacitor, a boost chip, a second inductive element, a switch resistor, a power capacitor, a second output capacitor, a third voltage dividing resistor, a fourth voltage dividing resistor and a limiting resistor, the second input capacitor is electrically connected with an input pin of the boost chip, an SW input end of the boost chip is connected with the second inductive element, a switch resistor is connected between an SW pin and an FSW pin of the boost chip, a power capacitor is arranged between the SW pin and a BOOT pin of the boost chip, an LDO output power supply of the boost chip is connected with a first enable resistor and a boost capacitor through a circuit; a COMP pin of the boost chip is connected with a compensation resistor and a compensation capacitor through a circuit in series; a FB pin of the boost chip is connected with the third voltage dividing resistor and the fourth voltage dividing resistor respectively, the third voltage dividing resistor and the fourth voltage dividing resistor are connected with at least three second output capacitors in parallel through a circuit, a negative electrode of the second output capacitor is grounded, and a positive electrode thereof is connected with an overcurrent protection circuit through a circuit; an ILIM pin of the boost chip is connected with the limiting resistor through a circuit.

6. A double protected supercapacitor charge and discharge circuit according to claim 5, characterized in that: The overcurrent protection circuit comprises a third input capacitor, a limiting chip, a second enable resistor and a feedback resistor, the second output capacitor is connected with a positive electrode of the third input capacitor through a circuit, a negative electrode of the third input capacitor is grounded, the third input capacitor is connected with the second enable resistor through a circuit and then connected with an ENUV pin of the limiting chip; an ILIM pin of the limiting chip is connected with the overload resistor R74 through a circuit and then grounded; a VOP pin of the limiting chip is connected with the feedback resistor through a circuit.

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